Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and executes...

[freertos] / FreeRTOS / Demo / CORTEX_LM3Sxxxx_IAR_Keil / FreeRTOSConfig.h

diff --git a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
index fcca4f6516ebc8a876df9ef41c6cb5fde03dbbf4..f122fcfea0d31740f4370bab6cce03db17e17648 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/FreeRTOSConfig.h
@@ -46,7 +46,7 @@
 #define configCPU_CLOCK_HZ                             ( ( unsigned long ) 50000000 )\r
 #define configTICK_RATE_HZ                             ( ( TickType_t ) 1000 )\r
 #define configMINIMAL_STACK_SIZE               ( ( unsigned short ) 70 )\r
-#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 27000 ) )\r
+#define configTOTAL_HEAP_SIZE                  ( ( size_t ) ( 50 * 1024 ) )\r
 #define configMAX_TASK_NAME_LEN                        ( 12 )\r
 #define configUSE_TRACE_FACILITY               1\r
 #define configUSE_16_BIT_TICKS                 0\r
@@ -102,6 +102,11 @@ See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
 version. */\r
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
 \r
+/* The test that checks the trigger level on stream buffers requires an\r
+allowable margin of error on slower processors (slower than the Win32\r
+machine on which the test is developed). */\r
+#define configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN   4\r
+\r
 #ifdef __ICCARM__\r
        void vAssertCalled( const char *pcFile, unsigned long ulLine );\r
        #define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ );\r