]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_LM3Sxxxx_IAR_Keil/RTOSDemo.ewp
Added Cortex-M optimised code to the IAR, GCC and Keil Cortex-M port layers.
[freertos] / FreeRTOS / Demo / CORTEX_LM3Sxxxx_IAR_Keil / RTOSDemo.ewp
index 32edafc2a2625f3c38a33ede5b4484fb129a91eb..79013b234ee1bcc4fff4a444ac1627de8e363df6 100644 (file)
@@ -87,7 +87,7 @@
         </option>\r
         <option>\r
           <name>OGLastSavedByProductVersion</name>\r
-          <state>5.11.0.50615</state>\r
+          <state>6.30.7.53437</state>\r
         </option>\r
         <option>\r
           <name>GeneralEnableMisra</name>\r
       <name>ILINK</name>\r
       <archiveVersion>0</archiveVersion>\r
       <data>\r
-        <version>13</version>\r
+        <version>15</version>\r
         <wantNonLocal>1</wantNonLocal>\r
         <debug>1</debug>\r
         <option>\r
           <name>CrcAlign</name>\r
           <state>1</state>\r
         </option>\r
-        <option>\r
-          <name>CrcAlgo</name>\r
-          <state>1</state>\r
-        </option>\r
         <option>\r
           <name>CrcPoly</name>\r
           <state>0x11021</state>\r
           <name>IlinkOptForceVfe</name>\r
           <state>0</state>\r
         </option>\r
+        <option>\r
+          <name>IlinkStackAnalysisEnable</name>\r
+          <state>0</state>\r
+        </option>\r
+        <option>\r
+          <name>IlinkStackControlFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>IlinkStackCallGraphFile</name>\r
+          <state></state>\r
+        </option>\r
+        <option>\r
+          <name>CrcAlgorithm</name>\r
+          <version>0</version>\r
+          <state>1</state>\r
+        </option>\r
+        <option>\r
+          <name>CrcUnitSize</name>\r
+          <version>0</version>\r
+          <state>0</state>\r
+        </option>\r
       </data>\r
     </settings>\r
     <settings>\r
   <group>\r
     <name>Scheduler files</name>\r
     <file>\r
-      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_2.c</name>\r
+      <name>$PROJ_DIR$\..\..\Source\portable\MemMang\heap_4.c</name>\r
     </file>\r
     <file>\r
       <name>$PROJ_DIR$\..\..\Source\list.c</name>\r