Update version number ready for release.

[freertos] / FreeRTOS / Demo / CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC / IAR_Specific / RegTest_IAR.s

diff --git a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s
index b22027bc4c99e3eb96eb5065eb2ec5b44b12aa7c..a5d09d14fa478796c1334d9d0c1df5e0c842d781 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s
+++ b/FreeRTOS/Demo/CORTEX_M0_Infineon_XMC1000_IAR_Keil_GCC/IAR_Specific/RegTest_IAR.s
@@ -1,5 +1,6 @@
 /*\r
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+    All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
 \r
@@ -23,10 +24,10 @@
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -62,6 +63,15 @@
     1 tab == 4 spaces!\r
 */\r
 \r
+/* \r
+ * "Reg test" tasks - These fill the registers with known values, then check\r
+ * that each register maintains its expected value for the lifetime of the\r
+ * task.  Each task uses a different set of values.  The reg test tasks execute\r
+ * with a very low priority, so get preempted very frequently.  A register\r
+ * containing an unexpected value is indicative of an error in the context\r
+ * switching mechanism.\r
+ */\r
+ \r
        RSEG    CODE:CODE(2)\r
        thumb\r
 \r