Update version number in preparation for maintenance release.

[freertos] / FreeRTOS / Demo / CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil / Full_Demo / IntQueueTimer.c

diff --git a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c
index f3ab79027cfe8667caadf35549447b0375c9eafc..808bf7e5b843403863d6fd38265c8b11becbe143 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c
+++ b/FreeRTOS/Demo/CORTEX_M4F_MSP432_LaunchPad_IAR_CCS_Keil/Full_Demo/IntQueueTimer.c
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V9.0.0rc1 - Copyright (C) 2016 Real Time Engineers Ltd.\r
+    FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -104,17 +104,17 @@ void vT32_1_Handler( void );
 void vInitialiseTimerForIntQueueTest( void )\r
 {\r
     /* Configure the timer channels. */\r
-       MAP_Timer32_initModule( TIMER32_0_MODULE, TIMER32_PRESCALER_1, TIMER32_32BIT, TIMER32_PERIODIC_MODE );\r
-       MAP_Timer32_setCount( TIMER32_0_MODULE, CS_getMCLK() / tmrTIMER_0_FREQUENCY );\r
-       MAP_Timer32_enableInterrupt( TIMER32_0_MODULE );\r
-       MAP_Timer32_startTimer( TIMER32_0_MODULE, false );\r
+       MAP_Timer32_initModule( (uint32_t)TIMER32_0_BASE, TIMER32_PRESCALER_1, TIMER32_32BIT, TIMER32_PERIODIC_MODE );\r
+       MAP_Timer32_setCount( (uint32_t)TIMER32_0_BASE, CS_getMCLK() / tmrTIMER_0_FREQUENCY );\r
+       MAP_Timer32_enableInterrupt( (uint32_t)TIMER32_0_BASE );\r
+       MAP_Timer32_startTimer( (uint32_t)TIMER32_0_BASE, false );\r
        MAP_Interrupt_setPriority( INT_T32_INT1, tmrLOWER_PRIORITY );\r
        MAP_Interrupt_enableInterrupt( INT_T32_INT1 );\r
 \r
-       MAP_Timer32_initModule( TIMER32_1_MODULE, TIMER32_PRESCALER_1, TIMER32_32BIT, TIMER32_PERIODIC_MODE );\r
-       MAP_Timer32_setCount( TIMER32_1_MODULE, CS_getMCLK() / tmrTIMER_1_FREQUENCY );\r
-       MAP_Timer32_enableInterrupt( TIMER32_1_MODULE );\r
-       MAP_Timer32_startTimer( TIMER32_1_MODULE, false );\r
+       MAP_Timer32_initModule( (uint32_t)TIMER32_1_BASE, TIMER32_PRESCALER_1, TIMER32_32BIT, TIMER32_PERIODIC_MODE );\r
+       MAP_Timer32_setCount( (uint32_t)TIMER32_1_BASE, CS_getMCLK() / tmrTIMER_1_FREQUENCY );\r
+       MAP_Timer32_enableInterrupt( (uint32_t)TIMER32_1_BASE );\r
+       MAP_Timer32_startTimer( (uint32_t)TIMER32_1_BASE, false );\r
        MAP_Interrupt_setPriority( INT_T32_INT2, tmrHIGHER_PRIORITY );\r
        MAP_Interrupt_enableInterrupt( INT_T32_INT2 );\r
 }\r
@@ -122,14 +122,14 @@ void vInitialiseTimerForIntQueueTest( void )
 \r
 void vT32_0_Handler( void )\r
 {\r
-    MAP_Timer32_clearInterruptFlag( TIMER32_0_MODULE );\r
+    MAP_Timer32_clearInterruptFlag( (uint32_t)TIMER32_0_BASE );\r
        portYIELD_FROM_ISR( xFirstTimerHandler() );\r
 }\r
 /*-----------------------------------------------------------*/\r
 \r
 void vT32_1_Handler( void )\r
 {\r
-    MAP_Timer32_clearInterruptFlag( TIMER32_1_MODULE );\r
+    MAP_Timer32_clearInterruptFlag( (uint32_t)TIMER32_1_BASE );\r
        portYIELD_FROM_ISR( xSecondTimerHandler() );\r
 }\r
 \r