--- /dev/null
+/**\r
+ * \file\r
+ *\r
+ * \brief Generic clock management\r
+ *\r
+ * Copyright (c) 2010-2015 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ * from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ * Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+/*\r
+ * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>\r
+ */\r
+#ifndef CLK_GENCLK_H_INCLUDED\r
+#define CLK_GENCLK_H_INCLUDED\r
+\r
+#include "parts.h"\r
+\r
+#if SAM3S\r
+# include "sam3s/genclk.h"\r
+#elif SAM3U\r
+# include "sam3u/genclk.h"\r
+#elif SAM3N\r
+# include "sam3n/genclk.h"\r
+#elif SAM3XA\r
+# include "sam3x/genclk.h"\r
+#elif SAM4S\r
+# include "sam4s/genclk.h"\r
+#elif SAM4L\r
+# include "sam4l/genclk.h"\r
+#elif SAM4E\r
+# include "sam4e/genclk.h"\r
+#elif SAM4N\r
+# include "sam4n/genclk.h"\r
+#elif SAM4C\r
+# include "sam4c/genclk.h"\r
+#elif SAM4CM\r
+# include "sam4cm/genclk.h"\r
+#elif SAM4CP\r
+# include "sam4cp/genclk.h"\r
+#elif SAMG\r
+# include "samg/genclk.h"\r
+#elif SAMV71\r
+# include "samv71/genclk.h"\r
+#elif SAMV70\r
+# include "samv70/genclk.h"\r
+#elif SAME70\r
+# include "same70/genclk.h"\r
+#elif SAMS70\r
+# include "sams70/genclk.h"\r
+#elif (UC3A0 || UC3A1)\r
+# include "uc3a0_a1/genclk.h"\r
+#elif UC3A3\r
+# include "uc3a3_a4/genclk.h"\r
+#elif UC3B\r
+# include "uc3b0_b1/genclk.h"\r
+#elif UC3C\r
+# include "uc3c/genclk.h"\r
+#elif UC3D\r
+# include "uc3d/genclk.h"\r
+#elif UC3L\r
+# include "uc3l/genclk.h"\r
+#else\r
+# error Unsupported chip type\r
+#endif\r
+\r
+/**\r
+ * \ingroup clk_group\r
+ * \defgroup genclk_group Generic Clock Management\r
+ *\r
+ * Generic clocks are configurable clocks which run outside the system\r
+ * clock domain. They are often connected to peripherals which have an\r
+ * asynchronous component running independently of the bus clock, e.g.\r
+ * USB controllers, low-power timers and RTCs, etc.\r
+ *\r
+ * Note that not all platforms have support for generic clocks; on such\r
+ * platforms, this API will not be available.\r
+ *\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * \def GENCLK_DIV_MAX\r
+ * \brief Maximum divider supported by the generic clock implementation\r
+ */\r
+/**\r
+ * \enum genclk_source\r
+ * \brief Generic clock source ID\r
+ *\r
+ * Each generic clock may be generated from a different clock source.\r
+ * These are the available alternatives provided by the chip.\r
+ */\r
+\r
+//! \name Generic clock configuration\r
+//@{\r
+/**\r
+ * \struct genclk_config\r
+ * \brief Hardware representation of a set of generic clock parameters\r
+ */\r
+/**\r
+ * \fn void genclk_config_defaults(struct genclk_config *cfg,\r
+ * unsigned int id)\r
+ * \brief Initialize \a cfg to the default configuration for the clock\r
+ * identified by \a id.\r
+ */\r
+/**\r
+ * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id)\r
+ * \brief Read the currently active configuration of the clock\r
+ * identified by \a id into \a cfg.\r
+ */\r
+/**\r
+ * \fn void genclk_config_write(const struct genclk_config *cfg,\r
+ * unsigned int id)\r
+ * \brief Activate the configuration \a cfg on the clock identified by\r
+ * \a id.\r
+ */\r
+/**\r
+ * \fn void genclk_config_set_source(struct genclk_config *cfg,\r
+ * enum genclk_source src)\r
+ * \brief Select a new source clock \a src in configuration \a cfg.\r
+ */\r
+/**\r
+ * \fn void genclk_config_set_divider(struct genclk_config *cfg,\r
+ * unsigned int divider)\r
+ * \brief Set a new \a divider in configuration \a cfg.\r
+ */\r
+/**\r
+ * \fn void genclk_enable_source(enum genclk_source src)\r
+ * \brief Enable the source clock \a src used by a generic clock.\r
+ */\r
+ //@}\r
+\r
+//! \name Enabling and disabling Generic Clocks\r
+//@{\r
+/**\r
+ * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id)\r
+ * \brief Activate the configuration \a cfg on the clock identified by\r
+ * \a id and enable it.\r
+ */\r
+/**\r
+ * \fn void genclk_disable(unsigned int id)\r
+ * \brief Disable the generic clock identified by \a id.\r
+ */\r
+//@}\r
+\r
+/**\r
+ * \brief Enable the configuration defined by \a src and \a divider\r
+ * for the generic clock identified by \a id.\r
+ *\r
+ * \param id The ID of the generic clock.\r
+ * \param src The source clock of the generic clock.\r
+ * \param divider The divider used to generate the generic clock.\r
+ */\r
+static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider)\r
+{\r
+ struct genclk_config gcfg;\r
+\r
+ genclk_config_defaults(&gcfg, id);\r
+ genclk_enable_source(src);\r
+ genclk_config_set_source(&gcfg, src);\r
+ genclk_config_set_divider(&gcfg, divider);\r
+ genclk_enable(&gcfg, id);\r
+}\r
+\r
+//! @}\r
+\r
+#endif /* CLK_GENCLK_H_INCLUDED */\r
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