Rename DummyTCB_t to StaticTCB_t.

[freertos] / FreeRTOS / Demo / CORTEX_M7_SAME70_Xplained_AtmelStudio / src / ASF / sam / utils / cmsis / same70 / include / instance / uart2.h

diff --git a/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/ASF/sam/utils/cmsis/same70/include/instance/uart2.h b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/ASF/sam/utils/cmsis/same70/include/instance/uart2.h
new file mode 100644 (file)
index 0000000..839aa6c
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_M7_SAME70_Xplained_AtmelStudio/src/ASF/sam/utils/cmsis/same70/include/instance/uart2.h
@@ -0,0 +1,75 @@
+/**\r
+ * \file\r
+ *\r
+ * Copyright (c) 2015 Atmel Corporation. All rights reserved.\r
+ *\r
+ * \asf_license_start\r
+ *\r
+ * \page License\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without\r
+ * modification, are permitted provided that the following conditions are met:\r
+ *\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ *    this list of conditions and the following disclaimer.\r
+ *\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ *    this list of conditions and the following disclaimer in the documentation\r
+ *    and/or other materials provided with the distribution.\r
+ *\r
+ * 3. The name of Atmel may not be used to endorse or promote products derived\r
+ *    from this software without specific prior written permission.\r
+ *\r
+ * 4. This software may only be redistributed and used in connection with an\r
+ *    Atmel microcontroller product.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED\r
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF\r
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE\r
+ * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR\r
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,\r
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\r
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\r
+ * POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ * \asf_license_stop\r
+ *\r
+ */\r
+/*\r
+ * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>\r
+ */\r
+\r
+#ifndef _SAME70_UART2_INSTANCE_\r
+#define _SAME70_UART2_INSTANCE_\r
+\r
+/* ========== Register definition for UART2 peripheral ========== */\r
+#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))\r
+  #define REG_UART2_CR                    (0x400E1A00U) /**< \brief (UART2) Control Register */\r
+  #define REG_UART2_MR                    (0x400E1A04U) /**< \brief (UART2) Mode Register */\r
+  #define REG_UART2_IER                   (0x400E1A08U) /**< \brief (UART2) Interrupt Enable Register */\r
+  #define REG_UART2_IDR                   (0x400E1A0CU) /**< \brief (UART2) Interrupt Disable Register */\r
+  #define REG_UART2_IMR                   (0x400E1A10U) /**< \brief (UART2) Interrupt Mask Register */\r
+  #define REG_UART2_SR                    (0x400E1A14U) /**< \brief (UART2) Status Register */\r
+  #define REG_UART2_RHR                   (0x400E1A18U) /**< \brief (UART2) Receive Holding Register */\r
+  #define REG_UART2_THR                   (0x400E1A1CU) /**< \brief (UART2) Transmit Holding Register */\r
+  #define REG_UART2_BRGR                  (0x400E1A20U) /**< \brief (UART2) Baud Rate Generator Register */\r
+  #define REG_UART2_CMPR                  (0x400E1A24U) /**< \brief (UART2) Comparison Register */\r
+  #define REG_UART2_WPMR                  (0x400E1AE4U) /**< \brief (UART2) Write Protection Mode Register */\r
+#else\r
+  #define REG_UART2_CR   (*(__O  uint32_t*)0x400E1A00U) /**< \brief (UART2) Control Register */\r
+  #define REG_UART2_MR   (*(__IO uint32_t*)0x400E1A04U) /**< \brief (UART2) Mode Register */\r
+  #define REG_UART2_IER  (*(__O  uint32_t*)0x400E1A08U) /**< \brief (UART2) Interrupt Enable Register */\r
+  #define REG_UART2_IDR  (*(__O  uint32_t*)0x400E1A0CU) /**< \brief (UART2) Interrupt Disable Register */\r
+  #define REG_UART2_IMR  (*(__I  uint32_t*)0x400E1A10U) /**< \brief (UART2) Interrupt Mask Register */\r
+  #define REG_UART2_SR   (*(__I  uint32_t*)0x400E1A14U) /**< \brief (UART2) Status Register */\r
+  #define REG_UART2_RHR  (*(__I  uint32_t*)0x400E1A18U) /**< \brief (UART2) Receive Holding Register */\r
+  #define REG_UART2_THR  (*(__O  uint32_t*)0x400E1A1CU) /**< \brief (UART2) Transmit Holding Register */\r
+  #define REG_UART2_BRGR (*(__IO uint32_t*)0x400E1A20U) /**< \brief (UART2) Baud Rate Generator Register */\r
+  #define REG_UART2_CMPR (*(__IO uint32_t*)0x400E1A24U) /**< \brief (UART2) Comparison Register */\r
+  #define REG_UART2_WPMR (*(__IO uint32_t*)0x400E1AE4U) /**< \brief (UART2) Write Protection Mode Register */\r
+#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */\r
+\r
+#endif /* _SAME70_UART2_INSTANCE_ */\r