Update library files used in STM32F7 demo to the latest version released by ST.

[freertos] / FreeRTOS / Demo / CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil / ST_Library / stm32f7xx_hal_rcc_ex.c

diff --git a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/stm32f7xx_hal_rcc_ex.c b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/stm32f7xx_hal_rcc_ex.c
index 34936170516890a54034cc37378d84c06c338f4c..8595daa6a388539adbb349f5e6aeb071f059bc59 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/stm32f7xx_hal_rcc_ex.c
+++ b/FreeRTOS/Demo/CORTEX_M7_STM32F7_STM32756G-EVAL_IAR_Keil/ST_Library/stm32f7xx_hal_rcc_ex.c
@@ -2,8 +2,8 @@
   ******************************************************************************\r
   * @file    stm32f7xx_hal_rcc_ex.c\r
   * @author  MCD Application Team\r
-  * @version V1.0.0RC1\r
-  * @date    24-March-2015\r
+  * @version V1.0.0\r
+  * @date    12-May-2015\r
   * @brief   Extension RCC HAL module driver.\r
   *          This file provides firmware functions to manage the following \r
   *          functionalities RCC extension peripheral:\r
@@ -406,11 +406,12 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
   }\r
 \r
   /*-------------------------------------- LTDC Configuration -----------------------------------*/\r
+#if defined(STM32F756xx) || defined(STM32F746xx)\r
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == RCC_PERIPHCLK_LTDC)\r
   {\r
     pllsaiused = 1; \r
   }\r
-  \r
+#endif /* STM32F756xx || STM32F746xx */\r
   /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/\r
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1)\r
   {\r
@@ -433,7 +434,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
 \r
   /*-------------------------------------- PLLI2S Configuration ---------------------------------*/\r
   /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S or SPDIF-RX */\r
-  if(plli2sused == 1)\r
+  if((plli2sused == 1) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))\r
   {\r
     /* Disable the PLLI2S */\r
     __HAL_RCC_PLLI2S_DISABLE();  \r
@@ -504,8 +505,23 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) × (PLLI2SN/PLLM) */\r
       /* SPDIFCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */\r
       __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, tmpreg0, tmpreg1);\r
-    }       \r
-   \r
+    }  \r
+         \r
+    /*----------------- In Case of PLLI2S is just selected  -----------------*/  \r
+    if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)\r
+    {\r
+      /* Check for Parameters */\r
+      assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));\r
+      assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));\r
+      assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));\r
+      assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));\r
+\r
+      /* Configure the PLLI2S division factors */\r
+      /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) × (PLLI2SN/PLLI2SM) */\r
+      /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */\r
+      __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SP, PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);\r
+    } \r
+    \r
     /* Enable the PLLI2S */\r
     __HAL_RCC_PLLI2S_ENABLE();\r
     \r
@@ -583,6 +599,7 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0, tmpreg1);\r
     }        \r
 \r
+#if defined(STM32F756xx) || defined(STM32F746xx)\r
     /*---------------------------- LTDC configuration -------------------------------*/\r
     if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LTDC) == (RCC_PERIPHCLK_LTDC))\r
     {\r
@@ -601,7 +618,8 @@ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClk
       /* LTDC_CLK = LTDC_CLK(first level)/PLLSAIDIVR */ \r
       __HAL_RCC_PLLSAI_PLLSAICLKDIVR_CONFIG(PeriphClkInit->PLLSAIDivR);\r
     }    \r
-    \r
+#endif /* STM32F756xx || STM32F746xx */  \r
+\r
     /* Enable PLLSAI Clock */\r
     __HAL_RCC_PLLSAI_ENABLE();\r
     \r