******************************************************************************\r
* @file stm32f7xx_hal_usart.c\r
* @author MCD Application Team\r
- * @version V1.0.0RC1\r
- * @date 24-March-2015\r
+ * @version V1.0.0\r
+ * @date 12-May-2015\r
* @brief USART HAL module driver.\r
*\r
* This file provides firmware functions to manage the following \r
static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart);\r
static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart);\r
static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);\r
+static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);\r
static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);\r
static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);\r
/**\r
\r
if(husart->State == HAL_USART_STATE_RESET)\r
{\r
+ /* Allocate lock resource and initialize it */\r
+ husart->Lock = HAL_UNLOCKED;\r
/* Init the low level hardware : GPIO, CLOCK */\r
HAL_USART_MspInit(husart);\r
}\r
}\r
}\r
\r
+ /* USART in mode Transmitter (transmission end) -----------------------------*/\r
+ if((__HAL_USART_GET_IT(husart, USART_IT_TC) != RESET) &&(__HAL_USART_GET_IT_SOURCE(husart, USART_IT_TC) != RESET))\r
+ {\r
+ USART_EndTransmit_IT(husart);\r
+ }\r
+ \r
}\r
\r
/**\r
/* Disable the USART Transmit Complete Interrupt */\r
__HAL_USART_DISABLE_IT(husart, USART_IT_TXE);\r
\r
- /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */\r
- __HAL_USART_DISABLE_IT(husart, USART_IT_ERR);\r
-\r
- if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, USART_TIMEOUT_VALUE) != HAL_OK)\r
- {\r
- return HAL_TIMEOUT;\r
- }\r
- husart->State = HAL_USART_STATE_READY;\r
-\r
- HAL_USART_TxCpltCallback(husart);\r
+ /* Enable the USART Transmit Complete Interrupt */\r
+ __HAL_USART_ENABLE_IT(husart, USART_IT_TC);\r
\r
return HAL_OK;\r
}\r
}\r
}\r
\r
+/**\r
+ * @brief Wraps up transmission in non-blocking mode.\r
+ * @param husart: pointer to a USART_HandleTypeDef structure that contains\r
+ * the configuration information for the specified USART module.\r
+ * @retval HAL status\r
+ */\r
+static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)\r
+{\r
+ /* Disable the USART Transmit Complete Interrupt */\r
+ __HAL_USART_DISABLE_IT(husart, USART_IT_TC);\r
+\r
+ /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */\r
+ __HAL_USART_DISABLE_IT(husart, USART_IT_ERR);\r
+\r
+ husart->State = HAL_USART_STATE_READY;\r
+\r
+ HAL_USART_TxCpltCallback(husart);\r
+\r
+ return HAL_OK;\r
+}\r
+\r
/**\r
* @brief Simplex Receive an amount of data in non-blocking mode.\r
* Function called under interruption only, once\r
__HAL_USART_DISABLE_IT(husart, USART_IT_PE);\r
__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);\r
\r
- husart->State= HAL_USART_STATE_TIMEOUT;\r
+ husart->State= HAL_USART_STATE_READY;\r
\r
/* Process Unlocked */\r
__HAL_UNLOCK(husart);\r
__HAL_USART_DISABLE_IT(husart, USART_IT_PE);\r
__HAL_USART_DISABLE_IT(husart, USART_IT_ERR);\r
\r
- husart->State= HAL_USART_STATE_TIMEOUT;\r
+ husart->State= HAL_USART_STATE_READY;\r
\r
/* Process Unlocked */\r
__HAL_UNLOCK(husart);\r
{\r
USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;\r
\r
- husart->TxXferCount = 0;\r
- \r
- if(husart->State == HAL_USART_STATE_BUSY_TX)\r
- {\r
- /* Wait for USART TC Flag */\r
- if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, USART_TXDMA_TIMEOUTVALUE) != HAL_OK)\r
- {\r
- /* Timeout occurred */ \r
- husart->State = HAL_USART_STATE_TIMEOUT;\r
- HAL_USART_ErrorCallback(husart);\r
- }\r
- else\r
+ /* DMA Normal mode */\r
+ if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)\r
+ { \r
+ husart->TxXferCount = 0;\r
+\r
+ if(husart->State == HAL_USART_STATE_BUSY_TX)\r
{\r
- /* No Timeout */\r
- /* Disable the DMA transfer for transmit request by setting the DMAT bit\r
- in the USART CR3 register */\r
+ /* Disable the DMA transfer for transmit request by resetting the DMAT bit\r
+ in the USART CR3 register */\r
husart->Instance->CR3 &= ~(USART_CR3_DMAT);\r
- husart->State= HAL_USART_STATE_READY;\r
+\r
+ /* Enable the USART Transmit Complete Interrupt */\r
+ __HAL_USART_ENABLE_IT(husart, USART_IT_TC);\r
}\r
}\r
- /* the usart state is HAL_USART_STATE_BUSY_TX_RX*/\r
+ /* DMA Circular mode */\r
else\r
{\r
- husart->State= HAL_USART_STATE_BUSY_RX;\r
+ if(husart->State == HAL_USART_STATE_BUSY_TX)\r
+ {\r
HAL_USART_TxCpltCallback(husart);\r
- }\r
+ }\r
+ }\r
}\r
\r
\r
{\r
USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;\r
\r
- husart->RxXferCount = 0;\r
-\r
- /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit\r
- in USART CR3 register */\r
- husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);\r
- /* similarly, disable the DMA TX transfer that was started to provide the\r
- clock to the slave device */\r
- husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);\r
+ /* DMA Normal mode */\r
+ if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)\r
+ { \r
+ husart->RxXferCount = 0;\r
\r
- husart->State= HAL_USART_STATE_READY;\r
+ /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit\r
+ in USART CR3 register */\r
+ husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);\r
+ /* similarly, disable the DMA TX transfer that was started to provide the\r
+ clock to the slave device */\r
+ husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);\r
\r
- HAL_USART_RxCpltCallback(husart);\r
+ if(husart->State == HAL_USART_STATE_BUSY_RX)\r
+ {\r
+ HAL_USART_RxCpltCallback(husart);\r
+ }\r
+ /* The USART state is HAL_USART_STATE_BUSY_TX_RX */\r
+ else\r
+ {\r
+ HAL_USART_TxRxCpltCallback(husart);\r
+ }\r
+ husart->State= HAL_USART_STATE_READY;\r
+ }\r
+ /* DMA circular mode */\r
+ else\r
+ {\r
+ if(husart->State == HAL_USART_STATE_BUSY_RX)\r
+ {\r
+ HAL_USART_RxCpltCallback(husart);\r
+ }\r
+ /* The USART state is HAL_USART_STATE_BUSY_TX_RX */\r
+ else\r
+ {\r
+ HAL_USART_TxRxCpltCallback(husart);\r
+ }\r
+ }\r
}\r
\r
/**\r
uint32_t tmpreg = 0x0;\r
USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED;\r
HAL_StatusTypeDef ret = HAL_OK;\r
+ uint16_t brrtemp = 0x0000;\r
+ uint16_t usartdiv = 0x0000;\r
\r
/* Check the parameters */\r
assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));\r
USART_GETCLOCKSOURCE(husart, clocksource);\r
switch (clocksource)\r
{\r
- case USART_CLOCKSOURCE_PCLK1: \r
- husart->Instance->BRR = (uint16_t)(2*HAL_RCC_GetPCLK1Freq() / husart->Init.BaudRate);\r
- break;\r
- case USART_CLOCKSOURCE_PCLK2: \r
- husart->Instance->BRR = (uint16_t)(2*HAL_RCC_GetPCLK2Freq() / husart->Init.BaudRate);\r
- break;\r
- case USART_CLOCKSOURCE_HSI: \r
- husart->Instance->BRR = (uint16_t)(2*HSI_VALUE / husart->Init.BaudRate); \r
- break; \r
- case USART_CLOCKSOURCE_SYSCLK: \r
- husart->Instance->BRR = (uint16_t)(2*HAL_RCC_GetSysClockFreq() / husart->Init.BaudRate);\r
- break; \r
- case USART_CLOCKSOURCE_LSE: \r
- husart->Instance->BRR = (uint16_t)(2*LSE_VALUE / husart->Init.BaudRate); \r
- break;\r
- case USART_CLOCKSOURCE_UNDEFINED: \r
- default:\r
- ret = HAL_ERROR; \r
- break; \r
+ case USART_CLOCKSOURCE_PCLK1:\r
+ usartdiv = (uint16_t)((2*HAL_RCC_GetPCLK1Freq()) / husart->Init.BaudRate);\r
+ break;\r
+ case USART_CLOCKSOURCE_PCLK2:\r
+ usartdiv = (uint16_t)((2*HAL_RCC_GetPCLK2Freq()) / husart->Init.BaudRate);\r
+ break;\r
+ case USART_CLOCKSOURCE_HSI:\r
+ usartdiv = (uint16_t)((2*HSI_VALUE) / husart->Init.BaudRate);\r
+ break;\r
+ case USART_CLOCKSOURCE_SYSCLK:\r
+ usartdiv = (uint16_t)((2*HAL_RCC_GetSysClockFreq()) / husart->Init.BaudRate);\r
+ break;\r
+ case USART_CLOCKSOURCE_LSE:\r
+ usartdiv = (uint16_t)((2*LSE_VALUE) / husart->Init.BaudRate);\r
+ break;\r
+ case USART_CLOCKSOURCE_UNDEFINED:\r
+ default:\r
+ ret = HAL_ERROR;\r
+ break;\r
} \r
\r
+ brrtemp = usartdiv & 0xFFF0;\r
+ brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U);\r
+ husart->Instance->BRR = brrtemp;\r
+ \r
return ret; \r
}\r
\r
projects / freertos / blobdiff