--- /dev/null
+/*\r
+ * Copyright 2017, NXP\r
+ * All rights reserved.\r
+ *\r
+ *\r
+ * SPDX-License-Identifier: BSD-3-Clause\r
+ *\r
+ */\r
+\r
+/*\r
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************\r
+!!GlobalInfo\r
+product: Pins v3.0\r
+processor: LPC54018\r
+package_id: LPC54018JET180\r
+mcu_data: ksdk2_0\r
+processor_version: 0.0.0\r
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********\r
+ */\r
+\r
+#include "fsl_common.h"\r
+#include "fsl_iocon.h"\r
+#include "pin_mux.h"\r
+\r
+/*FUNCTION**********************************************************************\r
+ * \r
+ * Function Name : BOARD_InitBootPins\r
+ * Description : Calls initialization functions.\r
+ * \r
+ *END**************************************************************************/\r
+void BOARD_InitBootPins(void) {\r
+ BOARD_InitPins();\r
+}\r
+\r
+#define IOCON_PIO_DIGITAL_EN 0x0100u /*!< Enables digital function */\r
+#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */\r
+#define IOCON_PIO_INPFILT_OFF 0x0200u /*!< Input filter disabled */\r
+#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */\r
+#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */\r
+#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */\r
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */\r
+#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port 0 */\r
+#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port 0 */\r
+#define PORT0_IDX 0u /*!< Port index */\r
+\r
+/*\r
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************\r
+BOARD_InitPins:\r
+- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}\r
+- pin_list:\r
+ - {pin_num: B13, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI/CTIMER2_MAT3/SCT0_OUT8/TRACEDATA(2), mode: inactive, invert: disabled,\r
+ glitch_filter: disabled, slew_rate: standard, open_drain: disabled}\r
+ - {pin_num: A2, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_30/FC0_TXD_SCL_MISO/CTIMER0_MAT0/SCT0_OUT9/TRACEDATA(1), mode: inactive, invert: disabled,\r
+ glitch_filter: disabled, slew_rate: standard, open_drain: disabled}\r
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********\r
+ */\r
+\r
+/*FUNCTION**********************************************************************\r
+ *\r
+ * Function Name : BOARD_InitPins\r
+ *\r
+ *END**************************************************************************/\r
+void BOARD_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */\r
+ CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */\r
+\r
+ const uint32_t port0_pin29_config = (\r
+ IOCON_PIO_FUNC1 | /* Pin is configured as FC0_RXD_SDA_MOSI */\r
+ IOCON_PIO_MODE_INACT | /* No addition pin function */\r
+ IOCON_PIO_INV_DI | /* Input function is not inverted */\r
+ IOCON_PIO_DIGITAL_EN | /* Enables digital function */\r
+ IOCON_PIO_INPFILT_OFF | /* Input filter disabled */\r
+ IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */\r
+ IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */\r
+ );\r
+ IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN29_IDX, port0_pin29_config); /* PORT0 PIN29 (coords: B13) is configured as FC0_RXD_SDA_MOSI */\r
+ const uint32_t port0_pin30_config = (\r
+ IOCON_PIO_FUNC1 | /* Pin is configured as FC0_TXD_SCL_MISO */\r
+ IOCON_PIO_MODE_INACT | /* No addition pin function */\r
+ IOCON_PIO_INV_DI | /* Input function is not inverted */\r
+ IOCON_PIO_DIGITAL_EN | /* Enables digital function */\r
+ IOCON_PIO_INPFILT_OFF | /* Input filter disabled */\r
+ IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */\r
+ IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */\r
+ );\r
+ IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN30_IDX, port0_pin30_config); /* PORT0 PIN30 (coords: A2) is configured as FC0_TXD_SCL_MISO */\r
+}\r
+\r
+/*******************************************************************************\r
+ * EOF\r
+ ******************************************************************************/\r