commit 9f316c246baafa15c542a5aea81a94f26e3d6507

[freertos] / FreeRTOS / Demo / CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso / NXP_Code / CMSIS / cmsis_armcc.h

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
index f204e241c9293021e0d6642e7ac60c8b76616be1..f0fec127e1427afedb6c6f41716ac81bd93eff9e 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/CMSIS/cmsis_armcc.h
@@ -1,8 +1,8 @@
 /**************************************************************************//**\r
  * @file     cmsis_armcc.h\r
  * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file\r
- * @version  V5.0.4\r
- * @date     10. January 2018\r
+ * @version  V5.0.5\r
+ * @date     14. December 2018\r
  ******************************************************************************/\r
 /*\r
  * Copyright (c) 2009-2018 Arm Limited. All rights reserved.\r
@@ -47,6 +47,10 @@
   /* __ARM_ARCH_8M_BASE__  not applicable */\r
   /* __ARM_ARCH_8M_MAIN__  not applicable */\r
 \r
+/* CMSIS compiler control DSP macros */\r
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\r
+  #define __ARM_FEATURE_DSP         1\r
+#endif\r
 \r
 /* CMSIS compiler specific defines */\r
 #ifndef   __ASM\r
@@ -337,8 +341,6 @@ __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
            (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */\r
 \r
 \r
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )\r
-\r
 /**\r
   \brief   Get FPSCR\r
   \details Returns the current value of the Floating Point Status/Control register.\r
@@ -372,9 +374,6 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
 #endif\r
 }\r
 \r
-#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */\r
-\r
-\r
 \r
 /*@} end of CMSIS_Core_RegAccFunctions */\r
 \r