]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/board/pin_mux.c
commit 9f316c246baafa15c542a5aea81a94f26e3d6507
[freertos] / FreeRTOS / Demo / CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso / NXP_Code / board / pin_mux.c
index 62fd16e647378b16ef7af69217a135bc67a41eb0..2a548e45349acffbf034b98c8395577335ecf8b2 100644 (file)
@@ -1,5 +1,5 @@
 /*\r
- * Copyright 2017-2018 NXP\r
+ * Copyright 2017-2019 NXP\r
  * All rights reserved.\r
  *\r
  * SPDX-License-Identifier: BSD-3-Clause\r
 /*\r
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************\r
 !!GlobalInfo\r
-product: Pins v5.0\r
+product: Pins v6.0\r
 processor: LPC55S69\r
 package_id: LPC55S69JBD100\r
 mcu_data: ksdk2_0\r
-processor_version: 0.0.6\r
+processor_version: 0.0.0\r
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********\r
  */\r
 /* clang-format on */\r
@@ -45,9 +45,9 @@ BOARD_InitPins:
 - options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}\r
 - pin_list:\r
   - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,\r
-    mode: inactive, slew_rate: standard, invert: disabled, digi_mode: digital, open_drain: disabled}\r
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}\r
   - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,\r
-    slew_rate: standard, invert: disabled, digi_mode: digital, open_drain: disabled}\r
+    slew_rate: standard, invert: disabled, open_drain: disabled}\r
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********\r
  */\r
 /* clang-format on */\r