+#define FSL_FEATURE_DMA_NUMBER_OF_CHANNELS (23)\r
+/* @brief Align size of DMA descriptor */\r
+#define FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZE (512)\r
+/* @brief DMA head link descriptor table align size */\r
+#define FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE (16U)\r
+\r
+/* FLEXCOMM module features */\r
+\r
+/* @brief FLEXCOMM0 USART INDEX 0 */\r
+#define FSL_FEATURE_FLEXCOMM0_USART_INDEX (0)\r
+/* @brief FLEXCOMM0 SPI INDEX 0 */\r
+#define FSL_FEATURE_FLEXCOMM0_SPI_INDEX (0)\r
+/* @brief FLEXCOMM0 I2C INDEX 0 */\r
+#define FSL_FEATURE_FLEXCOMM0_I2C_INDEX (0)\r
+/* @brief FLEXCOMM0 I2S INDEX 0 */\r
+#define FSL_FEATURE_FLEXCOMM0_I2S_INDEX (0)\r
+/* @brief FLEXCOMM1 USART INDEX 1 */\r
+#define FSL_FEATURE_FLEXCOMM1_USART_INDEX (1)\r
+/* @brief FLEXCOMM1 SPI INDEX 1 */\r
+#define FSL_FEATURE_FLEXCOMM1_SPI_INDEX (1)\r
+/* @brief FLEXCOMM1 I2C INDEX 1 */\r
+#define FSL_FEATURE_FLEXCOMM1_I2C_INDEX (1)\r
+/* @brief FLEXCOMM1 I2S INDEX 1 */\r
+#define FSL_FEATURE_FLEXCOMM1_I2S_INDEX (1)\r
+/* @brief FLEXCOMM2 USART INDEX 2 */\r
+#define FSL_FEATURE_FLEXCOMM2_USART_INDEX (2)\r
+/* @brief FLEXCOMM2 SPI INDEX 2 */\r
+#define FSL_FEATURE_FLEXCOMM2_SPI_INDEX (2)\r
+/* @brief FLEXCOMM2 I2C INDEX 2 */\r
+#define FSL_FEATURE_FLEXCOMM2_I2C_INDEX (2)\r
+/* @brief FLEXCOMM2 I2S INDEX 2 */\r
+#define FSL_FEATURE_FLEXCOMM2_I2S_INDEX (2)\r
+/* @brief FLEXCOMM3 USART INDEX 3 */\r
+#define FSL_FEATURE_FLEXCOMM3_USART_INDEX (3)\r
+/* @brief FLEXCOMM3 SPI INDEX 3 */\r
+#define FSL_FEATURE_FLEXCOMM3_SPI_INDEX (3)\r
+/* @brief FLEXCOMM3 I2C INDEX 3 */\r
+#define FSL_FEATURE_FLEXCOMM3_I2C_INDEX (3)\r
+/* @brief FLEXCOMM3 I2S INDEX 3 */\r
+#define FSL_FEATURE_FLEXCOMM3_I2S_INDEX (3)\r
+/* @brief FLEXCOMM4 USART INDEX 4 */\r
+#define FSL_FEATURE_FLEXCOMM4_USART_INDEX (4)\r
+/* @brief FLEXCOMM4 SPI INDEX 4 */\r
+#define FSL_FEATURE_FLEXCOMM4_SPI_INDEX (4)\r
+/* @brief FLEXCOMM4 I2C INDEX 4 */\r
+#define FSL_FEATURE_FLEXCOMM4_I2C_INDEX (4)\r
+/* @brief FLEXCOMM4 I2S INDEX 4 */\r
+#define FSL_FEATURE_FLEXCOMM4_I2S_INDEX (4)\r
+/* @brief FLEXCOMM5 USART INDEX 5 */\r
+#define FSL_FEATURE_FLEXCOMM5_USART_INDEX (5)\r
+/* @brief FLEXCOMM5 SPI INDEX 5 */\r
+#define FSL_FEATURE_FLEXCOMM5_SPI_INDEX (5)\r
+/* @brief FLEXCOMM5 I2C INDEX 5 */\r
+#define FSL_FEATURE_FLEXCOMM5_I2C_INDEX (5)\r
+/* @brief FLEXCOMM5 I2S INDEX 5 */\r
+#define FSL_FEATURE_FLEXCOMM5_I2S_INDEX (5)\r
+/* @brief FLEXCOMM6 USART INDEX 6 */\r
+#define FSL_FEATURE_FLEXCOMM6_USART_INDEX (6)\r
+/* @brief FLEXCOMM6 SPI INDEX 6 */\r
+#define FSL_FEATURE_FLEXCOMM6_SPI_INDEX (6)\r
+/* @brief FLEXCOMM6 I2C INDEX 6 */\r
+#define FSL_FEATURE_FLEXCOMM6_I2C_INDEX (6)\r
+/* @brief FLEXCOMM6 I2S INDEX 6 */\r
+#define FSL_FEATURE_FLEXCOMM6_I2S_INDEX (6)\r
+/* @brief FLEXCOMM7 USART INDEX 7 */\r
+#define FSL_FEATURE_FLEXCOMM7_USART_INDEX (7)\r
+/* @brief FLEXCOMM7 SPI INDEX 7 */\r
+#define FSL_FEATURE_FLEXCOMM7_SPI_INDEX (7)\r
+/* @brief FLEXCOMM7 I2C INDEX 7 */\r
+#define FSL_FEATURE_FLEXCOMM7_I2C_INDEX (7)\r
+/* @brief FLEXCOMM7 I2S INDEX 7 */\r
+#define FSL_FEATURE_FLEXCOMM7_I2S_INDEX (7)\r
+/* @brief FLEXCOMM8 SPI(HS_SPI) INDEX 8 */\r
+#define FSL_FEATURE_FLEXCOMM8_SPI_INDEX (8)\r
+/* @brief I2S has DMIC interconnection */\r
+#define FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_HAS_DMIC_INTERCONNECTIONn(x) (0)\r