commit 9f316c246baafa15c542a5aea81a94f26e3d6507

[freertos] / FreeRTOS / Demo / CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso / NXP_Code / device / fsl_device_registers.h

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/fsl_device_registers.h b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/fsl_device_registers.h
index 9c55fb2415e63f15c7d15258da1dc3f855d36f14..a06db4ce52db03643f1eff57f6fd058c9ec98589 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/fsl_device_registers.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/device/fsl_device_registers.h
@@ -1,6 +1,6 @@
 /*\r
  * Copyright 2014-2016 Freescale Semiconductor, Inc.\r
- * Copyright 2016-2018 NXP\r
+ * Copyright 2016-2019 NXP\r
  * All rights reserved.\r
  *\r
  * SPDX-License-Identifier: BSD-3-Clause\r
@@ -15,7 +15,8 @@
  *\r
  * The CPU macro should be declared in the project or makefile.\r
  */\r
-#if (defined(CPU_LPC55S69JBD100_cm33_core0) || defined(CPU_LPC55S69JET98_cm33_core0))\r
+#if (defined(CPU_LPC55S69JBD100_cm33_core0) || defined(CPU_LPC55S69JBD64_cm33_core0) || \\r
+     defined(CPU_LPC55S69JEV98_cm33_core0))\r
 \r
 #define LPC55S69_cm33_core0_SERIES\r
 \r
@@ -24,7 +25,8 @@
 /* CPU specific feature definitions */\r
 #include "LPC55S69_cm33_core0_features.h"\r
 \r
-#elif (defined(CPU_LPC55S69JBD100_cm33_core1) || defined(CPU_LPC55S69JET98_cm33_core1))\r
+#elif (defined(CPU_LPC55S69JBD100_cm33_core1) || defined(CPU_LPC55S69JBD64_cm33_core1) || \\r
+       defined(CPU_LPC55S69JEV98_cm33_core1))\r
 \r
 #define LPC55S69_cm33_core1_SERIES\r
 \r
@@ -34,7 +36,7 @@
 #include "LPC55S69_cm33_core1_features.h"\r
 \r
 #else\r
-    #error "No valid CPU defined!"\r
+#error "No valid CPU defined!"\r
 #endif\r
 \r
 #endif /* __FSL_DEVICE_REGISTERS_H__ */\r