/*\r
* Copyright (c) 2015-2016, Freescale Semiconductor, Inc.\r
- * Copyright 2016-2018 NXP\r
+ * Copyright 2016-2019 NXP\r
* All rights reserved.\r
- * \r
+ *\r
* SPDX-License-Identifier: BSD-3-Clause\r
*/\r
\r
#include <stddef.h>\r
#endif\r
\r
+/*\r
+ * For CMSIS pack RTE.\r
+ * CMSIS pack RTE generates "RTC_Components.h" which contains the statements\r
+ * of the related <RTE_Components_h> element for all selected software components.\r
+ */\r
+#ifdef _RTE_\r
+#include "RTE_Components.h"\r
+#endif\r
+\r
#include "fsl_device_registers.h"\r
\r
/*!\r
\r
/*! @name Driver version */\r
/*@{*/\r
-/*! @brief common driver version 2.0.1. */\r
-#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))\r
+/*! @brief common driver version 2.2.2. */\r
+#define FSL_COMMON_DRIVER_VERSION (MAKE_VERSION(2, 2, 2))\r
/*@}*/\r
\r
/* Debug console type definition. */\r
kStatusGroup_LPC_MINISPI = 76, /*!< Group number for LPC_MINISPI status codes. */\r
kStatusGroup_HASHCRYPT = 77, /*!< Group number for Hashcrypt status codes */\r
kStatusGroup_LPC_SPI_SSP = 78, /*!< Group number for LPC_SPI_SSP status codes. */\r
+ kStatusGroup_I3C = 79, /*!< Group number for I3C status codes */\r
kStatusGroup_LPC_I2C_1 = 97, /*!< Group number for LPC_I2C_1 status codes. */\r
kStatusGroup_NOTIFIER = 98, /*!< Group number for NOTIFIER status codes. */\r
kStatusGroup_DebugConsole = 99, /*!< Group number for debug console status codes. */\r
- kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */ \r
+ kStatusGroup_SEMC = 100, /*!< Group number for SEMC status codes. */\r
kStatusGroup_ApplicationRangeStart = 101, /*!< Starting number for application groups. */\r
kStatusGroup_IAP = 102, /*!< Group number for IAP status codes */\r
\r
kStatusGroup_OSA = 143, /*!< Group number for OSA status codes. */\r
kStatusGroup_COMMON_TASK = 144, /*!< Group number for Common task status codes. */\r
kStatusGroup_MSG = 145, /*!< Group number for messaging status codes. */\r
+ kStatusGroup_SDK_OCOTP = 146, /*!< Group number for OCOTP status codes. */\r
+ kStatusGroup_SDK_FLEXSPINOR = 147, /*!< Group number for FLEXSPINOR status codes.*/\r
+ kStatusGroup_CODEC = 148, /*!< Group number for codec status codes. */\r
+ kStatusGroup_ASRC = 149, /*!< Group number for codec status ASRC. */\r
+ kStatusGroup_OTFAD = 150, /*!< Group number for codec status codes. */\r
};\r
\r
/*! @brief Generic status return codes. */\r
-enum _generic_status\r
+enum\r
{\r
kStatus_Success = MAKE_STATUS(kStatusGroup_Generic, 0),\r
kStatus_Fail = MAKE_STATUS(kStatusGroup_Generic, 1),\r
/*! @brief Type used for all status and error return values. */\r
typedef int32_t status_t;\r
\r
-/*\r
- * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t\r
- * defined in previous of this file.\r
- */\r
-#include "fsl_clock.h"\r
-\r
-/*\r
- * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral\r
- */\r
-#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \\r
- (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))\r
-#include "fsl_reset.h"\r
-#endif\r
-\r
/*\r
* Macro guard for whether to use default weak IRQ implementation in drivers\r
*/\r
/*! @name Min/max macros */\r
/* @{ */\r
#if !defined(MIN)\r
-#define MIN(a, b) ((a) < (b) ? (a) : (b))\r
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))\r
#endif\r
\r
#if !defined(MAX)\r
-#define MAX(a, b) ((a) > (b) ? (a) : (b))\r
+#define MAX(a, b) (((a) > (b)) ? (a) : (b))\r
#endif\r
/* @} */\r
\r
/*! @name Timer utilities */\r
/* @{ */\r
/*! Macro to convert a microsecond period to raw count value */\r
-#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)((uint64_t)us * clockFreqInHz / 1000000U)\r
+#define USEC_TO_COUNT(us, clockFreqInHz) (uint64_t)(((uint64_t)(us) * (clockFreqInHz)) / 1000000U)\r
/*! Macro to convert a raw count value to microsecond */\r
#define COUNT_TO_USEC(count, clockFreqInHz) (uint64_t)((uint64_t)count * 1000000U / clockFreqInHz)\r
\r
#if (defined(__ICCARM__))\r
/**\r
* Workaround to disable MISRA C message suppress warnings for IAR compiler.\r
- * http://supp.iar.com/Support/?note=24725\r
+ * http:/ /supp.iar.com/Support/?note=24725\r
*/\r
_Pragma("diag_suppress=Pm120")\r
#define SDK_PRAGMA(x) _Pragma(#x)\r
\r
/*! Macro to change a value to a given size aligned value */\r
#define SDK_SIZEALIGN(var, alignbytes) \\r
- ((unsigned int)((var) + ((alignbytes)-1)) & (unsigned int)(~(unsigned int)((alignbytes)-1)))\r
+ ((unsigned int)((var) + ((alignbytes)-1U)) & (unsigned int)(~(unsigned int)((alignbytes)-1U)))\r
/* @} */\r
\r
/*! @name Non-cacheable region definition macros */\r
#endif\r
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))\r
#if ((!(defined(FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION) && FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION)) && defined(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE))\r
-#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var\r
-#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \\r
- __attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var\r
#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var\r
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \\r
__attribute__((section("NonCacheable.init"))) __attribute__((aligned(alignbytes))) var\r
+#if(defined(__CC_ARM))\r
+#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"), zero_init)) var\r
+#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \\r
+ __attribute__((section("NonCacheable"), zero_init)) __attribute__((aligned(alignbytes))) var\r
+#else\r
+#define AT_NONCACHEABLE_SECTION(var) __attribute__((section(".bss.NonCacheable"))) var\r
+#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \\r
+ __attribute__((section(".bss.NonCacheable"))) __attribute__((aligned(alignbytes))) var\r
+#endif\r
#else\r
#define AT_NONCACHEABLE_SECTION(var) var\r
#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) __attribute__((aligned(alignbytes))) var\r
#define AT_NONCACHEABLE_SECTION_INIT(var) var\r
#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) __attribute__((aligned(alignbytes))) var\r
#endif\r
+#elif(defined(__XCC__))\r
+#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var\r
+#define AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes) \\r
+ __attribute__((section("NonCacheable.init"))) var __attribute__((aligned(alignbytes)))\r
+#define AT_NONCACHEABLE_SECTION(var) __attribute__((section("NonCacheable"))) var\r
+#define AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes) \\r
+ __attribute__((section("NonCacheable"))) var __attribute__((aligned(alignbytes)))\r
#elif(defined(__GNUC__))\r
/* For GCC, when the non-cacheable section is required, please define "__STARTUP_INITIALIZE_NONCACHEDATA"\r
* in your projects to make sure the non-cacheable section variables will be initialized in system startup.\r
#define AT_QUICKACCESS_SECTION_CODE(func) func @"CodeQuickAccess"\r
#define AT_QUICKACCESS_SECTION_DATA(func) func @"DataQuickAccess"\r
#elif(defined(__CC_ARM) || defined(__ARMCC_VERSION))\r
-#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func\r
+#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func\r
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func\r
#elif(defined(__GNUC__))\r
-#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"))) func\r
+#define AT_QUICKACCESS_SECTION_CODE(func) __attribute__((section("CodeQuickAccess"), __noinline__)) func\r
#define AT_QUICKACCESS_SECTION_DATA(func) __attribute__((section("DataQuickAccess"))) func\r
#else\r
#error Toolchain not supported.\r
#define AT_QUICKACCESS_SECTION_DATA(func) func\r
#else\r
#error Toolchain not supported.\r
-#endif \r
+#endif\r
#endif /* __FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE */\r
/* @} */\r
\r
#error Toolchain not supported.\r
#endif /* defined(__ICCARM__) */\r
/* @} */\r
+\r
+/*! @name Suppress fallthrough warning macro */\r
+/* For switch case code block, if case section ends without "break;" statement, there wil be\r
+ fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc.\r
+ To suppress this warning, "SUPPRESS_FALL_THROUGH_WARNING();" need to be added at the end of each\r
+ case section which misses "break;"statement.\r
+ */\r
+/* @{ */\r
+#if defined(__GNUC__) && !defined(__ARMCC_VERSION)\r
+#define SUPPRESS_FALL_THROUGH_WARNING() __attribute__ ((fallthrough))\r
+#else\r
+#define SUPPRESS_FALL_THROUGH_WARNING()\r
+#endif\r
+/* @} */\r
+\r
+#if defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )\r
+void DefaultISR(void);\r
+#endif\r
+/*\r
+ * The fsl_clock.h is included here because it needs MAKE_VERSION/MAKE_STATUS/status_t\r
+ * defined in previous of this file.\r
+ */\r
+#include "fsl_clock.h"\r
+\r
+/*\r
+ * Chip level peripheral reset API, for MCUs that implement peripheral reset control external to a peripheral\r
+ */\r
+#if ((defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) || \\r
+ (defined(FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT) && (FSL_FEATURE_SOC_ASYNC_SYSCON_COUNT > 0)))\r
+#include "fsl_reset.h"\r
+#endif\r
+\r
/*******************************************************************************\r
* API\r
******************************************************************************/\r
*/\r
static inline uint32_t DisableGlobalIRQ(void)\r
{\r
+#if defined (__XCC__)\r
+ return 0;\r
+#else\r
#if defined(CPSR_I_Msk)\r
uint32_t cpsr = __get_CPSR() & CPSR_I_Msk;\r
\r
__disable_irq();\r
\r
return regPrimask;\r
+#endif\r
#endif\r
}\r
\r
*/\r
static inline void EnableGlobalIRQ(uint32_t primask)\r
{\r
+#if defined (__XCC__)\r
+#else\r
#if defined(CPSR_I_Msk)\r
__set_CPSR((__get_CPSR() & ~CPSR_I_Msk) | primask);\r
#else\r
__set_PRIMASK(primask);\r
+#endif\r
#endif\r
}\r
\r
*/\r
uint32_t InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler);\r
#endif /* ENABLE_RAM_VECTOR_TABLE. */\r
- \r
+\r
#if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0))\r
/*!\r
* @brief Enable specific interrupt for wake-up from deep-sleep mode.\r
* @param size The length required to malloc.\r
* @param alignbytes The alignment size.\r
* @retval The allocated memory.\r
- */ \r
+ */\r
void *SDK_Malloc(size_t size, size_t alignbytes);\r
- \r
+\r
/*!\r
* @brief Free memory.\r
*\r
* @param ptr The memory to be release.\r
- */ \r
- void SDK_Free(void *ptr); \r
+ */\r
+ void SDK_Free(void *ptr);\r
+\r
+ /*!\r
+ * @brief Delay at least for some time.\r
+ * Please note that, this API uses while loop for delay, different run-time environments make the time not precise,\r
+ * if precise delay count was needed, please implement a new delay function with hardware timer.\r
+ *\r
+ * @param delay_us Delay time in unit of microsecond.\r
+ * @param coreClock_Hz Core clock frequency with Hz.\r
+ */\r
+ void SDK_DelayAtLeastUs(uint32_t delay_us, uint32_t coreClock_Hz);\r
\r
#if defined(__cplusplus)\r
}\r
projects / freertos / blobdiff