commit 9f316c246baafa15c542a5aea81a94f26e3d6507

[freertos] / FreeRTOS / Demo / CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso / NXP_Code / drivers / fsl_gpio.c

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.c b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.c
index 8d452a95c11cdb943500b87e74c544ffbf235532..ed74b465efee973cdc78d6770c81d8bab80c7735 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.c
@@ -1,6 +1,6 @@
 /*\r
  * Copyright (c) 2016, Freescale Semiconductor, Inc.\r
- * Copyright 2016-2018 NXP\r
+ * Copyright 2016-2019 NXP\r
  * All rights reserved.\r
  *\r
  * SPDX-License-Identifier: BSD-3-Clause\r
@@ -26,8 +26,8 @@ static const clock_ip_name_t s_gpioClockName[] = GPIO_CLOCKS;
 static const reset_ip_name_t s_gpioResets[] = GPIO_RSTS_N;\r
 #endif\r
 /*******************************************************************************\r
-* Prototypes\r
-************ ******************************************************************/\r
+ * Prototypes\r
+ ************ ******************************************************************/\r
 \r
 /*******************************************************************************\r
  * Code\r
@@ -62,13 +62,13 @@ void GPIO_PortInit(GPIO_Type *base, uint32_t port)
  *\r
  * This is an example to define an input pin or output pin configuration:\r
  * code\r
- * // Define a digital input pin configuration,\r
+ * Define a digital input pin configuration,\r
  * gpio_pin_config_t config =\r
  * {\r
  *   kGPIO_DigitalInput,\r
  *   0,\r
  * }\r
- * //Define a digital output pin configuration,\r
+ * Define a digital output pin configuration,\r
  * gpio_pin_config_t config =\r
  * {\r
  *   kGPIO_DigitalOutput,\r
@@ -86,9 +86,9 @@ void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_c
     if (config->pinDirection == kGPIO_DigitalInput)\r
     {\r
 #if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)\r
-        base->DIRCLR[port] = 1U << pin;\r
+        base->DIRCLR[port] = 1UL << pin;\r
 #else\r
-        base->DIR[port] &= ~(1U << pin);\r
+        base->DIR[port] &= ~(1UL << pin);\r
 #endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/\r
     }\r
     else\r
@@ -96,17 +96,207 @@ void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_c
         /* Set default output value */\r
         if (config->outputLogic == 0U)\r
         {\r
-            base->CLR[port] = (1U << pin);\r
+            base->CLR[port] = (1UL << pin);\r
         }\r
         else\r
         {\r
-            base->SET[port] = (1U << pin);\r
+            base->SET[port] = (1UL << pin);\r
         }\r
 /* Set pin direction */\r
 #if defined(FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR) && (FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR)\r
-        base->DIRSET[port] = 1U << pin;\r
+        base->DIRSET[port] = 1UL << pin;\r
 #else\r
-        base->DIR[port] |= 1U << pin;\r
+        base->DIR[port] |= 1UL << pin;\r
 #endif /*FSL_FEATURE_GPIO_DIRSET_AND_DIRCLR*/\r
     }\r
 }\r
+\r
+#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT\r
+/*!\r
+ * @brief Configures the gpio pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number\r
+ * @param pin GPIO pin number.\r
+ * @param config GPIO pin interrupt configuration..\r
+ */\r
+void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config)\r
+{\r
+    base->INTEDG[port] = base->INTEDG[port] | ((uint32_t)config->mode << pin);\r
+\r
+    base->INTPOL[port] = base->INTPOL[port] | ((uint32_t)config->polarity << pin);\r
+}\r
+\r
+/*!\r
+ * @brief Enables multiple pins interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port   GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)\r
+{\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        base->INTENA[port] = base->INTENA[port] | mask;\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        base->INTENB[port] = base->INTENB[port] | mask;\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+}\r
+\r
+/*!\r
+ * @brief Disables multiple pins interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port   GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)\r
+{\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        base->INTENA[port] = base->INTENA[port] & ~mask;\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        base->INTENB[port] = base->INTENB[port] & ~mask;\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+}\r
+\r
+/*!\r
+ * @brief Clears multiple pins interrupt flag. Status flags are cleared by\r
+ *        writing a 1 to the corresponding bit position.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask)\r
+{\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        base->INTSTATA[port] = mask;\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        base->INTSTATB[port] = mask;\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+}\r
+\r
+/*!\r
+ * @ Read port interrupt status.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number\r
+ * @param index GPIO interrupt number.\r
+ * @retval masked GPIO status value\r
+ */\r
+uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index)\r
+{\r
+    uint32_t status = 0U;\r
+\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        status = base->INTSTATA[port];\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        status = base->INTSTATB[port];\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+    return status;\r
+}\r
+\r
+/*!\r
+ * @brief Enables the specific pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port   GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)\r
+{\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        base->INTENA[port] = base->INTENA[port] | (1UL << pin);\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        base->INTENB[port] = base->INTENB[port] | (1UL << pin);\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+}\r
+\r
+/*!\r
+ * @brief Disables the specific pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port   GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)\r
+{\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        base->INTENA[port] = base->INTENA[port] & ~(1UL << pin);\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        base->INTENB[port] = base->INTENB[port] & ~(1UL << pin);\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+}\r
+\r
+/*!\r
+ * @brief Clears the specific pin interrupt flag. Status flags are cleared by\r
+ *        writing a 1 to the corresponding bit position.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index)\r
+{\r
+    if ((uint32_t)kGPIO_InterruptA == index)\r
+    {\r
+        base->INTSTATA[port] = 1UL << pin;\r
+    }\r
+    else if ((uint32_t)kGPIO_InterruptB == index)\r
+    {\r
+        base->INTSTATB[port] = 1UL << pin;\r
+    }\r
+    else\r
+    {\r
+        /*Should not enter here*/\r
+    }\r
+}\r
+#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */\r