commit 9f316c246baafa15c542a5aea81a94f26e3d6507

[freertos] / FreeRTOS / Demo / CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso / NXP_Code / drivers / fsl_gpio.h

diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.h b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.h
index c2505eafce437a891caa17fc84252a5caa4072f6..39dd2f488cbc467206d035617aa23bfca4c4ff09 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.h
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_gpio.h
@@ -1,6 +1,6 @@
 /*\r
  * Copyright (c) 2016, Freescale Semiconductor, Inc.\r
- * Copyright 2016-2018 NXP\r
+ * Copyright 2016-2019 NXP\r
  * All rights reserved.\r
  *\r
  * SPDX-License-Identifier: BSD-3-Clause\r
@@ -24,14 +24,14 @@
 \r
 /*! @name Driver version */\r
 /*@{*/\r
-/*! @brief LPC GPIO driver version 2.1.3. */\r
-#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 3))\r
+/*! @brief LPC GPIO driver version. */\r
+#define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 5))\r
 /*@}*/\r
 \r
 /*! @brief LPC GPIO direction definition */\r
 typedef enum _gpio_pin_direction\r
 {\r
-    kGPIO_DigitalInput = 0U,  /*!< Set current pin as digital input*/\r
+    kGPIO_DigitalInput  = 0U, /*!< Set current pin as digital input*/\r
     kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/\r
 } gpio_pin_direction_t;\r
 \r
@@ -48,6 +48,44 @@ typedef struct _gpio_pin_config
     uint8_t outputLogic; /*!< Set default output logic, no use in input */\r
 } gpio_pin_config_t;\r
 \r
+#if (defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT)\r
+#define GPIO_PIN_INT_LEVEL 0x00U\r
+#define GPIO_PIN_INT_EDGE 0x01U\r
+\r
+#define PINT_PIN_INT_HIGH_OR_RISE_TRIGGER 0x00U\r
+#define PINT_PIN_INT_LOW_OR_FALL_TRIGGER 0x01U\r
+\r
+/*! @brief GPIO Pin Interrupt enable mode */\r
+typedef enum _gpio_pin_enable_mode\r
+{\r
+    kGPIO_PinIntEnableLevel = GPIO_PIN_INT_LEVEL, /*!< Generate Pin Interrupt on level mode */\r
+    kGPIO_PinIntEnableEdge  = GPIO_PIN_INT_EDGE   /*!< Generate Pin Interrupt on edge mode */\r
+} gpio_pin_enable_mode_t;\r
+\r
+/*! @brief GPIO Pin Interrupt enable polarity */\r
+typedef enum _gpio_pin_enable_polarity\r
+{\r
+    kGPIO_PinIntEnableHighOrRise =\r
+        PINT_PIN_INT_HIGH_OR_RISE_TRIGGER, /*!< Generate Pin Interrupt on high level or rising edge */\r
+    kGPIO_PinIntEnableLowOrFall =\r
+        PINT_PIN_INT_LOW_OR_FALL_TRIGGER /*!< Generate Pin Interrupt on low level or falling edge */\r
+} gpio_pin_enable_polarity_t;\r
+\r
+/*! @brief LPC GPIO interrupt index definition */\r
+typedef enum _gpio_interrupt_index\r
+{\r
+    kGPIO_InterruptA = 0U, /*!< Set current pin as interrupt A*/\r
+    kGPIO_InterruptB = 1U, /*!< Set current pin as interrupt B*/\r
+} gpio_interrupt_index_t;\r
+\r
+/*! @brief Configures the interrupt generation condition. */\r
+typedef struct _gpio_interrupt_config\r
+{\r
+    uint8_t mode;     /* The trigger mode of GPIO interrupts */\r
+    uint8_t polarity; /* The polarity of GPIO interrupts */\r
+} gpio_interrupt_config_t;\r
+#endif\r
+\r
 /*******************************************************************************\r
  * API\r
  ******************************************************************************/\r
@@ -76,13 +114,13 @@ void GPIO_PortInit(GPIO_Type *base, uint32_t port);
  *\r
  * This is an example to define an input pin or output pin configuration:\r
  * @code\r
- * // Define a digital input pin configuration,\r
+ * Define a digital input pin configuration,\r
  * gpio_pin_config_t config =\r
  * {\r
  *   kGPIO_DigitalInput,\r
  *   0,\r
  * }\r
- * //Define a digital output pin configuration,\r
+ * Define a digital output pin configuration,\r
  * gpio_pin_config_t config =\r
  * {\r
  *   kGPIO_DigitalOutput,\r
@@ -228,6 +266,91 @@ static inline uint32_t GPIO_PortMaskedRead(GPIO_Type *base, uint32_t port)
     return (uint32_t)base->MPIN[port];\r
 }\r
 \r
+#if defined(FSL_FEATURE_GPIO_HAS_INTERRUPT) && FSL_FEATURE_GPIO_HAS_INTERRUPT\r
+/*!\r
+ * @brief Configures the gpio pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number\r
+ * @param pin GPIO pin number.\r
+ * @param config GPIO pin interrupt configuration..\r
+ */\r
+void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t port, uint32_t pin, gpio_interrupt_config_t *config);\r
+\r
+/*!\r
+ * @brief Enables multiple pins interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);\r
+\r
+/*!\r
+ * @brief Disables multiple pins interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);\r
+\r
+/*!\r
+ * @brief Clears pin interrupt flag. Status flags are cleared by\r
+ *        writing a 1 to the corresponding bit position.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port   GPIO port number.\r
+ * @param index GPIO interrupt number.\r
+ * @param mask GPIO pin number macro.\r
+ */\r
+void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t port, uint32_t index, uint32_t mask);\r
+\r
+/*!\r
+ * @ Read port interrupt status.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number\r
+ * @param index GPIO interrupt number.\r
+ * @retval masked GPIO status value\r
+ */\r
+uint32_t GPIO_PortGetInterruptStatus(GPIO_Type *base, uint32_t port, uint32_t index);\r
+\r
+/*!\r
+ * @brief Enables the specific pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinEnableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);\r
+\r
+/*!\r
+ * @brief Disables the specific pin interrupt.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinDisableInterrupt(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);\r
+\r
+/*!\r
+ * @brief Clears the specific pin interrupt flag. Status flags are cleared by\r
+ *        writing a 1 to the corresponding bit position.\r
+ *\r
+ * @param base GPIO base pointer.\r
+ * @param port GPIO port number.\r
+ * @param pin GPIO pin number.\r
+ * @param index GPIO interrupt number.\r
+ */\r
+void GPIO_PinClearInterruptFlag(GPIO_Type *base, uint32_t port, uint32_t pin, uint32_t index);\r
+\r
+#endif /* FSL_FEATURE_GPIO_HAS_INTERRUPT */\r
+\r
 /*@}*/\r
 \r
 #if defined(__cplusplus)\r