Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is

[freertos] / FreeRTOS / Demo / CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil / Projects / IAR / stm32l475xx_flash.icf

diff --git a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/stm32l475xx_flash.icf b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/stm32l475xx_flash.icf
new file mode 100644 (file)
index 0000000..90a1e1e
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/stm32l475xx_flash.icf
@@ -0,0 +1,96 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/\r
+/*-Editor annotation file-*/\r
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */\r
+/*-Specials-*/\r
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;\r
+/*-Memory Regions-*/\r
+define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;\r
+define symbol __ICFEDIT_region_ROM_end__      = 0x080FFFFF;\r
+define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;\r
+define symbol __ICFEDIT_region_RAM_end__      = 0x20017FFF;\r
+\r
+/*-Sizes-*/\r
+define symbol __ICFEDIT_size_cstack__ = 0x400;\r
+define symbol __ICFEDIT_size_heap__ = 0x200;\r
+/**** End of ICF editor section. ###ICF###*/\r
+\r
+/* Flash Organization\r
+ *  1. Privileged Code:\r
+ *      Start   : 0x08000000\r
+ *      End     : 0x08007FFF\r
+ *      Size    : 32 Kbytes\r
+ *  2. System calls:\r
+ *      Start   : 0x08008000\r
+ *      End     : 0x08008FFF\r
+ *      Size    : 4 Kbytes\r
+ *  3. Unprivileged Code:\r
+ *      Start   : 0x08009000\r
+ *      End     : 0x080FFFFF\r
+ *      Size    : 988 Kbytes\r
+ */\r
+define symbol __reigon_ROM_privileged_start__   = __ICFEDIT_region_ROM_start__;\r
+define symbol __reigon_ROM_privileged_end__     = 0x08007FFF;\r
+define symbol __reigon_ROM_system_calls_start__ = 0x08008000;\r
+define symbol __reigon_ROM_system_calls_end__   = 0x08008FFF;\r
+define symbol __reigon_ROM_unprivileged_start__ = 0x08009000;\r
+define symbol __reigon_ROM_unprivileged_end__   = __ICFEDIT_region_ROM_end__;\r
+\r
+/* RAM Organization\r
+ *  1. Privileged Data:\r
+ *      Start   : 0x20000000\r
+ *      End     : 0x200003FF\r
+ *      Size    : 1 Kbytes\r
+ *  2. Unprivileged Data:\r
+ *      Start   : 0x20000400\r
+ *      End     : 0x20017FFF\r
+ *      Size    : 95 Kbytes\r
+ */\r
+define symbol __region_RAM_privileged_start__   = __ICFEDIT_region_RAM_start__;\r
+define symbol __region_RAM_privileged_end__     = 0x200003FF;\r
+define symbol __region_RAM_unprivileged_start__ = 0x20000400;\r
+define symbol __region_RAM_unprivileged_end__   = __ICFEDIT_region_RAM_end__;\r
+define symbol __region_SRAM2_start__            = 0x10000000;\r
+define symbol __region_SRAM2_end__              = 0x10007FFF;\r
+\r
+/* Memory regions. */\r
+define memory mem with size = 4G;\r
+define region ROM_region_privileged     = mem:[from __reigon_ROM_privileged_start__ to __reigon_ROM_privileged_end__];\r
+define region ROM_region_system_calls   = mem:[from __reigon_ROM_system_calls_start__ to __reigon_ROM_system_calls_end__];\r
+define region ROM_region_unprivileged   = mem:[from __reigon_ROM_unprivileged_start__ to __reigon_ROM_unprivileged_end__];\r
+define region RAM_region_privileged     = mem:[from __region_RAM_privileged_start__   to __region_RAM_privileged_end__];\r
+define region RAM_region_unprivileged   = mem:[from __region_RAM_unprivileged_start__   to __region_RAM_unprivileged_end__];\r
+define region SRAM2_region              = mem:[from __region_SRAM2_start__   to __region_SRAM2_end__];\r
+\r
+/* Stack and Heap. */\r
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };\r
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };\r
+\r
+/* Initialization. */\r
+initialize by copy { readwrite };\r
+do not initialize  { section .noinit };\r
+\r
+/* Exported symbols. */\r
+define exported symbol __FLASH_segment_start__          = __ICFEDIT_region_ROM_start__;\r
+define exported symbol __FLASH_segment_end__            = __ICFEDIT_region_ROM_end__;\r
+define exported symbol __SRAM_segment_start__           = __ICFEDIT_region_RAM_start__;\r
+define exported symbol __SRAM_segment_end__             = __ICFEDIT_region_RAM_end__;\r
+\r
+define exported symbol __privileged_functions_start__   = __reigon_ROM_privileged_start__;\r
+define exported symbol __privileged_functions_end__     = __reigon_ROM_privileged_end__;\r
+define exported symbol __privileged_data_start__        = __region_RAM_privileged_start__;\r
+define exported symbol __privileged_data_end__          = __region_RAM_privileged_end__;\r
+\r
+define exported symbol __syscalls_flash_start__         = __reigon_ROM_system_calls_start__;\r
+define exported symbol __syscalls_flash_end__           = __reigon_ROM_system_calls_end__;\r
+\r
+/* Placements. */\r
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };\r
+\r
+place in ROM_region_privileged      { readonly section privileged_functions };\r
+place in ROM_region_system_calls    { readonly section freertos_system_calls };\r
+place in ROM_region_unprivileged    { readonly };\r
+\r
+place in RAM_region_privileged      { readwrite section privileged_data };\r
+place in RAM_region_unprivileged    { readwrite,\r
+                                      block CSTACK, block HEAP }; \r
+place in SRAM2_region               { };\r