]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube/Projects/STM32Cube/Startup/startup_stm32l475vgtx.s
Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is
[freertos] / FreeRTOS / Demo / CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube / Projects / STM32Cube / Startup / startup_stm32l475vgtx.s
diff --git a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube/Projects/STM32Cube/Startup/startup_stm32l475vgtx.s b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube/Projects/STM32Cube/Startup/startup_stm32l475vgtx.s
deleted file mode 100644 (file)
index 9e2b0ff..0000000
+++ /dev/null
@@ -1,505 +0,0 @@
-/**\r
-  ******************************************************************************\r
-  * @file      startup_stm32l475xx.s\r
-  * @author    MCD Application Team\r
-  * @brief     STM32L475xx devices vector table for GCC toolchain.\r
-  *            This module performs:\r
-  *                - Set the initial SP\r
-  *                - Set the initial PC == Reset_Handler,\r
-  *                - Set the vector table entries with the exceptions ISR address,\r
-  *                - Configure the clock system  \r
-  *                - Branches to main in the C library (which eventually\r
-  *                  calls main()).\r
-  *            After Reset the Cortex-M4 processor is in Thread mode,\r
-  *            priority is Privileged, and the Stack is set to Main.\r
-  ******************************************************************************\r
-  * @attention\r
-  *\r
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.\r
-  * All rights reserved.</center></h2>\r
-  *\r
-  * This software component is licensed by ST under BSD 3-Clause license,\r
-  * the "License"; You may not use this file except in compliance with the\r
-  * License. You may obtain a copy of the License at:\r
-  *                        opensource.org/licenses/BSD-3-Clause\r
-  *\r
-  ******************************************************************************\r
-  */\r
-\r
-  .syntax unified\r
-       .cpu cortex-m4\r
-       .fpu softvfp\r
-       .thumb\r
-\r
-.global        g_pfnVectors\r
-.global        Default_Handler\r
-\r
-/* start address for the initialization values of the .data section.\r
-defined in linker script */\r
-.word  _sidata\r
-/* start address for the .data section. defined in linker script */\r
-.word  _sdata\r
-/* end address for the .data section. defined in linker script */\r
-.word  _edata\r
-/* start address for the .bss section. defined in linker script */\r
-.word  _sbss\r
-/* end address for the .bss section. defined in linker script */\r
-.word  _ebss\r
-\r
-.equ  BootRAM,        0xF1E0F85F\r
-/**\r
- * @brief  This is the code that gets called when the processor first\r
- *          starts execution following a reset event. Only the absolutely\r
- *          necessary set is performed, after which the application\r
- *          supplied main() routine is called.\r
- * @param  None\r
- * @retval : None\r
-*/\r
-\r
-    .section   .text.Reset_Handler\r
-       .weak   Reset_Handler\r
-       .type   Reset_Handler, %function\r
-Reset_Handler:\r
-  ldr   sp, =_estack    /* Atollic update: set stack pointer */\r
-\r
-/* Copy the data segment initializers from flash to SRAM */\r
-  movs r1, #0\r
-  b    LoopCopyDataInit\r
-\r
-CopyDataInit:\r
-       ldr     r3, =_sidata\r
-       ldr     r3, [r3, r1]\r
-       str     r3, [r0, r1]\r
-       adds    r1, r1, #4\r
-\r
-LoopCopyDataInit:\r
-       ldr     r0, =_sdata\r
-       ldr     r3, =_edata\r
-       adds    r2, r0, r1\r
-       cmp     r2, r3\r
-       bcc     CopyDataInit\r
-       ldr     r2, =_sbss\r
-       b       LoopFillZerobss\r
-/* Zero fill the bss segment. */\r
-FillZerobss:\r
-       movs    r3, #0\r
-       str     r3, [r2], #4\r
-\r
-LoopFillZerobss:\r
-       ldr     r3, = _ebss\r
-       cmp     r2, r3\r
-       bcc     FillZerobss\r
-\r
-/* Call the clock system intitialization function.*/\r
-    bl  SystemInit\r
-/* Call static constructors */\r
-    bl __libc_init_array\r
-/* Call the application's entry point.*/\r
-       bl      main\r
-\r
-LoopForever:\r
-    b LoopForever\r
-    \r
-.size  Reset_Handler, .-Reset_Handler\r
-\r
-/**\r
- * @brief  This is the code that gets called when the processor receives an\r
- *         unexpected interrupt.  This simply enters an infinite loop, preserving\r
- *         the system state for examination by a debugger.\r
- *\r
- * @param  None\r
- * @retval : None\r
-*/\r
-    .section   .text.Default_Handler,"ax",%progbits\r
-Default_Handler:\r
-Infinite_Loop:\r
-       b       Infinite_Loop\r
-       .size   Default_Handler, .-Default_Handler\r
-/******************************************************************************\r
-*\r
-* The minimal vector table for a Cortex-M4.  Note that the proper constructs\r
-* must be placed on this to ensure that it ends up at physical address\r
-* 0x0000.0000.\r
-*\r
-******************************************************************************/\r
-       .section        .isr_vector,"a",%progbits\r
-       .type   g_pfnVectors, %object\r
-       .size   g_pfnVectors, .-g_pfnVectors\r
-\r
-\r
-g_pfnVectors:\r
-       .word   _estack\r
-       .word   Reset_Handler\r
-       .word   NMI_Handler\r
-       .word   HardFault_Handler\r
-       .word   MemManage_Handler\r
-       .word   BusFault_Handler\r
-       .word   UsageFault_Handler\r
-       .word   0\r
-       .word   0\r
-       .word   0\r
-       .word   0\r
-       .word   SVC_Handler\r
-       .word   DebugMon_Handler\r
-       .word   0\r
-       .word   PendSV_Handler\r
-       .word   SysTick_Handler\r
-       .word   WWDG_IRQHandler\r
-       .word   PVD_PVM_IRQHandler\r
-       .word   TAMP_STAMP_IRQHandler\r
-       .word   RTC_WKUP_IRQHandler\r
-       .word   FLASH_IRQHandler\r
-       .word   RCC_IRQHandler\r
-       .word   EXTI0_IRQHandler\r
-       .word   EXTI1_IRQHandler\r
-       .word   EXTI2_IRQHandler\r
-       .word   EXTI3_IRQHandler\r
-       .word   EXTI4_IRQHandler\r
-       .word   DMA1_Channel1_IRQHandler\r
-       .word   DMA1_Channel2_IRQHandler\r
-       .word   DMA1_Channel3_IRQHandler\r
-       .word   DMA1_Channel4_IRQHandler\r
-       .word   DMA1_Channel5_IRQHandler\r
-       .word   DMA1_Channel6_IRQHandler\r
-       .word   DMA1_Channel7_IRQHandler\r
-       .word   ADC1_2_IRQHandler\r
-       .word   CAN1_TX_IRQHandler\r
-       .word   CAN1_RX0_IRQHandler\r
-       .word   CAN1_RX1_IRQHandler\r
-       .word   CAN1_SCE_IRQHandler\r
-       .word   EXTI9_5_IRQHandler\r
-       .word   TIM1_BRK_TIM15_IRQHandler\r
-       .word   TIM1_UP_TIM16_IRQHandler\r
-       .word   TIM1_TRG_COM_TIM17_IRQHandler\r
-       .word   TIM1_CC_IRQHandler\r
-       .word   TIM2_IRQHandler\r
-       .word   TIM3_IRQHandler\r
-       .word   TIM4_IRQHandler\r
-       .word   I2C1_EV_IRQHandler\r
-       .word   I2C1_ER_IRQHandler\r
-       .word   I2C2_EV_IRQHandler\r
-       .word   I2C2_ER_IRQHandler\r
-       .word   SPI1_IRQHandler\r
-       .word   SPI2_IRQHandler\r
-       .word   USART1_IRQHandler\r
-       .word   USART2_IRQHandler\r
-       .word   USART3_IRQHandler\r
-       .word   EXTI15_10_IRQHandler\r
-       .word   RTC_Alarm_IRQHandler\r
-       .word   DFSDM1_FLT3_IRQHandler\r
-       .word   TIM8_BRK_IRQHandler\r
-       .word   TIM8_UP_IRQHandler\r
-       .word   TIM8_TRG_COM_IRQHandler\r
-       .word   TIM8_CC_IRQHandler\r
-       .word   ADC3_IRQHandler\r
-       .word   FMC_IRQHandler\r
-       .word   SDMMC1_IRQHandler\r
-       .word   TIM5_IRQHandler\r
-       .word   SPI3_IRQHandler\r
-       .word   UART4_IRQHandler\r
-       .word   UART5_IRQHandler\r
-       .word   TIM6_DAC_IRQHandler\r
-       .word   TIM7_IRQHandler\r
-       .word   DMA2_Channel1_IRQHandler\r
-       .word   DMA2_Channel2_IRQHandler\r
-       .word   DMA2_Channel3_IRQHandler\r
-       .word   DMA2_Channel4_IRQHandler\r
-       .word   DMA2_Channel5_IRQHandler\r
-       .word   DFSDM1_FLT0_IRQHandler\r
-       .word   DFSDM1_FLT1_IRQHandler\r
-       .word   DFSDM1_FLT2_IRQHandler\r
-       .word   COMP_IRQHandler\r
-       .word   LPTIM1_IRQHandler\r
-       .word   LPTIM2_IRQHandler\r
-       .word   OTG_FS_IRQHandler\r
-       .word   DMA2_Channel6_IRQHandler\r
-       .word   DMA2_Channel7_IRQHandler\r
-       .word   LPUART1_IRQHandler\r
-       .word   QUADSPI_IRQHandler\r
-       .word   I2C3_EV_IRQHandler\r
-       .word   I2C3_ER_IRQHandler\r
-       .word   SAI1_IRQHandler\r
-       .word   SAI2_IRQHandler\r
-       .word   SWPMI1_IRQHandler\r
-       .word   TSC_IRQHandler\r
-       .word 0\r
-       .word 0\r
-       .word   RNG_IRQHandler\r
-       .word   FPU_IRQHandler\r
-\r
-\r
-/*******************************************************************************\r
-*\r
-* Provide weak aliases for each Exception handler to the Default_Handler.\r
-* As they are weak aliases, any function with the same name will override\r
-* this definition.\r
-*\r
-*******************************************************************************/\r
-\r
-  .weak        NMI_Handler\r
-       .thumb_set NMI_Handler,Default_Handler\r
-\r
-  .weak        HardFault_Handler\r
-       .thumb_set HardFault_Handler,Default_Handler\r
-\r
-  .weak        MemManage_Handler\r
-       .thumb_set MemManage_Handler,Default_Handler\r
-\r
-  .weak        BusFault_Handler\r
-       .thumb_set BusFault_Handler,Default_Handler\r
-\r
-       .weak   UsageFault_Handler\r
-       .thumb_set UsageFault_Handler,Default_Handler\r
-\r
-       .weak   SVC_Handler\r
-       .thumb_set SVC_Handler,Default_Handler\r
-\r
-       .weak   DebugMon_Handler\r
-       .thumb_set DebugMon_Handler,Default_Handler\r
-\r
-       .weak   PendSV_Handler\r
-       .thumb_set PendSV_Handler,Default_Handler\r
-\r
-       .weak   SysTick_Handler\r
-       .thumb_set SysTick_Handler,Default_Handler\r
-\r
-       .weak   WWDG_IRQHandler\r
-       .thumb_set WWDG_IRQHandler,Default_Handler\r
-\r
-       .weak   PVD_PVM_IRQHandler\r
-       .thumb_set PVD_PVM_IRQHandler,Default_Handler\r
-\r
-       .weak   TAMP_STAMP_IRQHandler\r
-       .thumb_set TAMP_STAMP_IRQHandler,Default_Handler\r
-\r
-       .weak   RTC_WKUP_IRQHandler\r
-       .thumb_set RTC_WKUP_IRQHandler,Default_Handler\r
-\r
-       .weak   FLASH_IRQHandler\r
-       .thumb_set FLASH_IRQHandler,Default_Handler\r
-\r
-       .weak   RCC_IRQHandler\r
-       .thumb_set RCC_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI0_IRQHandler\r
-       .thumb_set EXTI0_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI1_IRQHandler\r
-       .thumb_set EXTI1_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI2_IRQHandler\r
-       .thumb_set EXTI2_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI3_IRQHandler\r
-       .thumb_set EXTI3_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI4_IRQHandler\r
-       .thumb_set EXTI4_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel1_IRQHandler\r
-       .thumb_set DMA1_Channel1_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel2_IRQHandler\r
-       .thumb_set DMA1_Channel2_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel3_IRQHandler\r
-       .thumb_set DMA1_Channel3_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel4_IRQHandler\r
-       .thumb_set DMA1_Channel4_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel5_IRQHandler\r
-       .thumb_set DMA1_Channel5_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel6_IRQHandler\r
-       .thumb_set DMA1_Channel6_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA1_Channel7_IRQHandler\r
-       .thumb_set DMA1_Channel7_IRQHandler,Default_Handler\r
-\r
-       .weak   ADC1_2_IRQHandler\r
-       .thumb_set ADC1_2_IRQHandler,Default_Handler\r
-\r
-       .weak   CAN1_TX_IRQHandler\r
-       .thumb_set CAN1_TX_IRQHandler,Default_Handler\r
-\r
-       .weak   CAN1_RX0_IRQHandler\r
-       .thumb_set CAN1_RX0_IRQHandler,Default_Handler\r
-\r
-       .weak   CAN1_RX1_IRQHandler\r
-       .thumb_set CAN1_RX1_IRQHandler,Default_Handler\r
-\r
-       .weak   CAN1_SCE_IRQHandler\r
-       .thumb_set CAN1_SCE_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI9_5_IRQHandler\r
-       .thumb_set EXTI9_5_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM1_BRK_TIM15_IRQHandler\r
-       .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM1_UP_TIM16_IRQHandler\r
-       .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM1_TRG_COM_TIM17_IRQHandler\r
-       .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM1_CC_IRQHandler\r
-       .thumb_set TIM1_CC_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM2_IRQHandler\r
-       .thumb_set TIM2_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM3_IRQHandler\r
-       .thumb_set TIM3_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM4_IRQHandler\r
-       .thumb_set TIM4_IRQHandler,Default_Handler\r
-\r
-       .weak   I2C1_EV_IRQHandler\r
-       .thumb_set I2C1_EV_IRQHandler,Default_Handler\r
-\r
-       .weak   I2C1_ER_IRQHandler\r
-       .thumb_set I2C1_ER_IRQHandler,Default_Handler\r
-\r
-       .weak   I2C2_EV_IRQHandler\r
-       .thumb_set I2C2_EV_IRQHandler,Default_Handler\r
-\r
-       .weak   I2C2_ER_IRQHandler\r
-       .thumb_set I2C2_ER_IRQHandler,Default_Handler\r
-\r
-       .weak   SPI1_IRQHandler\r
-       .thumb_set SPI1_IRQHandler,Default_Handler\r
-\r
-       .weak   SPI2_IRQHandler\r
-       .thumb_set SPI2_IRQHandler,Default_Handler\r
-\r
-       .weak   USART1_IRQHandler\r
-       .thumb_set USART1_IRQHandler,Default_Handler\r
-\r
-       .weak   USART2_IRQHandler\r
-       .thumb_set USART2_IRQHandler,Default_Handler\r
-\r
-       .weak   USART3_IRQHandler\r
-       .thumb_set USART3_IRQHandler,Default_Handler\r
-\r
-       .weak   EXTI15_10_IRQHandler\r
-       .thumb_set EXTI15_10_IRQHandler,Default_Handler\r
-\r
-       .weak   RTC_Alarm_IRQHandler\r
-       .thumb_set RTC_Alarm_IRQHandler,Default_Handler\r
-\r
-       .weak   DFSDM1_FLT3_IRQHandler\r
-       .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM8_BRK_IRQHandler\r
-       .thumb_set TIM8_BRK_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM8_UP_IRQHandler\r
-       .thumb_set TIM8_UP_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM8_TRG_COM_IRQHandler\r
-       .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM8_CC_IRQHandler\r
-       .thumb_set TIM8_CC_IRQHandler,Default_Handler\r
-\r
-       .weak   ADC3_IRQHandler\r
-       .thumb_set ADC3_IRQHandler,Default_Handler\r
-\r
-       .weak   FMC_IRQHandler\r
-       .thumb_set FMC_IRQHandler,Default_Handler\r
-\r
-       .weak   SDMMC1_IRQHandler\r
-       .thumb_set SDMMC1_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM5_IRQHandler\r
-       .thumb_set TIM5_IRQHandler,Default_Handler\r
-\r
-       .weak   SPI3_IRQHandler\r
-       .thumb_set SPI3_IRQHandler,Default_Handler\r
-\r
-       .weak   UART4_IRQHandler\r
-       .thumb_set UART4_IRQHandler,Default_Handler\r
-\r
-       .weak   UART5_IRQHandler\r
-       .thumb_set UART5_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM6_DAC_IRQHandler\r
-       .thumb_set TIM6_DAC_IRQHandler,Default_Handler\r
-\r
-       .weak   TIM7_IRQHandler\r
-       .thumb_set TIM7_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA2_Channel1_IRQHandler\r
-       .thumb_set DMA2_Channel1_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA2_Channel2_IRQHandler\r
-       .thumb_set DMA2_Channel2_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA2_Channel3_IRQHandler\r
-       .thumb_set DMA2_Channel3_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA2_Channel4_IRQHandler\r
-       .thumb_set DMA2_Channel4_IRQHandler,Default_Handler\r
-\r
-       .weak   DMA2_Channel5_IRQHandler\r
-       .thumb_set DMA2_Channel5_IRQHandler,Default_Handler\r
-\r
-       .weak   DFSDM1_FLT0_IRQHandler\r
-       .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler       \r
-       \r
-       .weak   DFSDM1_FLT1_IRQHandler\r
-       .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler       \r
-       \r
-       .weak   DFSDM1_FLT2_IRQHandler\r
-       .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler       \r
-       \r
-       .weak   COMP_IRQHandler\r
-       .thumb_set COMP_IRQHandler,Default_Handler\r
-       \r
-       .weak   LPTIM1_IRQHandler\r
-       .thumb_set LPTIM1_IRQHandler,Default_Handler\r
-       \r
-       .weak   LPTIM2_IRQHandler\r
-       .thumb_set LPTIM2_IRQHandler,Default_Handler    \r
-       \r
-       .weak   OTG_FS_IRQHandler\r
-       .thumb_set OTG_FS_IRQHandler,Default_Handler    \r
-       \r
-       .weak   DMA2_Channel6_IRQHandler\r
-       .thumb_set DMA2_Channel6_IRQHandler,Default_Handler     \r
-       \r
-       .weak   DMA2_Channel7_IRQHandler\r
-       .thumb_set DMA2_Channel7_IRQHandler,Default_Handler     \r
-       \r
-       .weak   LPUART1_IRQHandler\r
-       .thumb_set LPUART1_IRQHandler,Default_Handler   \r
-       \r
-       .weak   QUADSPI_IRQHandler\r
-       .thumb_set QUADSPI_IRQHandler,Default_Handler   \r
-       \r
-       .weak   I2C3_EV_IRQHandler\r
-       .thumb_set I2C3_EV_IRQHandler,Default_Handler   \r
-       \r
-       .weak   I2C3_ER_IRQHandler\r
-       .thumb_set I2C3_ER_IRQHandler,Default_Handler   \r
-       \r
-       .weak   SAI1_IRQHandler\r
-       .thumb_set SAI1_IRQHandler,Default_Handler\r
-       \r
-       .weak   SAI2_IRQHandler\r
-       .thumb_set SAI2_IRQHandler,Default_Handler\r
-       \r
-       .weak   SWPMI1_IRQHandler\r
-       .thumb_set SWPMI1_IRQHandler,Default_Handler\r
-       \r
-       .weak   TSC_IRQHandler\r
-       .thumb_set TSC_IRQHandler,Default_Handler\r
-       \r
-       .weak   RNG_IRQHandler\r
-       .thumb_set RNG_IRQHandler,Default_Handler\r
-       \r
-       .weak   FPU_IRQHandler\r
-       .thumb_set FPU_IRQHandler,Default_Handler\r
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r