+++ /dev/null
-/**\r
- ******************************************************************************\r
- * @file stm32l4xx_hal_i2c.c\r
- * @author MCD Application Team\r
- * @brief I2C HAL module driver.\r
- * This file provides firmware functions to manage the following\r
- * functionalities of the Inter Integrated Circuit (I2C) peripheral:\r
- * + Initialization and de-initialization functions\r
- * + IO operation functions\r
- * + Peripheral State and Errors functions\r
- *\r
- @verbatim\r
- ==============================================================================\r
- ##### How to use this driver #####\r
- ==============================================================================\r
- [..]\r
- The I2C HAL driver can be used as follows:\r
-\r
- (#) Declare a I2C_HandleTypeDef handle structure, for example:\r
- I2C_HandleTypeDef hi2c;\r
-\r
- (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API:\r
- (##) Enable the I2Cx interface clock\r
- (##) I2C pins configuration\r
- (+++) Enable the clock for the I2C GPIOs\r
- (+++) Configure I2C pins as alternate function open-drain\r
- (##) NVIC configuration if you need to use interrupt process\r
- (+++) Configure the I2Cx interrupt priority\r
- (+++) Enable the NVIC I2C IRQ Channel\r
- (##) DMA Configuration if you need to use DMA process\r
- (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel\r
- (+++) Enable the DMAx interface clock using\r
- (+++) Configure the DMA handle parameters\r
- (+++) Configure the DMA Tx or Rx channel\r
- (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle\r
- (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on\r
- the DMA Tx or Rx channel\r
-\r
- (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode,\r
- Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure.\r
-\r
- (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware\r
- (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit(&hi2c) API.\r
-\r
- (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady()\r
-\r
- (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :\r
-\r
- *** Polling mode IO operation ***\r
- =================================\r
- [..]\r
- (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit()\r
- (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive()\r
- (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit()\r
- (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive()\r
-\r
- *** Polling mode IO MEM operation ***\r
- =====================================\r
- [..]\r
- (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write()\r
- (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read()\r
-\r
-\r
- *** Interrupt mode IO operation ***\r
- ===================================\r
- [..]\r
- (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT()\r
- (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()\r
- (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT()\r
- (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()\r
- (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT()\r
- (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()\r
- (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT()\r
- (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()\r
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()\r
- (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()\r
- (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()\r
- (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro.\r
- This action will inform Master to generate a Stop condition to discard the communication.\r
-\r
-\r
- *** Interrupt mode or DMA mode IO sequential operation ***\r
- ==========================================================\r
- [..]\r
- (@) These interfaces allow to manage a sequential transfer with a repeated start condition\r
- when a direction change during transfer\r
- [..]\r
- (+) A specific option field manage the different steps of a sequential transfer\r
- (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:\r
- (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode\r
- (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address\r
- and data to transfer without a final stop condition\r
- (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address\r
- and data to transfer without a final stop condition, an then permit a call the same master sequential interface\r
- several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()\r
- or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_Transmit_DMA())\r
- (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address\r
- and with new data to transfer if the direction change or manage only the new data to transfer\r
- if no direction change and without a final stop condition in both cases\r
- (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address\r
- and with new data to transfer if the direction change or manage only the new data to transfer\r
- if no direction change and with a final stop condition in both cases\r
- (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential\r
- interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).\r
- Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)\r
- or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)\r
- or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)\r
- or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).\r
- Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the oposite interface Receive or Transmit\r
- without stopping the communication and so generate a restart condition.\r
- (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential\r
- interface.\r
- Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)\r
- or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)\r
- or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)\r
- or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).\r
- Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.\r
-\r
- (+) Differents sequential I2C interfaces are listed below:\r
- (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()\r
- or using @ref HAL_I2C_Master_Seq_Transmit_DMA()\r
- (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()\r
- (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()\r
- or using @ref HAL_I2C_Master_Seq_Receive_DMA()\r
- (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()\r
- (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()\r
- (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()\r
- (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT()\r
- (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can\r
- add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).\r
- (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback()\r
- (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT()\r
- or using @ref HAL_I2C_Slave_Seq_Transmit_DMA()\r
- (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()\r
- (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT()\r
- or using @ref HAL_I2C_Slave_Seq_Receive_DMA()\r
- (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()\r
- (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()\r
- (++) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro.\r
- This action will inform Master to generate a Stop condition to discard the communication.\r
-\r
- *** Interrupt mode IO MEM operation ***\r
- =======================================\r
- [..]\r
- (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using\r
- @ref HAL_I2C_Mem_Write_IT()\r
- (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()\r
- (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using\r
- @ref HAL_I2C_Mem_Read_IT()\r
- (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()\r
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()\r
-\r
- *** DMA mode IO operation ***\r
- ==============================\r
- [..]\r
- (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using\r
- @ref HAL_I2C_Master_Transmit_DMA()\r
- (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()\r
- (+) Receive in master mode an amount of data in non-blocking mode (DMA) using\r
- @ref HAL_I2C_Master_Receive_DMA()\r
- (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()\r
- (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using\r
- @ref HAL_I2C_Slave_Transmit_DMA()\r
- (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()\r
- (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using\r
- @ref HAL_I2C_Slave_Receive_DMA()\r
- (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()\r
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()\r
- (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()\r
- (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()\r
- (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro.\r
- This action will inform Master to generate a Stop condition to discard the communication.\r
-\r
- *** DMA mode IO MEM operation ***\r
- =================================\r
- [..]\r
- (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using\r
- @ref HAL_I2C_Mem_Write_DMA()\r
- (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()\r
- (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using\r
- @ref HAL_I2C_Mem_Read_DMA()\r
- (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()\r
- (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can\r
- add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()\r
-\r
-\r
- *** I2C HAL driver macros list ***\r
- ==================================\r
- [..]\r
- Below the list of most used macros in I2C HAL driver.\r
-\r
- (+) @ref __HAL_I2C_ENABLE: Enable the I2C peripheral\r
- (+) @ref __HAL_I2C_DISABLE: Disable the I2C peripheral\r
- (+) @ref __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode\r
- (+) @ref __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not\r
- (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag\r
- (+) @ref __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt\r
- (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt\r
-\r
- *** Callback registration ***\r
- =============================================\r
- [..]\r
- The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1\r
- allows the user to configure dynamically the driver callbacks.\r
- Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()\r
- to register an interrupt callback.\r
- [..]\r
- Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:\r
- (+) MasterTxCpltCallback : callback for Master transmission end of transfer.\r
- (+) MasterRxCpltCallback : callback for Master reception end of transfer.\r
- (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.\r
- (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.\r
- (+) ListenCpltCallback : callback for end of listen mode.\r
- (+) MemTxCpltCallback : callback for Memory transmission end of transfer.\r
- (+) MemRxCpltCallback : callback for Memory reception end of transfer.\r
- (+) ErrorCallback : callback for error detection.\r
- (+) AbortCpltCallback : callback for abort completion process.\r
- (+) MspInitCallback : callback for Msp Init.\r
- (+) MspDeInitCallback : callback for Msp DeInit.\r
- This function takes as parameters the HAL peripheral handle, the Callback ID\r
- and a pointer to the user callback function.\r
- [..]\r
- For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().\r
- [..]\r
- Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default\r
- weak function.\r
- @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,\r
- and the Callback ID.\r
- This function allows to reset following callbacks:\r
- (+) MasterTxCpltCallback : callback for Master transmission end of transfer.\r
- (+) MasterRxCpltCallback : callback for Master reception end of transfer.\r
- (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.\r
- (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.\r
- (+) ListenCpltCallback : callback for end of listen mode.\r
- (+) MemTxCpltCallback : callback for Memory transmission end of transfer.\r
- (+) MemRxCpltCallback : callback for Memory reception end of transfer.\r
- (+) ErrorCallback : callback for error detection.\r
- (+) AbortCpltCallback : callback for abort completion process.\r
- (+) MspInitCallback : callback for Msp Init.\r
- (+) MspDeInitCallback : callback for Msp DeInit.\r
- [..]\r
- For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().\r
- [..]\r
- By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET\r
- all callbacks are set to the corresponding weak functions:\r
- examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().\r
- Exception done for MspInit and MspDeInit functions that are\r
- reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when\r
- these callbacks are null (not registered beforehand).\r
- If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()\r
- keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.\r
- [..]\r
- Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.\r
- Exception done MspInit/MspDeInit functions that can be registered/unregistered\r
- in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,\r
- thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.\r
- Then, the user first registers the MspInit/MspDeInit user callbacks\r
- using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()\r
- or @ref HAL_I2C_Init() function.\r
- [..]\r
- When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or\r
- not defined, the callback registration feature is not available and all callbacks\r
- are set to the corresponding weak functions.\r
-\r
- [..]\r
- (@) You can refer to the I2C HAL driver header file for more useful macros\r
-\r
- @endverbatim\r
- ******************************************************************************\r
- * @attention\r
- *\r
- * <h2><center>© Copyright (c) 2017 STMicroelectronics.\r
- * All rights reserved.</center></h2>\r
- *\r
- * This software component is licensed by ST under BSD 3-Clause license,\r
- * the "License"; You may not use this file except in compliance with the\r
- * License. You may obtain a copy of the License at:\r
- * opensource.org/licenses/BSD-3-Clause\r
- *\r
- ******************************************************************************\r
- */\r
-\r
-/* Includes ------------------------------------------------------------------*/\r
-#include "stm32l4xx_hal.h"\r
-\r
-/** @addtogroup STM32L4xx_HAL_Driver\r
- * @{\r
- */\r
-\r
-/** @defgroup I2C I2C\r
- * @brief I2C HAL module driver\r
- * @{\r
- */\r
-\r
-#ifdef HAL_I2C_MODULE_ENABLED\r
-\r
-/* Private typedef -----------------------------------------------------------*/\r
-/* Private define ------------------------------------------------------------*/\r
-\r
-/** @defgroup I2C_Private_Define I2C Private Define\r
- * @{\r
- */\r
-#define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */\r
-#define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */\r
-#define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_TC (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */\r
-#define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */\r
-\r
-#define MAX_NBYTE_SIZE 255U\r
-#define SlaveAddr_SHIFT 7U\r
-#define SlaveAddr_MSK 0x06U\r
-\r
-/* Private define for @ref PreviousState usage */\r
-#define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */\r
-#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */\r
-#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */\r
-#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */\r
-#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */\r
-#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */\r
-#define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MEM)) /*!< Memory Busy TX, combinaison of State LSB and Mode enum */\r
-#define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MEM)) /*!< Memory Busy RX, combinaison of State LSB and Mode enum */\r
-\r
-\r
-/* Private define to centralize the enable/disable of Interrupts */\r
-#define I2C_XFER_TX_IT (0x00000001U)\r
-#define I2C_XFER_RX_IT (0x00000002U)\r
-#define I2C_XFER_LISTEN_IT (0x00000004U)\r
-\r
-#define I2C_XFER_ERROR_IT (0x00000011U)\r
-#define I2C_XFER_CPLT_IT (0x00000012U)\r
-#define I2C_XFER_RELOAD_IT (0x00000012U)\r
-\r
-/* Private define Sequential Transfer Options default/reset value */\r
-#define I2C_NO_OPTION_FRAME (0xFFFF0000U)\r
-/**\r
- * @}\r
- */\r
-\r
-/* Private macro -------------------------------------------------------------*/\r
-/* Private variables ---------------------------------------------------------*/\r
-/* Private function prototypes -----------------------------------------------*/\r
-\r
-/** @defgroup I2C_Private_Functions I2C Private Functions\r
- * @{\r
- */\r
-/* Private functions to handle DMA transfer */\r
-static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma);\r
-static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma);\r
-static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma);\r
-static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma);\r
-static void I2C_DMAError(DMA_HandleTypeDef *hdma);\r
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);\r
-\r
-/* Private functions to handle IT transfer */\r
-static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);\r
-static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c);\r
-static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c);\r
-static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);\r
-static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);\r
-static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);\r
-static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode);\r
-\r
-/* Private functions to handle IT transfer */\r
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);\r
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);\r
-\r
-/* Private functions for I2C transfer IRQ handler */\r
-static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);\r
-static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);\r
-static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);\r
-static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources);\r
-\r
-/* Private functions to handle flags during polling transfer */\r
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);\r
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);\r
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);\r
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);\r
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);\r
-\r
-/* Private functions to centralize the enable/disable of Interrupts */\r
-static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);\r
-static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest);\r
-\r
-/* Private function to flush TXDR register */\r
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c);\r
-\r
-/* Private function to handle start, restart or stop a transfer */\r
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);\r
-\r
-/* Private function to Convert Specific options */\r
-static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);\r
-/**\r
- * @}\r
- */\r
-\r
-/* Exported functions --------------------------------------------------------*/\r
-\r
-/** @defgroup I2C_Exported_Functions I2C Exported Functions\r
- * @{\r
- */\r
-\r
-/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions\r
- * @brief Initialization and Configuration functions\r
- *\r
-@verbatim\r
- ===============================================================================\r
- ##### Initialization and de-initialization functions #####\r
- ===============================================================================\r
- [..] This subsection provides a set of functions allowing to initialize and\r
- deinitialize the I2Cx peripheral:\r
-\r
- (+) User must Implement HAL_I2C_MspInit() function in which he configures\r
- all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).\r
-\r
- (+) Call the function HAL_I2C_Init() to configure the selected device with\r
- the selected configuration:\r
- (++) Clock Timing\r
- (++) Own Address 1\r
- (++) Addressing mode (Master, Slave)\r
- (++) Dual Addressing mode\r
- (++) Own Address 2\r
- (++) Own Address 2 Mask\r
- (++) General call mode\r
- (++) Nostretch mode\r
-\r
- (+) Call the function HAL_I2C_DeInit() to restore the default configuration\r
- of the selected I2Cx peripheral.\r
-\r
-@endverbatim\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Initializes the I2C according to the specified parameters\r
- * in the I2C_InitTypeDef and initialize the associated handle.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Check the I2C handle allocation */\r
- if (hi2c == NULL)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));\r
- assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));\r
- assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));\r
- assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));\r
- assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));\r
- assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks));\r
- assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));\r
- assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_RESET)\r
- {\r
- /* Allocate lock resource and initialize it */\r
- hi2c->Lock = HAL_UNLOCKED;\r
-\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- /* Init the I2C Callback settings */\r
- hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */\r
- hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */\r
- hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */\r
- hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */\r
- hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback */\r
- hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback */\r
- hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback */\r
- hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback */\r
- hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback */\r
- hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */\r
-\r
- if (hi2c->MspInitCallback == NULL)\r
- {\r
- hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */\r
- }\r
-\r
- /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */\r
- hi2c->MspInitCallback(hi2c);\r
-#else\r
- /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */\r
- HAL_I2C_MspInit(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY;\r
-\r
- /* Disable the selected I2C peripheral */\r
- __HAL_I2C_DISABLE(hi2c);\r
-\r
- /*---------------------------- I2Cx TIMINGR Configuration ------------------*/\r
- /* Configure I2Cx: Frequency range */\r
- hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK;\r
-\r
- /*---------------------------- I2Cx OAR1 Configuration ---------------------*/\r
- /* Disable Own Address1 before set the Own Address1 configuration */\r
- hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN;\r
-\r
- /* Configure I2Cx: Own Address1 and ack own address1 mode */\r
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)\r
- {\r
- hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);\r
- }\r
- else /* I2C_ADDRESSINGMODE_10BIT */\r
- {\r
- hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1);\r
- }\r
-\r
- /*---------------------------- I2Cx CR2 Configuration ----------------------*/\r
- /* Configure I2Cx: Addressing Master mode */\r
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)\r
- {\r
- hi2c->Instance->CR2 = (I2C_CR2_ADD10);\r
- }\r
- /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */\r
- hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);\r
-\r
- /*---------------------------- I2Cx OAR2 Configuration ---------------------*/\r
- /* Disable Own Address2 before set the Own Address2 configuration */\r
- hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE;\r
-\r
- /* Configure I2Cx: Dual mode and Own Address2 */\r
- hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8));\r
-\r
- /*---------------------------- I2Cx CR1 Configuration ----------------------*/\r
- /* Configure I2Cx: Generalcall and NoStretch mode */\r
- hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);\r
-\r
- /* Enable the selected I2C peripheral */\r
- __HAL_I2C_ENABLE(hi2c);\r
-\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief DeInitialize the I2C peripheral.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Check the I2C handle allocation */\r
- if (hi2c == NULL)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY;\r
-\r
- /* Disable the I2C Peripheral Clock */\r
- __HAL_I2C_DISABLE(hi2c);\r
-\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- if (hi2c->MspDeInitCallback == NULL)\r
- {\r
- hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */\r
- }\r
-\r
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */\r
- hi2c->MspDeInitCallback(hi2c);\r
-#else\r
- /* DeInit the low level hardware: GPIO, CLOCK, NVIC */\r
- HAL_I2C_MspDeInit(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
-\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
- hi2c->State = HAL_I2C_STATE_RESET;\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Release Lock */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Initialize the I2C MSP.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_MspInit could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief DeInitialize the I2C MSP.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_MspDeInit could be implemented in the user file\r
- */\r
-}\r
-\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
-/**\r
- * @brief Register a User I2C Callback\r
- * To be used instead of the weak predefined callback\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param CallbackID ID of the callback to be registered\r
- * This parameter can be one of the following values:\r
- * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID\r
- * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID\r
- * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID\r
- * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID\r
- * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID\r
- * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID\r
- * @param pCallback pointer to the Callback function\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)\r
-{\r
- HAL_StatusTypeDef status = HAL_OK;\r
-\r
- if (pCallback == NULL)\r
- {\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- return HAL_ERROR;\r
- }\r
- /* Process locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if (HAL_I2C_STATE_READY == hi2c->State)\r
- {\r
- switch (CallbackID)\r
- {\r
- case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :\r
- hi2c->MasterTxCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :\r
- hi2c->MasterRxCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :\r
- hi2c->SlaveTxCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :\r
- hi2c->SlaveRxCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_LISTEN_COMPLETE_CB_ID :\r
- hi2c->ListenCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_MEM_TX_COMPLETE_CB_ID :\r
- hi2c->MemTxCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_MEM_RX_COMPLETE_CB_ID :\r
- hi2c->MemRxCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_ERROR_CB_ID :\r
- hi2c->ErrorCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_ABORT_CB_ID :\r
- hi2c->AbortCpltCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_MSPINIT_CB_ID :\r
- hi2c->MspInitCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_MSPDEINIT_CB_ID :\r
- hi2c->MspDeInitCallback = pCallback;\r
- break;\r
-\r
- default :\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- break;\r
- }\r
- }\r
- else if (HAL_I2C_STATE_RESET == hi2c->State)\r
- {\r
- switch (CallbackID)\r
- {\r
- case HAL_I2C_MSPINIT_CB_ID :\r
- hi2c->MspInitCallback = pCallback;\r
- break;\r
-\r
- case HAL_I2C_MSPDEINIT_CB_ID :\r
- hi2c->MspDeInitCallback = pCallback;\r
- break;\r
-\r
- default :\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- break;\r
- }\r
- }\r
- else\r
- {\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- }\r
-\r
- /* Release Lock */\r
- __HAL_UNLOCK(hi2c);\r
- return status;\r
-}\r
-\r
-/**\r
- * @brief Unregister an I2C Callback\r
- * I2C callback is redirected to the weak predefined callback\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param CallbackID ID of the callback to be unregistered\r
- * This parameter can be one of the following values:\r
- * This parameter can be one of the following values:\r
- * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID\r
- * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID\r
- * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID\r
- * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID\r
- * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID\r
- * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID\r
- * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID)\r
-{\r
- HAL_StatusTypeDef status = HAL_OK;\r
-\r
- /* Process locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if (HAL_I2C_STATE_READY == hi2c->State)\r
- {\r
- switch (CallbackID)\r
- {\r
- case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :\r
- hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :\r
- hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :\r
- hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :\r
- hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_LISTEN_COMPLETE_CB_ID :\r
- hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_MEM_TX_COMPLETE_CB_ID :\r
- hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_MEM_RX_COMPLETE_CB_ID :\r
- hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_ERROR_CB_ID :\r
- hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback */\r
- break;\r
-\r
- case HAL_I2C_ABORT_CB_ID :\r
- hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback */\r
- break;\r
-\r
- case HAL_I2C_MSPINIT_CB_ID :\r
- hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */\r
- break;\r
-\r
- case HAL_I2C_MSPDEINIT_CB_ID :\r
- hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */\r
- break;\r
-\r
- default :\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- break;\r
- }\r
- }\r
- else if (HAL_I2C_STATE_RESET == hi2c->State)\r
- {\r
- switch (CallbackID)\r
- {\r
- case HAL_I2C_MSPINIT_CB_ID :\r
- hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */\r
- break;\r
-\r
- case HAL_I2C_MSPDEINIT_CB_ID :\r
- hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */\r
- break;\r
-\r
- default :\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- break;\r
- }\r
- }\r
- else\r
- {\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- }\r
-\r
- /* Release Lock */\r
- __HAL_UNLOCK(hi2c);\r
- return status;\r
-}\r
-\r
-/**\r
- * @brief Register the Slave Address Match I2C Callback\r
- * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pCallback pointer to the Address Match Callback function\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback)\r
-{\r
- HAL_StatusTypeDef status = HAL_OK;\r
-\r
- if (pCallback == NULL)\r
- {\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- return HAL_ERROR;\r
- }\r
- /* Process locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if (HAL_I2C_STATE_READY == hi2c->State)\r
- {\r
- hi2c->AddrCallback = pCallback;\r
- }\r
- else\r
- {\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- }\r
-\r
- /* Release Lock */\r
- __HAL_UNLOCK(hi2c);\r
- return status;\r
-}\r
-\r
-/**\r
- * @brief UnRegister the Slave Address Match I2C Callback\r
- * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined callback\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- HAL_StatusTypeDef status = HAL_OK;\r
-\r
- /* Process locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if (HAL_I2C_STATE_READY == hi2c->State)\r
- {\r
- hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */\r
- }\r
- else\r
- {\r
- /* Update the error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;\r
-\r
- /* Return error status */\r
- status = HAL_ERROR;\r
- }\r
-\r
- /* Release Lock */\r
- __HAL_UNLOCK(hi2c);\r
- return status;\r
-}\r
-\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions\r
- * @brief Data transfers functions\r
- *\r
-@verbatim\r
- ===============================================================================\r
- ##### IO operation functions #####\r
- ===============================================================================\r
- [..]\r
- This subsection provides a set of functions allowing to manage the I2C data\r
- transfers.\r
-\r
- (#) There are two modes of transfer:\r
- (++) Blocking mode : The communication is performed in the polling mode.\r
- The status of all data processing is returned by the same function\r
- after finishing transfer.\r
- (++) No-Blocking mode : The communication is performed using Interrupts\r
- or DMA. These functions return the status of the transfer startup.\r
- The end of the data processing will be indicated through the\r
- dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when\r
- using DMA mode.\r
-\r
- (#) Blocking mode functions are :\r
- (++) HAL_I2C_Master_Transmit()\r
- (++) HAL_I2C_Master_Receive()\r
- (++) HAL_I2C_Slave_Transmit()\r
- (++) HAL_I2C_Slave_Receive()\r
- (++) HAL_I2C_Mem_Write()\r
- (++) HAL_I2C_Mem_Read()\r
- (++) HAL_I2C_IsDeviceReady()\r
-\r
- (#) No-Blocking mode functions with Interrupt are :\r
- (++) HAL_I2C_Master_Transmit_IT()\r
- (++) HAL_I2C_Master_Receive_IT()\r
- (++) HAL_I2C_Slave_Transmit_IT()\r
- (++) HAL_I2C_Slave_Receive_IT()\r
- (++) HAL_I2C_Mem_Write_IT()\r
- (++) HAL_I2C_Mem_Read_IT()\r
- (++) HAL_I2C_Master_Seq_Transmit_IT()\r
- (++) HAL_I2C_Master_Seq_Receive_IT()\r
- (++) HAL_I2C_Slave_Seq_Transmit_IT()\r
- (++) HAL_I2C_Slave_Seq_Receive_IT()\r
- (++) HAL_I2C_EnableListen_IT()\r
- (++) HAL_I2C_DisableListen_IT()\r
- (++) HAL_I2C_Master_Abort_IT()\r
-\r
- (#) No-Blocking mode functions with DMA are :\r
- (++) HAL_I2C_Master_Transmit_DMA()\r
- (++) HAL_I2C_Master_Receive_DMA()\r
- (++) HAL_I2C_Slave_Transmit_DMA()\r
- (++) HAL_I2C_Slave_Receive_DMA()\r
- (++) HAL_I2C_Mem_Write_DMA()\r
- (++) HAL_I2C_Mem_Read_DMA()\r
- (++) HAL_I2C_Master_Seq_Transmit_DMA()\r
- (++) HAL_I2C_Master_Seq_Receive_DMA()\r
- (++) HAL_I2C_Slave_Seq_Transmit_DMA()\r
- (++) HAL_I2C_Slave_Seq_Receive_DMA()\r
-\r
- (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:\r
- (++) HAL_I2C_MasterTxCpltCallback()\r
- (++) HAL_I2C_MasterRxCpltCallback()\r
- (++) HAL_I2C_SlaveTxCpltCallback()\r
- (++) HAL_I2C_SlaveRxCpltCallback()\r
- (++) HAL_I2C_MemTxCpltCallback()\r
- (++) HAL_I2C_MemRxCpltCallback()\r
- (++) HAL_I2C_AddrCallback()\r
- (++) HAL_I2C_ListenCpltCallback()\r
- (++) HAL_I2C_ErrorCallback()\r
- (++) HAL_I2C_AbortCpltCallback()\r
-\r
-@endverbatim\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Transmits in master mode an amount of data in blocking mode.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);\r
- }\r
-\r
- while (hi2c->XferCount > 0U)\r
- {\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
- /* Write data to TXDR */\r
- hi2c->Instance->TXDR = *hi2c->pBuffPtr;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferCount--;\r
- hi2c->XferSize--;\r
-\r
- if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))\r
- {\r
- /* Wait until TCR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);\r
- }\r
- }\r
- }\r
-\r
- /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */\r
- /* Wait until STOPF flag is set */\r
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Receives in master mode an amount of data in blocking mode.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);\r
- }\r
-\r
- while (hi2c->XferCount > 0U)\r
- {\r
- /* Wait until RXNE flag is set */\r
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
-\r
- if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))\r
- {\r
- /* Wait until TCR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);\r
- }\r
- }\r
- }\r
-\r
- /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */\r
- /* Wait until STOPF flag is set */\r
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Transmits in slave mode an amount of data in blocking mode.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Wait until ADDR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear ADDR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
-\r
- /* If 10bit addressing mode is selected */\r
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)\r
- {\r
- /* Wait until ADDR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear ADDR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
- }\r
-\r
- /* Wait until DIR flag is set Transmitter mode */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- while (hi2c->XferCount > 0U)\r
- {\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Write data to TXDR */\r
- hi2c->Instance->TXDR = *hi2c->pBuffPtr;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferCount--;\r
- }\r
-\r
- /* Wait until STOP flag is set */\r
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
-\r
- if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)\r
- {\r
- /* Normal use case for Transmitter mode */\r
- /* A NACK is generated to confirm the end of transfer */\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
- }\r
- else\r
- {\r
- return HAL_ERROR;\r
- }\r
- }\r
-\r
- /* Clear STOP flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Wait until BUSY flag is reset */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
-\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Receive in slave mode an amount of data in blocking mode\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Wait until ADDR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear ADDR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
-\r
- /* Wait until DIR flag is reset Receiver mode */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- while (hi2c->XferCount > 0U)\r
- {\r
- /* Wait until RXNE flag is set */\r
- if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
-\r
- /* Store Last receive data if any */\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)\r
- {\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferCount--;\r
- }\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferCount--;\r
- }\r
-\r
- /* Wait until STOP flag is set */\r
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Wait until BUSY flag is reset */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
-\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t xfermode;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
-\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t xfermode;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
-\r
- /* Enable ERR, TC, STOP, NACK, RXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)\r
-{\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Slave_ISR_IT;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
-\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)\r
-{\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Slave_ISR_IT;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
-\r
- /* Enable ERR, TC, STOP, NACK, RXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Transmit in master mode an amount of data in non-blocking mode with DMA\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t xfermode;\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_DMA;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- if (hi2c->XferSize > 0U)\r
- {\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmatx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmatx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRITE);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR and NACK interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- else\r
- {\r
- /* Update Transfer ISR function pointer */\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and generate START condition */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Receive in master mode an amount of data in non-blocking mode with DMA\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t xfermode;\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_DMA;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- if (hi2c->XferSize > 0U)\r
- {\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmarx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmarx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Send Slave Address */\r
- /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR and NACK interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- else\r
- {\r
- /* Update Transfer ISR function pointer */\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to read and generate START condition */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)\r
-{\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Slave_ISR_DMA;\r
-\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmatx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmatx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, STOP, NACK, ADDR interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Receive in slave mode an amount of data in non-blocking mode with DMA\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)\r
-{\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Slave_ISR_DMA;\r
-\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmarx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmarx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, STOP, NACK, ADDR interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-/**\r
- * @brief Write an amount of data in blocking mode to a specific memory address\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MEM;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Send Slave Address and Memory Address */\r
- if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);\r
- }\r
-\r
- do\r
- {\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Write data to TXDR */\r
- hi2c->Instance->TXDR = *hi2c->pBuffPtr;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferCount--;\r
- hi2c->XferSize--;\r
-\r
- if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))\r
- {\r
- /* Wait until TCR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);\r
- }\r
- }\r
-\r
- }\r
- while (hi2c->XferCount > 0U);\r
-\r
- /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */\r
- /* Wait until STOPF flag is reset */\r
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Read an amount of data in blocking mode from a specific memory address\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MEM;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Send Slave Address and Memory Address */\r
- if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);\r
- }\r
-\r
- do\r
- {\r
- /* Wait until RXNE flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
-\r
- if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))\r
- {\r
- /* Wait until TCR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);\r
- }\r
- }\r
- }\r
- while (hi2c->XferCount > 0U);\r
-\r
- /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */\r
- /* Wait until STOPF flag is reset */\r
- if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-/**\r
- * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t tickstart;\r
- uint32_t xfermode;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MEM;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- /* Send Slave Address and Memory Address */\r
- if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
-\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t tickstart;\r
- uint32_t xfermode;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MEM;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- /* Send Slave Address and Memory Address */\r
- if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
-\r
- /* Enable ERR, TC, STOP, NACK, RXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-/**\r
- * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t tickstart;\r
- uint32_t xfermode;\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MEM;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_DMA;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- /* Send Slave Address and Memory Address */\r
- if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
-\r
-\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmatx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmatx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR and NACK interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be read\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)\r
-{\r
- uint32_t tickstart;\r
- uint32_t xfermode;\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Init tickstart for timeout management*/\r
- tickstart = HAL_GetTick();\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MEM;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferISR = I2C_Master_ISR_DMA;\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
-\r
- /* Send Slave Address and Memory Address */\r
- if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
-\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmarx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmarx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR and NACK interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Checks if target device is ready for communication.\r
- * @note This function is used with Memory devices\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param Trials Number of trials\r
- * @param Timeout Timeout duration\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)\r
-{\r
- uint32_t tickstart;\r
-\r
- __IO uint32_t I2C_Trials = 0UL;\r
-\r
- FlagStatus tmp1;\r
- FlagStatus tmp2;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)\r
- {\r
- return HAL_BUSY;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- do\r
- {\r
- /* Generate Start */\r
- hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress);\r
-\r
- /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */\r
- /* Wait until STOPF flag is set or a NACK flag is set*/\r
- tickstart = HAL_GetTick();\r
-\r
- tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);\r
- tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- while ((tmp1 == RESET) && (tmp2 == RESET))\r
- {\r
- if (Timeout != HAL_MAX_DELAY)\r
- {\r
- if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
-\r
- tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF);\r
- tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);\r
- }\r
-\r
- /* Check if the NACKF flag has not been set */\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET)\r
- {\r
- /* Wait until STOPF flag is reset */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Device is ready */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- /* Wait until STOPF flag is reset */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Clear STOP Flag, auto generated with autoend*/\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
- }\r
-\r
- /* Check if the maximum allowed number of trials has been reached */\r
- if (I2C_Trials == Trials)\r
- {\r
- /* Generate Stop */\r
- hi2c->Instance->CR2 |= I2C_CR2_STOP;\r
-\r
- /* Wait until STOPF flag is reset */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
- }\r
-\r
- /* Increment Trials */\r
- I2C_Trials++;\r
- }\r
- while (I2C_Trials < Trials);\r
-\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- uint32_t xfermode;\r
- uint32_t xferrequest = I2C_GENERATE_START_WRITE;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = hi2c->XferOptions;\r
- }\r
-\r
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */\r
- /* Mean Previous state is same as current state */\r
- if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))\r
- {\r
- xferrequest = I2C_NO_STARTSTOP;\r
- }\r
- else\r
- {\r
- /* Convert OTHER_xxx XferOptions if any */\r
- I2C_ConvertOtherXferOptions(hi2c);\r
-\r
- /* Update xfermode accordingly if no reload is necessary */\r
- if (hi2c->XferCount < MAX_NBYTE_SIZE)\r
- {\r
- xfermode = hi2c->XferOptions;\r
- }\r
- }\r
-\r
- /* Send Slave Address and set NBYTES to write */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA.\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- uint32_t xfermode;\r
- uint32_t xferrequest = I2C_GENERATE_START_WRITE;\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Master_ISR_DMA;\r
-\r
- /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = hi2c->XferOptions;\r
- }\r
-\r
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */\r
- /* Mean Previous state is same as current state */\r
- if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))\r
- {\r
- xferrequest = I2C_NO_STARTSTOP;\r
- }\r
- else\r
- {\r
- /* Convert OTHER_xxx XferOptions if any */\r
- I2C_ConvertOtherXferOptions(hi2c);\r
-\r
- /* Update xfermode accordingly if no reload is necessary */\r
- if (hi2c->XferCount < MAX_NBYTE_SIZE)\r
- {\r
- xfermode = hi2c->XferOptions;\r
- }\r
- }\r
-\r
- if (hi2c->XferSize > 0U)\r
- {\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmatx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmatx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Send Slave Address and set NBYTES to write */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR and NACK interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- else\r
- {\r
- /* Update Transfer ISR function pointer */\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to write and generate START condition */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- uint32_t xfermode;\r
- uint32_t xferrequest = I2C_GENERATE_START_READ;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = hi2c->XferOptions;\r
- }\r
-\r
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */\r
- /* Mean Previous state is same as current state */\r
- if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))\r
- {\r
- xferrequest = I2C_NO_STARTSTOP;\r
- }\r
- else\r
- {\r
- /* Convert OTHER_xxx XferOptions if any */\r
- I2C_ConvertOtherXferOptions(hi2c);\r
-\r
- /* Update xfermode accordingly if no reload is necessary */\r
- if (hi2c->XferCount < MAX_NBYTE_SIZE)\r
- {\r
- xfermode = hi2c->XferOptions;\r
- }\r
- }\r
-\r
- /* Send Slave Address and set NBYTES to read */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- uint32_t xfermode;\r
- uint32_t xferrequest = I2C_GENERATE_START_READ;\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX;\r
- hi2c->Mode = HAL_I2C_MODE_MASTER;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Master_ISR_DMA;\r
-\r
- /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- xfermode = hi2c->XferOptions;\r
- }\r
-\r
- /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */\r
- /* Mean Previous state is same as current state */\r
- if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))\r
- {\r
- xferrequest = I2C_NO_STARTSTOP;\r
- }\r
- else\r
- {\r
- /* Convert OTHER_xxx XferOptions if any */\r
- I2C_ConvertOtherXferOptions(hi2c);\r
-\r
- /* Update xfermode accordingly if no reload is necessary */\r
- if (hi2c->XferCount < MAX_NBYTE_SIZE)\r
- {\r
- xfermode = hi2c->XferOptions;\r
- }\r
- }\r
-\r
- if (hi2c->XferSize > 0U)\r
- {\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmarx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmarx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Send Slave Address and set NBYTES to read */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR and NACK interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- else\r
- {\r
- /* Update Transfer ISR function pointer */\r
- hi2c->XferISR = I2C_Master_ISR_IT;\r
-\r
- /* Send Slave Address */\r
- /* Set NBYTES to read and generate START condition */\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, TC, STOP, NACK, TXI interrupt */\r
- /* possible to enable all of these */\r
- /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);\r
- }\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with Interrupt\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Disable Interrupts, to prevent preemption during treatment in case of multicall */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT);\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */\r
- /* and then toggle the HAL slave RX state to TX state */\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)\r
- {\r
- /* Disable associated Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- /* Abort DMA Xfer if any */\r
- if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;\r
-\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Abort DMA RX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);\r
- }\r
- }\r
- }\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Slave_ISR_IT;\r
-\r
- if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE)\r
- {\r
- /* Clear ADDR flag after prepare the transfer parameters */\r
- /* This action will generate an acknowledge to the Master */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* REnable ADDR interrupt */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_ERROR;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode with DMA\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Disable Interrupts, to prevent preemption during treatment in case of multicall */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT);\r
-\r
- /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */\r
- /* and then toggle the HAL slave RX state to TX state */\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)\r
- {\r
- /* Disable associated Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)\r
- {\r
- /* Abort DMA Xfer if any */\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;\r
-\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Abort DMA RX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);\r
- }\r
- }\r
- }\r
- }\r
- else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)\r
- {\r
- if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;\r
-\r
- /* Abort DMA Xfer if any */\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Abort DMA TX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);\r
- }\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Slave_ISR_DMA;\r
-\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmatx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmatx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmatx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Reset XferSize */\r
- hi2c->XferSize = 0;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE)\r
- {\r
- /* Clear ADDR flag after prepare the transfer parameters */\r
- /* This action will generate an acknowledge to the Master */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* Enable ERR, STOP, NACK, ADDR interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_ERROR;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with Interrupt\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Disable Interrupts, to prevent preemption during treatment in case of multicall */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT);\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */\r
- /* and then toggle the HAL slave TX state to RX state */\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)\r
- {\r
- /* Disable associated Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;\r
-\r
- /* Abort DMA Xfer if any */\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Abort DMA TX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);\r
- }\r
- }\r
- }\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Slave_ISR_IT;\r
-\r
- if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT)\r
- {\r
- /* Clear ADDR flag after prepare the transfer parameters */\r
- /* This action will generate an acknowledge to the Master */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* REnable ADDR interrupt */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_ERROR;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with DMA\r
- * @note This interface allow to manage repeated start condition when a direction change during transfer\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param pData Pointer to data buffer\r
- * @param Size Amount of data to be sent\r
- * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)\r
-{\r
- HAL_StatusTypeDef dmaxferstatus;\r
-\r
- /* Check the parameters */\r
- assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));\r
-\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- if ((pData == NULL) || (Size == 0U))\r
- {\r
- hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Disable Interrupts, to prevent preemption during treatment in case of multicall */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT);\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */\r
- /* and then toggle the HAL slave TX state to RX state */\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)\r
- {\r
- /* Disable associated Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)\r
- {\r
- /* Abort DMA Xfer if any */\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;\r
-\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Abort DMA TX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);\r
- }\r
- }\r
- }\r
- }\r
- else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)\r
- {\r
- if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;\r
-\r
- /* Abort DMA Xfer if any */\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Abort DMA RX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);\r
- }\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-\r
- hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_SLAVE;\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
-\r
- /* Enable Address Acknowledge */\r
- hi2c->Instance->CR2 &= ~I2C_CR2_NACK;\r
-\r
- /* Prepare transfer parameters */\r
- hi2c->pBuffPtr = pData;\r
- hi2c->XferCount = Size;\r
- hi2c->XferSize = hi2c->XferCount;\r
- hi2c->XferOptions = XferOptions;\r
- hi2c->XferISR = I2C_Slave_ISR_DMA;\r
-\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA transfer complete callback */\r
- hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt;\r
-\r
- /* Set the DMA error callback */\r
- hi2c->hdmarx->XferErrorCallback = I2C_DMAError;\r
-\r
- /* Set the unused DMA callbacks to NULL */\r
- hi2c->hdmarx->XferHalfCpltCallback = NULL;\r
- hi2c->hdmarx->XferAbortCallback = NULL;\r
-\r
- /* Enable the DMA channel */\r
- dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize);\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (dmaxferstatus == HAL_OK)\r
- {\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Reset XferSize */\r
- hi2c->XferSize = 0;\r
- }\r
- else\r
- {\r
- /* Update I2C state */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Update I2C error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
-\r
- if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT)\r
- {\r
- /* Clear ADDR flag after prepare the transfer parameters */\r
- /* This action will generate an acknowledge to the Master */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- /* REnable ADDR interrupt */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT);\r
-\r
- /* Enable DMA Request */\r
- hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_ERROR;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Enable the Address listen mode with Interrupt.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)\r
-{\r
- if (hi2c->State == HAL_I2C_STATE_READY)\r
- {\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->XferISR = I2C_Slave_ISR_IT;\r
-\r
- /* Enable the Address Match interrupt */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Disable the Address listen mode with Interrupt.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Declaration of tmp to prevent undefined behavior of volatile usage */\r
- uint32_t tmp;\r
-\r
- /* Disable Address listen mode only if a transfer is not ongoing */\r
- if (hi2c->State == HAL_I2C_STATE_LISTEN)\r
- {\r
- tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;\r
- hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Disable the Address Match interrupt */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- return HAL_BUSY;\r
- }\r
-}\r
-\r
-/**\r
- * @brief Abort a master I2C IT or DMA process communication with Interrupt.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @retval HAL status\r
- */\r
-HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)\r
-{\r
- if (hi2c->Mode == HAL_I2C_MODE_MASTER)\r
- {\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- /* Disable Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- /* Set State at HAL_I2C_STATE_ABORT */\r
- hi2c->State = HAL_I2C_STATE_ABORT;\r
-\r
- /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */\r
- /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */\r
- I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Note : The I2C interrupts must be enabled after unlocking current process\r
- to avoid the risk of I2C interrupt handle execution before current\r
- process unlock */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);\r
-\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- /* Wrong usage of abort function */\r
- /* This function should be used only in case of abort monitored by master device */\r
- return HAL_ERROR;\r
- }\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief This function handles I2C event interrupt request.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Get current IT Flags and IT sources value */\r
- uint32_t itflags = READ_REG(hi2c->Instance->ISR);\r
- uint32_t itsources = READ_REG(hi2c->Instance->CR1);\r
-\r
- /* I2C events treatment -------------------------------------*/\r
- if (hi2c->XferISR != NULL)\r
- {\r
- hi2c->XferISR(hi2c, itflags, itsources);\r
- }\r
-}\r
-\r
-/**\r
- * @brief This function handles I2C error interrupt request.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)\r
-{\r
- uint32_t itflags = READ_REG(hi2c->Instance->ISR);\r
- uint32_t itsources = READ_REG(hi2c->Instance->CR1);\r
- uint32_t tmperror;\r
-\r
- /* I2C Bus error interrupt occurred ------------------------------------*/\r
- if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;\r
-\r
- /* Clear BERR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);\r
- }\r
-\r
- /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/\r
- if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;\r
-\r
- /* Clear OVR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);\r
- }\r
-\r
- /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/\r
- if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;\r
-\r
- /* Clear ARLO flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);\r
- }\r
-\r
- /* Store current volatile hi2c->ErrorCode, misra rule */\r
- tmperror = hi2c->ErrorCode;\r
-\r
- /* Call the Error Callback in case of Error detected */\r
- if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_NONE)\r
- {\r
- I2C_ITError(hi2c, tmperror);\r
- }\r
-}\r
-\r
-/**\r
- * @brief Master Tx Transfer completed callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_MasterTxCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief Master Rx Transfer completed callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_MasterRxCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/** @brief Slave Tx Transfer completed callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief Slave Rx Transfer completed callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief Slave Address Match callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFERDIRECTION\r
- * @param AddrMatchCode Address Match Code\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
- UNUSED(TransferDirection);\r
- UNUSED(AddrMatchCode);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_AddrCallback() could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief Listen Complete callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_ListenCpltCallback() could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief Memory Tx Transfer completed callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_MemTxCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief Memory Rx Transfer completed callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_MemRxCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief I2C error callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_ErrorCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @brief I2C abort callback.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval None\r
- */\r
-__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(hi2c);\r
-\r
- /* NOTE : This function should not be modified, when the callback is needed,\r
- the HAL_I2C_AbortCpltCallback could be implemented in the user file\r
- */\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions\r
- * @brief Peripheral State, Mode and Error functions\r
- *\r
-@verbatim\r
- ===============================================================================\r
- ##### Peripheral State, Mode and Error functions #####\r
- ===============================================================================\r
- [..]\r
- This subsection permit to get in run-time the status of the peripheral\r
- and the data flow.\r
-\r
-@endverbatim\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Return the I2C handle state.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @retval HAL state\r
- */\r
-HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Return I2C handle state */\r
- return hi2c->State;\r
-}\r
-\r
-/**\r
- * @brief Returns the I2C Master, Slave, Memory or no mode.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for I2C module\r
- * @retval HAL mode\r
- */\r
-HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)\r
-{\r
- return hi2c->Mode;\r
-}\r
-\r
-/**\r
-* @brief Return the I2C error code.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
-* @retval I2C Error Code\r
-*/\r
-uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)\r
-{\r
- return hi2c->ErrorCode;\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/** @addtogroup I2C_Private_Functions\r
- * @{\r
- */\r
-\r
-/**\r
- * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @param ITSources Interrupt sources enabled.\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)\r
-{\r
- uint16_t devaddress;\r
- uint32_t tmpITFlags = ITFlags;\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Set corresponding Error Code */\r
- /* No need to generate STOP, it is automatically done */\r
- /* Error callback will be send during stop flag treatment */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET))\r
- {\r
- /* Remove RXNE flag on temporary variable as read done */\r
- tmpITFlags &= ~I2C_FLAG_RXNE;\r
-\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))\r
- {\r
- /* Write data to TXDR */\r
- hi2c->Instance->TXDR = *hi2c->pBuffPtr;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))\r
- {\r
- if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))\r
- {\r
- devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD);\r
-\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)\r
- {\r
- I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP);\r
- }\r
- else\r
- {\r
- I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP);\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Call TxCpltCallback() if no stop mode is set */\r
- if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)\r
- {\r
- /* Call I2C Master Sequential complete process */\r
- I2C_ITMasterSeqCplt(hi2c);\r
- }\r
- else\r
- {\r
- /* Wrong size Status regarding TCR flag event */\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);\r
- }\r
- }\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))\r
- {\r
- if (hi2c->XferCount == 0U)\r
- {\r
- if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)\r
- {\r
- /* Generate a stop condition in case of no transfer option */\r
- if (hi2c->XferOptions == I2C_NO_OPTION_FRAME)\r
- {\r
- /* Generate Stop */\r
- hi2c->Instance->CR2 |= I2C_CR2_STOP;\r
- }\r
- else\r
- {\r
- /* Call I2C Master Sequential complete process */\r
- I2C_ITMasterSeqCplt(hi2c);\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Wrong size Status regarding TC flag event */\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);\r
- }\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-\r
- if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))\r
- {\r
- /* Call I2C Master complete process */\r
- I2C_ITMasterCplt(hi2c, tmpITFlags);\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @param ITSources Interrupt sources enabled.\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)\r
-{\r
- uint32_t tmpoptions = hi2c->XferOptions;\r
- uint32_t tmpITFlags = ITFlags;\r
-\r
- /* Process locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))\r
- {\r
- /* Check that I2C transfer finished */\r
- /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */\r
- /* Mean XferCount == 0*/\r
- /* So clear Flag NACKF only */\r
- if (hi2c->XferCount == 0U)\r
- {\r
- if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */\r
- {\r
- /* Call I2C Listen complete process */\r
- I2C_ITListenCplt(hi2c, tmpITFlags);\r
- }\r
- else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
-\r
- /* Last Byte is Transmitted */\r
- /* Call I2C Slave Sequential complete process */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
- }\r
- else\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
- }\r
- }\r
- else\r
- {\r
- /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Set ErrorCode corresponding to a Non-Acknowledge */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
-\r
- if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME))\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, hi2c->ErrorCode);\r
- }\r
- }\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET))\r
- {\r
- if (hi2c->XferCount > 0U)\r
- {\r
- /* Remove RXNE flag on temporary variable as read done */\r
- tmpITFlags &= ~I2C_FLAG_RXNE;\r
-\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
- }\r
-\r
- if ((hi2c->XferCount == 0U) && \\r
- (tmpoptions != I2C_NO_OPTION_FRAME))\r
- {\r
- /* Call I2C Slave Sequential complete process */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
- }\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))\r
- {\r
- I2C_ITAddrCplt(hi2c, tmpITFlags);\r
- }\r
- else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))\r
- {\r
- /* Write data to TXDR only if XferCount not reach "0" */\r
- /* A TXIS flag can be set, during STOP treatment */\r
- /* Check if all Datas have already been sent */\r
- /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */\r
- if (hi2c->XferCount > 0U)\r
- {\r
- /* Write data to TXDR */\r
- hi2c->Instance->TXDR = *hi2c->pBuffPtr;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- hi2c->XferCount--;\r
- hi2c->XferSize--;\r
- }\r
- else\r
- {\r
- if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME))\r
- {\r
- /* Last Byte is Transmitted */\r
- /* Call I2C Slave Sequential complete process */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-\r
- /* Check if STOPF is set */\r
- if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))\r
- {\r
- /* Call I2C Slave complete process */\r
- I2C_ITSlaveCplt(hi2c, tmpITFlags);\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @param ITSources Interrupt sources enabled.\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)\r
-{\r
- uint16_t devaddress;\r
- uint32_t xfermode;\r
-\r
- /* Process Locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Set corresponding Error Code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
-\r
- /* No need to generate STOP, it is automatically done */\r
- /* But enable STOP interrupt, to treat it */\r
- /* Error callback will be send during stop flag treatment */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
- }\r
- else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))\r
- {\r
- /* Disable TC interrupt */\r
- __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI);\r
-\r
- if (hi2c->XferCount != 0U)\r
- {\r
- /* Recover Slave address */\r
- devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD);\r
-\r
- /* Prepare the new XferSize to transfer */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- xfermode = I2C_RELOAD_MODE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)\r
- {\r
- xfermode = hi2c->XferOptions;\r
- }\r
- else\r
- {\r
- xfermode = I2C_AUTOEND_MODE;\r
- }\r
- }\r
-\r
- /* Set the new XferSize in Nbytes register */\r
- I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP);\r
-\r
- /* Update XferCount value */\r
- hi2c->XferCount -= hi2c->XferSize;\r
-\r
- /* Enable DMA Request */\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_RX)\r
- {\r
- hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;\r
- }\r
- else\r
- {\r
- hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;\r
- }\r
- }\r
- else\r
- {\r
- /* Call TxCpltCallback() if no stop mode is set */\r
- if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)\r
- {\r
- /* Call I2C Master Sequential complete process */\r
- I2C_ITMasterSeqCplt(hi2c);\r
- }\r
- else\r
- {\r
- /* Wrong size Status regarding TCR flag event */\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);\r
- }\r
- }\r
- }\r
- else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))\r
- {\r
- if (hi2c->XferCount == 0U)\r
- {\r
- if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE)\r
- {\r
- /* Generate a stop condition in case of no transfer option */\r
- if (hi2c->XferOptions == I2C_NO_OPTION_FRAME)\r
- {\r
- /* Generate Stop */\r
- hi2c->Instance->CR2 |= I2C_CR2_STOP;\r
- }\r
- else\r
- {\r
- /* Call I2C Master Sequential complete process */\r
- I2C_ITMasterSeqCplt(hi2c);\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Wrong size Status regarding TC flag event */\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);\r
- }\r
- }\r
- else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))\r
- {\r
- /* Call I2C Master complete process */\r
- I2C_ITMasterCplt(hi2c, ITFlags);\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @param ITSources Interrupt sources enabled.\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources)\r
-{\r
- uint32_t tmpoptions = hi2c->XferOptions;\r
- uint32_t treatdmanack = 0U;\r
-\r
- /* Process locked */\r
- __HAL_LOCK(hi2c);\r
-\r
- if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))\r
- {\r
- /* Check that I2C transfer finished */\r
- /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */\r
- /* Mean XferCount == 0 */\r
- /* So clear Flag NACKF only */\r
- if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) ||\r
- (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET))\r
- {\r
- /* Split check of hdmarx, for MISRA compliance */\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)\r
- {\r
- if (__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U)\r
- {\r
- treatdmanack = 1U;\r
- }\r
- }\r
- }\r
-\r
- /* Split check of hdmatx, for MISRA compliance */\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET)\r
- {\r
- if (__HAL_DMA_GET_COUNTER(hi2c->hdmatx) == 0U)\r
- {\r
- treatdmanack = 1U;\r
- }\r
- }\r
- }\r
-\r
- if (treatdmanack == 1U)\r
- {\r
- if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */\r
- {\r
- /* Call I2C Listen complete process */\r
- I2C_ITListenCplt(hi2c, ITFlags);\r
- }\r
- else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME))\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
-\r
- /* Last Byte is Transmitted */\r
- /* Call I2C Slave Sequential complete process */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
- }\r
- else\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
- }\r
- }\r
- else\r
- {\r
- /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Set ErrorCode corresponding to a Non-Acknowledge */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
-\r
- if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME))\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, hi2c->ErrorCode);\r
- }\r
- }\r
- }\r
- else\r
- {\r
- /* Only Clear NACK Flag, no DMA treatment is pending */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
- }\r
- }\r
- else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))\r
- {\r
- I2C_ITAddrCplt(hi2c, ITFlags);\r
- }\r
- else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))\r
- {\r
- /* Call I2C Slave complete process */\r
- I2C_ITSlaveCplt(hi2c, ITFlags);\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Master sends target device address followed by internal memory address for write request.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE);\r
-\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* If Memory address size is 8Bit */\r
- if (MemAddSize == I2C_MEMADD_SIZE_8BIT)\r
- {\r
- /* Send Memory Address */\r
- hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);\r
- }\r
- /* If Memory address size is 16Bit */\r
- else\r
- {\r
- /* Send MSB of Memory Address */\r
- hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);\r
-\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Send LSB of Memory Address */\r
- hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);\r
- }\r
-\r
- /* Wait until TCR flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Master sends target device address followed by internal memory address for read request.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param DevAddress Target device address: The device 7 bits address value\r
- * in datasheet must be shifted to the left before calling the interface\r
- * @param MemAddress Internal memory address\r
- * @param MemAddSize Size of internal memory address\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE);\r
-\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* If Memory address size is 8Bit */\r
- if (MemAddSize == I2C_MEMADD_SIZE_8BIT)\r
- {\r
- /* Send Memory Address */\r
- hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);\r
- }\r
- /* If Memory address size is 16Bit */\r
- else\r
- {\r
- /* Send MSB of Memory Address */\r
- hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress);\r
-\r
- /* Wait until TXIS flag is set */\r
- if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Send LSB of Memory Address */\r
- hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);\r
- }\r
-\r
- /* Wait until TC flag is set */\r
- if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief I2C Address complete process callback.\r
- * @param hi2c I2C handle.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @retval None\r
- */\r
-static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)\r
-{\r
- uint8_t transferdirection;\r
- uint16_t slaveaddrcode;\r
- uint16_t ownadd1code;\r
- uint16_t ownadd2code;\r
-\r
- /* Prevent unused argument(s) compilation warning */\r
- UNUSED(ITFlags);\r
-\r
- /* In case of Listen state, need to inform upper layer of address match code event */\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- transferdirection = I2C_GET_DIR(hi2c);\r
- slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c);\r
- ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c);\r
- ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c);\r
-\r
- /* If 10bits addressing mode is selected */\r
- if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)\r
- {\r
- if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK))\r
- {\r
- slaveaddrcode = ownadd1code;\r
- hi2c->AddrEventCount++;\r
- if (hi2c->AddrEventCount == 2U)\r
- {\r
- /* Reset Address Event counter */\r
- hi2c->AddrEventCount = 0U;\r
-\r
- /* Clear ADDR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call Slave Addr callback */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode);\r
-#else\r
- HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- }\r
- else\r
- {\r
- slaveaddrcode = ownadd2code;\r
-\r
- /* Disable ADDR Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call Slave Addr callback */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode);\r
-#else\r
- HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- }\r
- /* else 7 bits addressing mode is selected */\r
- else\r
- {\r
- /* Disable ADDR Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call Slave Addr callback */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode);\r
-#else\r
- HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- }\r
- /* Else clear address flag only */\r
- else\r
- {\r
- /* Clear ADDR flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- }\r
-}\r
-\r
-/**\r
- * @brief I2C Master sequential complete process.\r
- * @param hi2c I2C handle.\r
- * @retval None\r
- */\r
-static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Reset I2C handle mode */\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* No Generate Stop, to permit restart mode */\r
- /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_TX)\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Disable Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->MasterTxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_MasterTxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- /* hi2c->State == HAL_I2C_STATE_BUSY_RX */\r
- else\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Disable Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->MasterRxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_MasterRxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
-}\r
-\r
-/**\r
- * @brief I2C Slave sequential complete process.\r
- * @param hi2c I2C handle.\r
- * @retval None\r
- */\r
-static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* Reset I2C handle mode */\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)\r
- {\r
- /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;\r
-\r
- /* Disable Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->SlaveTxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_SlaveTxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
-\r
- else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)\r
- {\r
- /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;\r
-\r
- /* Disable Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->SlaveRxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_SlaveRxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-}\r
-\r
-/**\r
- * @brief I2C Master complete process.\r
- * @param hi2c I2C handle.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @retval None\r
- */\r
-static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)\r
-{\r
- uint32_t tmperror;\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- /* Reset handle parameters */\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->XferISR = NULL;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
-\r
- if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET)\r
- {\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Set acknowledge error code */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
- }\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
-\r
- /* Disable Interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT);\r
-\r
- /* Store current volatile hi2c->ErrorCode, misra rule */\r
- tmperror = hi2c->ErrorCode;\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE))\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, hi2c->ErrorCode);\r
- }\r
- /* hi2c->State == HAL_I2C_STATE_BUSY_TX */\r
- else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- if (hi2c->Mode == HAL_I2C_MODE_MEM)\r
- {\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->MemTxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_MemTxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- else\r
- {\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->MasterTxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_MasterTxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- }\r
- /* hi2c->State == HAL_I2C_STATE_BUSY_RX */\r
- else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- if (hi2c->Mode == HAL_I2C_MODE_MEM)\r
- {\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->MemRxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_MemRxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- else\r
- {\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->MasterRxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_MasterRxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-}\r
-\r
-/**\r
- * @brief I2C Slave complete process.\r
- * @param hi2c I2C handle.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @retval None\r
- */\r
-static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)\r
-{\r
- uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1);\r
- uint32_t tmpITFlags = ITFlags;\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Disable all interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT);\r
-\r
- /* Disable Address Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
-\r
- /* If a DMA is ongoing, Update handle size context */\r
- if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET)\r
- {\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmatx);\r
- }\r
- }\r
- else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET)\r
- {\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmarx);\r
- }\r
- }\r
- else\r
- {\r
- /* Do nothing */\r
- }\r
-\r
- /* Store Last receive data if any */\r
- if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET)\r
- {\r
- /* Remove RXNE flag on temporary variable as read done */\r
- tmpITFlags &= ~I2C_FLAG_RXNE;\r
-\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- if ((hi2c->XferSize > 0U))\r
- {\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
- }\r
- }\r
-\r
- /* All data are not transferred, so set error code accordingly */\r
- if (hi2c->XferCount != 0U)\r
- {\r
- /* Set ErrorCode corresponding to a Non-Acknowledge */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
- }\r
-\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
- hi2c->XferISR = NULL;\r
-\r
- if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, hi2c->ErrorCode);\r
-\r
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */\r
- if (hi2c->State == HAL_I2C_STATE_LISTEN)\r
- {\r
- /* Call I2C Listen complete process */\r
- I2C_ITListenCplt(hi2c, tmpITFlags);\r
- }\r
- }\r
- else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)\r
- {\r
- /* Call the Sequential Complete callback, to inform upper layer of the end of Tranfer */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
-\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->ListenCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_ListenCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->SlaveRxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_SlaveRxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- else\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->SlaveTxCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_SlaveTxCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
-}\r
-\r
-/**\r
- * @brief I2C Listen complete process.\r
- * @param hi2c I2C handle.\r
- * @param ITFlags Interrupt flags to handle.\r
- * @retval None\r
- */\r
-static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)\r
-{\r
- /* Reset handle parameters */\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
- hi2c->XferISR = NULL;\r
-\r
- /* Store Last receive data if any */\r
- if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET)\r
- {\r
- /* Read data from RXDR */\r
- *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;\r
-\r
- /* Increment Buffer pointer */\r
- hi2c->pBuffPtr++;\r
-\r
- if ((hi2c->XferSize > 0U))\r
- {\r
- hi2c->XferSize--;\r
- hi2c->XferCount--;\r
-\r
- /* Set ErrorCode corresponding to a Non-Acknowledge */\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
- }\r
- }\r
-\r
- /* Disable all Interrupts*/\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);\r
-\r
- /* Clear NACK Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->ListenCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_ListenCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
-}\r
-\r
-/**\r
- * @brief I2C interrupts error process.\r
- * @param hi2c I2C handle.\r
- * @param ErrorCode Error code to handle.\r
- * @retval None\r
- */\r
-static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)\r
-{\r
- HAL_I2C_StateTypeDef tmpstate = hi2c->State;\r
-\r
- /* Reset handle parameters */\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
- hi2c->XferOptions = I2C_NO_OPTION_FRAME;\r
- hi2c->XferCount = 0U;\r
-\r
- /* Set new error code */\r
- hi2c->ErrorCode |= ErrorCode;\r
-\r
- /* Disable Interrupts */\r
- if ((tmpstate == HAL_I2C_STATE_LISTEN) ||\r
- (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) ||\r
- (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN))\r
- {\r
- /* Disable all interrupts, except interrupts related to LISTEN state */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT);\r
-\r
- /* keep HAL_I2C_STATE_LISTEN if set */\r
- hi2c->State = HAL_I2C_STATE_LISTEN;\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->XferISR = I2C_Slave_ISR_IT;\r
- }\r
- else\r
- {\r
- /* Disable all interrupts */\r
- I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);\r
-\r
- /* If state is an abort treatment on goind, don't change state */\r
- /* This change will be do later */\r
- if (hi2c->State != HAL_I2C_STATE_ABORT)\r
- {\r
- /* Set HAL_I2C_STATE_READY */\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- }\r
- hi2c->PreviousState = I2C_STATE_NONE;\r
- hi2c->XferISR = NULL;\r
- }\r
-\r
- /* Abort DMA TX transfer if any */\r
- if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;\r
-\r
- if (hi2c->hdmatx != NULL)\r
- {\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Abort DMA TX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)\r
- {\r
- /* Call Directly XferAbortCallback function in case of error */\r
- hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);\r
- }\r
- }\r
- }\r
- /* Abort DMA RX transfer if any */\r
- else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN)\r
- {\r
- hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;\r
-\r
- if (hi2c->hdmarx != NULL)\r
- {\r
- /* Set the I2C DMA Abort callback :\r
- will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */\r
- hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Abort DMA RX */\r
- if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)\r
- {\r
- /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */\r
- hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);\r
- }\r
- }\r
- }\r
- else if (hi2c->State == HAL_I2C_STATE_ABORT)\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->AbortCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_AbortCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- else\r
- {\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->ErrorCallback(hi2c);\r
-#else\r
- HAL_I2C_ErrorCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
-}\r
-\r
-/**\r
- * @brief I2C Tx data register flush process.\r
- * @param hi2c I2C handle.\r
- * @retval None\r
- */\r
-static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* If a pending TXIS flag is set */\r
- /* Write a dummy data in TXDR to clear it */\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET)\r
- {\r
- hi2c->Instance->TXDR = 0x00U;\r
- }\r
-\r
- /* Flush TX register if not empty */\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)\r
- {\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE);\r
- }\r
-}\r
-\r
-/**\r
- * @brief DMA I2C master transmit process complete callback.\r
- * @param hdma DMA handle\r
- * @retval None\r
- */\r
-static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma)\r
-{\r
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */\r
-\r
- /* Disable DMA Request */\r
- hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;\r
-\r
- /* If last transfer, enable STOP interrupt */\r
- if (hi2c->XferCount == 0U)\r
- {\r
- /* Enable STOP interrupt */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);\r
- }\r
- /* else prepare a new DMA transfer and enable TCReload interrupt */\r
- else\r
- {\r
- /* Update Buffer pointer */\r
- hi2c->pBuffPtr += hi2c->XferSize;\r
-\r
- /* Set the XferSize to transfer */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- }\r
-\r
- /* Enable the DMA channel */\r
- if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize) != HAL_OK)\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);\r
- }\r
- else\r
- {\r
- /* Enable TC interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);\r
- }\r
- }\r
-}\r
-\r
-/**\r
- * @brief DMA I2C slave transmit process complete callback.\r
- * @param hdma DMA handle\r
- * @retval None\r
- */\r
-static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)\r
-{\r
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */\r
- uint32_t tmpoptions = hi2c->XferOptions;\r
-\r
- if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME))\r
- {\r
- /* Disable DMA Request */\r
- hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN;\r
-\r
- /* Last Byte is Transmitted */\r
- /* Call I2C Slave Sequential complete process */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
- }\r
- else\r
- {\r
- /* No specific action, Master fully manage the generation of STOP condition */\r
- /* Mean that this generation can arrive at any time, at the end or during DMA process */\r
- /* So STOP condition should be manage through Interrupt treatment */\r
- }\r
-}\r
-\r
-/**\r
- * @brief DMA I2C master receive process complete callback.\r
- * @param hdma DMA handle\r
- * @retval None\r
- */\r
-static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma)\r
-{\r
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */\r
-\r
- /* Disable DMA Request */\r
- hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;\r
-\r
- /* If last transfer, enable STOP interrupt */\r
- if (hi2c->XferCount == 0U)\r
- {\r
- /* Enable STOP interrupt */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT);\r
- }\r
- /* else prepare a new DMA transfer and enable TCReload interrupt */\r
- else\r
- {\r
- /* Update Buffer pointer */\r
- hi2c->pBuffPtr += hi2c->XferSize;\r
-\r
- /* Set the XferSize to transfer */\r
- if (hi2c->XferCount > MAX_NBYTE_SIZE)\r
- {\r
- hi2c->XferSize = MAX_NBYTE_SIZE;\r
- }\r
- else\r
- {\r
- hi2c->XferSize = hi2c->XferCount;\r
- }\r
-\r
- /* Enable the DMA channel */\r
- if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize) != HAL_OK)\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);\r
- }\r
- else\r
- {\r
- /* Enable TC interrupts */\r
- I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT);\r
- }\r
- }\r
-}\r
-\r
-/**\r
- * @brief DMA I2C slave receive process complete callback.\r
- * @param hdma DMA handle\r
- * @retval None\r
- */\r
-static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma)\r
-{\r
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */\r
- uint32_t tmpoptions = hi2c->XferOptions;\r
-\r
- if ((__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) && \\r
- (tmpoptions != I2C_NO_OPTION_FRAME))\r
- {\r
- /* Disable DMA Request */\r
- hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN;\r
-\r
- /* Call I2C Slave Sequential complete process */\r
- I2C_ITSlaveSeqCplt(hi2c);\r
- }\r
- else\r
- {\r
- /* No specific action, Master fully manage the generation of STOP condition */\r
- /* Mean that this generation can arrive at any time, at the end or during DMA process */\r
- /* So STOP condition should be manage through Interrupt treatment */\r
- }\r
-}\r
-\r
-/**\r
- * @brief DMA I2C communication error callback.\r
- * @param hdma DMA handle\r
- * @retval None\r
- */\r
-static void I2C_DMAError(DMA_HandleTypeDef *hdma)\r
-{\r
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */\r
-\r
- /* Disable Acknowledge */\r
- hi2c->Instance->CR2 |= I2C_CR2_NACK;\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
- I2C_ITError(hi2c, HAL_I2C_ERROR_DMA);\r
-}\r
-\r
-/**\r
- * @brief DMA I2C communication abort callback\r
- * (To be called at end of DMA Abort procedure).\r
- * @param hdma DMA handle.\r
- * @retval None\r
- */\r
-static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)\r
-{\r
- I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */\r
-\r
- /* Reset AbortCpltCallback */\r
- hi2c->hdmatx->XferAbortCallback = NULL;\r
- hi2c->hdmarx->XferAbortCallback = NULL;\r
-\r
- /* Check if come from abort from user */\r
- if (hi2c->State == HAL_I2C_STATE_ABORT)\r
- {\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->AbortCpltCallback(hi2c);\r
-#else\r
- HAL_I2C_AbortCpltCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
- else\r
- {\r
- /* Call the corresponding callback to inform upper layer of End of Transfer */\r
-#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)\r
- hi2c->ErrorCallback(hi2c);\r
-#else\r
- HAL_I2C_ErrorCallback(hi2c);\r
-#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */\r
- }\r
-}\r
-\r
-/**\r
- * @brief This function handles I2C Communication Timeout.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param Flag Specifies the I2C flag to check.\r
- * @param Status The new Flag status (SET or RESET).\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)\r
- {\r
- /* Check for the Timeout */\r
- if (Timeout != HAL_MAX_DELAY)\r
- {\r
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
- return HAL_ERROR;\r
- }\r
- }\r
- }\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET)\r
- {\r
- /* Check if a NACK is detected */\r
- if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Check for the Timeout */\r
- if (Timeout != HAL_MAX_DELAY)\r
- {\r
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- }\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)\r
- {\r
- /* Check if a NACK is detected */\r
- if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Check for the Timeout */\r
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)\r
- {\r
- /* Check if a NACK is detected */\r
- if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK)\r
- {\r
- return HAL_ERROR;\r
- }\r
-\r
- /* Check if a STOPF is detected */\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)\r
- {\r
- /* Check if an RXNE is pending */\r
- /* Store Last receive data if any */\r
- if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U))\r
- {\r
- /* Return HAL_OK */\r
- /* The Reading of data from RXDR will be done in caller function */\r
- return HAL_OK;\r
- }\r
- else\r
- {\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- hi2c->ErrorCode = HAL_I2C_ERROR_NONE;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
-\r
- /* Check for the Timeout */\r
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief This function handles Acknowledge failed detection during an I2C Communication.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param Timeout Timeout duration\r
- * @param Tickstart Tick start value\r
- * @retval HAL status\r
- */\r
-static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)\r
-{\r
- if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)\r
- {\r
- /* Wait until STOP Flag is reset */\r
- /* AutoEnd should be initiate after AF */\r
- while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)\r
- {\r
- /* Check for the Timeout */\r
- if (Timeout != HAL_MAX_DELAY)\r
- {\r
- if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))\r
- {\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- }\r
- }\r
-\r
- /* Clear NACKF Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);\r
-\r
- /* Clear STOP Flag */\r
- __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);\r
-\r
- /* Flush TX register */\r
- I2C_Flush_TXDR(hi2c);\r
-\r
- /* Clear Configuration Register 2 */\r
- I2C_RESET_CR2(hi2c);\r
-\r
- hi2c->ErrorCode |= HAL_I2C_ERROR_AF;\r
- hi2c->State = HAL_I2C_STATE_READY;\r
- hi2c->Mode = HAL_I2C_MODE_NONE;\r
-\r
- /* Process Unlocked */\r
- __HAL_UNLOCK(hi2c);\r
-\r
- return HAL_ERROR;\r
- }\r
- return HAL_OK;\r
-}\r
-\r
-/**\r
- * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).\r
- * @param hi2c I2C handle.\r
- * @param DevAddress Specifies the slave address to be programmed.\r
- * @param Size Specifies the number of bytes to be programmed.\r
- * This parameter must be a value between 0 and 255.\r
- * @param Mode New state of the I2C START condition generation.\r
- * This parameter can be one of the following values:\r
- * @arg @ref I2C_RELOAD_MODE Enable Reload mode .\r
- * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode.\r
- * @arg @ref I2C_SOFTEND_MODE Enable Software end mode.\r
- * @param Request New state of the I2C START condition generation.\r
- * This parameter can be one of the following values:\r
- * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition.\r
- * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0).\r
- * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request.\r
- * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request.\r
- * @retval None\r
- */\r
-static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)\r
-{\r
- /* Check the parameters */\r
- assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));\r
- assert_param(IS_TRANSFER_MODE(Mode));\r
- assert_param(IS_TRANSFER_REQUEST(Request));\r
-\r
- /* update CR2 register */\r
- MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \\r
- (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));\r
-}\r
-\r
-/**\r
- * @brief Manage the enabling of Interrupts.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.\r
- * @retval None\r
- */\r
-static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)\r
-{\r
- uint32_t tmpisr = 0U;\r
-\r
- if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \\r
- (hi2c->XferISR == I2C_Slave_ISR_DMA))\r
- {\r
- if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)\r
- {\r
- /* Enable ERR, STOP, NACK and ADDR interrupts */\r
- tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)\r
- {\r
- /* Enable ERR and NACK interrupts */\r
- tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)\r
- {\r
- /* Enable STOP interrupts */\r
- tmpisr |= I2C_IT_STOPI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)\r
- {\r
- /* Enable TC interrupts */\r
- tmpisr |= I2C_IT_TCI;\r
- }\r
- }\r
- else\r
- {\r
- if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)\r
- {\r
- /* Enable ERR, STOP, NACK, and ADDR interrupts */\r
- tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)\r
- {\r
- /* Enable ERR, TC, STOP, NACK and RXI interrupts */\r
- tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)\r
- {\r
- /* Enable ERR, TC, STOP, NACK and TXI interrupts */\r
- tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)\r
- {\r
- /* Enable STOP interrupts */\r
- tmpisr |= I2C_IT_STOPI;\r
- }\r
- }\r
-\r
- /* Enable interrupts only at the end */\r
- /* to avoid the risk of I2C interrupt handle execution before */\r
- /* all interrupts requested done */\r
- __HAL_I2C_ENABLE_IT(hi2c, tmpisr);\r
-}\r
-\r
-/**\r
- * @brief Manage the disabling of Interrupts.\r
- * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains\r
- * the configuration information for the specified I2C.\r
- * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition.\r
- * @retval None\r
- */\r
-static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest)\r
-{\r
- uint32_t tmpisr = 0U;\r
-\r
- if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT)\r
- {\r
- /* Disable TC and TXI interrupts */\r
- tmpisr |= I2C_IT_TCI | I2C_IT_TXI;\r
-\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- /* Disable NACK and STOP interrupts */\r
- tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;\r
- }\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT)\r
- {\r
- /* Disable TC and RXI interrupts */\r
- tmpisr |= I2C_IT_TCI | I2C_IT_RXI;\r
-\r
- if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN)\r
- {\r
- /* Disable NACK and STOP interrupts */\r
- tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;\r
- }\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT)\r
- {\r
- /* Disable ADDR, NACK and STOP interrupts */\r
- tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT)\r
- {\r
- /* Enable ERR and NACK interrupts */\r
- tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT)\r
- {\r
- /* Enable STOP interrupts */\r
- tmpisr |= I2C_IT_STOPI;\r
- }\r
-\r
- if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT)\r
- {\r
- /* Enable TC interrupts */\r
- tmpisr |= I2C_IT_TCI;\r
- }\r
-\r
- /* Disable interrupts only at the end */\r
- /* to avoid a breaking situation like at "t" time */\r
- /* all disable interrupts request are not done */\r
- __HAL_I2C_DISABLE_IT(hi2c, tmpisr);\r
-}\r
-\r
-/**\r
- * @brief Convert I2Cx OTHER_xxx XferOptions to functionnal XferOptions.\r
- * @param hi2c I2C handle.\r
- * @retval None\r
- */\r
-static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)\r
-{\r
- /* if user set XferOptions to I2C_OTHER_FRAME */\r
- /* it request implicitly to generate a restart condition */\r
- /* set XferOptions to I2C_FIRST_FRAME */\r
- if (hi2c->XferOptions == I2C_OTHER_FRAME)\r
- {\r
- hi2c->XferOptions = I2C_FIRST_FRAME;\r
- }\r
- /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */\r
- /* it request implicitly to generate a restart condition */\r
- /* then generate a stop condition at the end of transfer */\r
- /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */\r
- else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME)\r
- {\r
- hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME;\r
- }\r
- else\r
- {\r
- /* Nothing to do */\r
- }\r
-}\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-#endif /* HAL_I2C_MODULE_ENABLED */\r
-/**\r
- * @}\r
- */\r
-\r
-/**\r
- * @}\r
- */\r
-\r
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
projects / freertos / blobdiff