Update UltraScale R5 hardware definition and BSP for 2016.4 SDK tools.

[freertos] / FreeRTOS / Demo / CORTEX_R5_UltraScale_MPSoC / RTOSDemo_R5_bsp / psu_cortexr5_0 / libsrc / ipipsu_v2_1 / src / xipipsu_g.c

diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/ipipsu_v2_1/src/xipipsu_g.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/ipipsu_v2_1/src/xipipsu_g.c
index afbbc5809947d893a8952dff8e61776a15e8783a..d40c925a96fe833cbe3613bb9fc9e90851dd429b 100644 (file)
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/ipipsu_v2_1/src/xipipsu_g.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/ipipsu_v2_1/src/xipipsu_g.c
@@ -101,61 +101,5 @@ XIpiPsu_Config XIpiPsu_ConfigTable[] =
                                XPAR_PSU_IPI_10_BUFFER_INDEX\r
                        }\r
                }\r
-       },\r
-\r
-       {\r
-               XPAR_PSU_IPI_2_DEVICE_ID,\r
-               XPAR_PSU_IPI_2_BASE_ADDRESS,\r
-               XPAR_PSU_IPI_2_BIT_MASK,\r
-               XPAR_PSU_IPI_2_BUFFER_INDEX,\r
-               XPAR_PSU_IPI_2_INT_ID,\r
-               XPAR_XIPIPSU_NUM_TARGETS,\r
-               {\r
-\r
-                       {\r
-                               XPAR_PSU_IPI_0_BIT_MASK,\r
-                               XPAR_PSU_IPI_0_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_1_BIT_MASK,\r
-                               XPAR_PSU_IPI_1_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_2_BIT_MASK,\r
-                               XPAR_PSU_IPI_2_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_3_BIT_MASK,\r
-                               XPAR_PSU_IPI_3_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_4_BIT_MASK,\r
-                               XPAR_PSU_IPI_4_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_5_BIT_MASK,\r
-                               XPAR_PSU_IPI_5_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_6_BIT_MASK,\r
-                               XPAR_PSU_IPI_6_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_7_BIT_MASK,\r
-                               XPAR_PSU_IPI_7_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_8_BIT_MASK,\r
-                               XPAR_PSU_IPI_8_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_9_BIT_MASK,\r
-                               XPAR_PSU_IPI_9_BUFFER_INDEX\r
-                       },\r
-                       {\r
-                               XPAR_PSU_IPI_10_BIT_MASK,\r
-                               XPAR_PSU_IPI_10_BUFFER_INDEX\r
-                       }\r
-               }\r
        }\r
 };\r