/*\r
- FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.0.0\r
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software. If you wish to use our Amazon\r
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
/* Kernel includes. */\r
#include "FreeRTOS.h"\r
\r
/* The buffer used by the uIP stack. In this case the pointer is used to\r
point to one of the Rx buffers to effect a zero copy policy. */\r
-unsigned portCHAR *uip_buf;\r
+unsigned char *uip_buf;\r
\r
/* The DMA descriptors. This is a char array to allow us to align it correctly. */\r
-static unsigned portCHAR xFECTxDescriptors_unaligned[ ( fecNUM_FEC_TX_BUFFERS * sizeof( FECBD ) ) + 16 ];\r
-static unsigned portCHAR xFECRxDescriptors_unaligned[ ( configNUM_FEC_RX_BUFFERS * sizeof( FECBD ) ) + 16 ];\r
+static unsigned char xFECTxDescriptors_unaligned[ ( fecNUM_FEC_TX_BUFFERS * sizeof( FECBD ) ) + 16 ];\r
+static unsigned char xFECRxDescriptors_unaligned[ ( configNUM_FEC_RX_BUFFERS * sizeof( FECBD ) ) + 16 ];\r
static FECBD *xFECTxDescriptors;\r
static FECBD *xFECRxDescriptors;\r
\r
/* The DMA buffers. These are char arrays to allow them to be aligned correctly. */\r
-static unsigned portCHAR ucFECRxBuffers[ ( configNUM_FEC_RX_BUFFERS * configFEC_BUFFER_SIZE ) + 16 ];\r
+static unsigned char ucFECRxBuffers[ ( configNUM_FEC_RX_BUFFERS * configFEC_BUFFER_SIZE ) + 16 ];\r
static unsigned portBASE_TYPE uxNextRxBuffer = 0, uxIndexToBufferOwner = 0;\r
\r
/*-----------------------------------------------------------*/\r
* If after a suitable amount of time the event isn't triggered, a\r
* value of 0 is returned.\r
*/\r
-static int fec_mii_read( int phy_addr, int reg_addr, unsigned portSHORT* data )\r
+static int fec_mii_read( int phy_addr, int reg_addr, unsigned short* data )\r
{\r
int timeout, iReturn;\r
uint32 eimr;\r
* Return Value:\r
* The 6 most significant bits of the 32-bit CRC result\r
*/\r
-static unsigned portCHAR fec_hash_address( const unsigned portCHAR* addr )\r
+static unsigned char fec_hash_address( const unsigned char* addr )\r
{\r
-unsigned portLONG crc;\r
-unsigned portCHAR byte;\r
+unsigned long crc;\r
+unsigned char byte;\r
int i, j;\r
\r
crc = 0xFFFFFFFF;\r
}\r
}\r
\r
- return (unsigned portCHAR)(crc >> 26);\r
+ return (unsigned char)(crc >> 26);\r
}\r
\r
/********************************************************************/\r
* ch FEC channel\r
* pa Physical (Hardware) Address for the selected FEC\r
*/\r
-static void fec_set_address( const unsigned portCHAR *pa )\r
+static void fec_set_address( const unsigned char *pa )\r
{\r
- unsigned portCHAR crc;\r
+ unsigned char crc;\r
\r
/*\r
* Set the Physical Address\r
crc = fec_hash_address( pa );\r
if( crc >= 32 )\r
{\r
- MCF_FEC_IAUR |= (unsigned portLONG)(1 << (crc - 32));\r
+ MCF_FEC_IAUR |= (unsigned long)(1 << (crc - 32));\r
}\r
else\r
{\r
- MCF_FEC_IALR |= (unsigned portLONG)(1 << crc);\r
+ MCF_FEC_IALR |= (unsigned long)(1 << crc);\r
}\r
}\r
/*-----------------------------------------------------------*/\r
static void prvInitialiseFECBuffers( void )\r
{\r
unsigned portBASE_TYPE ux;\r
-unsigned portCHAR *pcBufPointer;\r
+unsigned char *pcBufPointer;\r
\r
/* Correctly align the Tx descriptor pointer. */\r
pcBufPointer = &( xFECTxDescriptors_unaligned[ 0 ] );\r
- while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )\r
+ while( ( ( unsigned long ) pcBufPointer & 0x0fUL ) != 0 )\r
{\r
pcBufPointer++;\r
}\r
\r
/* Likewise the Rx descriptor pointer. */\r
pcBufPointer = &( xFECRxDescriptors_unaligned[ 0 ] );\r
- while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )\r
+ while( ( ( unsigned long ) pcBufPointer & 0x0fUL ) != 0 )\r
{\r
pcBufPointer++;\r
}\r
/* Setup the Rx buffers and descriptors, having first ensured correct\r
alignment. */\r
pcBufPointer = &( ucFECRxBuffers[ 0 ] );\r
- while( ( ( unsigned portLONG ) pcBufPointer & 0x0fUL ) != 0 )\r
+ while( ( ( unsigned long ) pcBufPointer & 0x0fUL ) != 0 )\r
{\r
pcBufPointer++;\r
}\r
\r
void vFECInit( void )\r
{\r
-unsigned portSHORT usData;\r
+unsigned short usData;\r
struct uip_eth_addr xAddr;\r
unsigned portBASE_TYPE ux;\r
\r
/* The MAC address is set at the foot of FreeRTOSConfig.h. */\r
-const unsigned portCHAR ucMACAddress[6] =\r
+const unsigned char ucMACAddress[6] =\r
{\r
configMAC_0, configMAC_1,configMAC_2, configMAC_3, configMAC_4, configMAC_5\r
};\r
\r
if( ( usData & PHY_ANLPAR_100BTX_FDX ) || ( usData & PHY_ANLPAR_10BTX_FDX ) )\r
{\r
- MCF_FEC_RCR &= (unsigned portLONG)~MCF_FEC_RCR_DRT;\r
+ MCF_FEC_RCR &= (unsigned long)~MCF_FEC_RCR_DRT;\r
MCF_FEC_TCR |= MCF_FEC_TCR_FDEN;\r
}\r
else\r
{\r
MCF_FEC_RCR |= MCF_FEC_RCR_DRT;\r
- MCF_FEC_TCR &= (unsigned portLONG)~MCF_FEC_TCR_FDEN;\r
+ MCF_FEC_TCR &= (unsigned long)~MCF_FEC_TCR_FDEN;\r
}\r
\r
/* Clear the Individual and Group Address Hash registers */\r
fec_set_address( ucMACAddress );\r
\r
/* Set Rx Buffer Size */\r
- MCF_FEC_EMRBR = (unsigned portSHORT)configFEC_BUFFER_SIZE;\r
+ MCF_FEC_EMRBR = (unsigned short)configFEC_BUFFER_SIZE;\r
\r
/* Point to the start of the circular Rx buffer descriptor queue */\r
- MCF_FEC_ERDSR = ( volatile unsigned portLONG ) &( xFECRxDescriptors[ 0 ] );\r
+ MCF_FEC_ERDSR = ( volatile unsigned long ) &( xFECRxDescriptors[ 0 ] );\r
\r
/* Point to the start of the circular Tx buffer descriptor queue */\r
- MCF_FEC_ETSDR = ( volatile unsigned portLONG ) &( xFECTxDescriptors[ 0 ] );\r
+ MCF_FEC_ETSDR = ( volatile unsigned long ) &( xFECTxDescriptors[ 0 ] );\r
\r
/* Mask all FEC interrupts */\r
- MCF_FEC_EIMR = ( unsigned portLONG ) -1;\r
+ MCF_FEC_EIMR = ( unsigned long ) -1;\r
\r
/* Clear all FEC interrupt events */\r
- MCF_FEC_EIR = ( unsigned portLONG ) -1;\r
+ MCF_FEC_EIR = ( unsigned long ) -1;\r
\r
/* Initialize the Receive Control Register */\r
MCF_FEC_RCR = MCF_FEC_RCR_MAX_FL(ETH_MAX_FRM) | MCF_FEC_RCR_FCE;\r
\r
unsigned short usFECGetRxedData( void )\r
{\r
-unsigned portSHORT usLen;\r
+unsigned short usLen;\r
\r
/* Obtain the size of the packet and put it into the "len" variable. */\r
usLen = xFECRxDescriptors[ uxNextRxBuffer ].length;\r
\r
void vFEC_ISR( void )\r
{\r
-unsigned portLONG ulEvent;\r
+unsigned long ulEvent;\r
portBASE_TYPE xHighPriorityTaskWoken = pdFALSE;\r
\r
/* This handler is called in response to any of the many separate FEC\r