]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/Common/ARMv8M/mpu_demo/mpu_demo.c
Do not strip required symbols when LTO is on
[freertos] / FreeRTOS / Demo / Common / ARMv8M / mpu_demo / mpu_demo.c
index 7bb526bf481b7b9916598150bee60acc49e51406..45a8910cb3bc8238d970ecbb0b0110ee95ea511b 100644 (file)
@@ -162,9 +162,10 @@ TaskParameters_t xRWAccessTaskParameters =
 }\r
 /*-----------------------------------------------------------*/\r
 \r
-void vHandleMemoryFault( uint32_t * pulFaultStackAddress )\r
+portDONT_DISCARD void vHandleMemoryFault( uint32_t * pulFaultStackAddress )\r
 {\r
 uint32_t ulPC;\r
+uint16_t usOffendingInstruction;\r
 \r
        /* Is this an expected fault? */\r
        if( ucROTaskFaultTracker[ 0 ] == 1 )\r
@@ -172,8 +173,41 @@ uint32_t ulPC;
                /* Read program counter. */\r
                ulPC = pulFaultStackAddress[ 6 ];\r
 \r
-               /* Increment the program counter by 2 to move to the next instruction. */\r
-               ulPC += 2;\r
+               /* Read the offending instruction. */\r
+               usOffendingInstruction = *( uint16_t * )ulPC;\r
+\r
+               /* From ARM docs:\r
+                * If the value of bits[15:11] of the halfword being decoded is one of\r
+                * the following, the halfword is the first halfword of a 32-bit\r
+                * instruction:\r
+                * - 0b11101.\r
+                * - 0b11110.\r
+                * - 0b11111.\r
+                * Otherwise, the halfword is a 16-bit instruction.\r
+                */\r
+\r
+               /* Extract bits[15:11] of the offending instruction. */\r
+               usOffendingInstruction = usOffendingInstruction & 0xF800;\r
+               usOffendingInstruction = ( usOffendingInstruction >> 11 );\r
+\r
+               /* Determine if the offending instruction is a 32-bit instruction or\r
+                * a 16-bit instruction. */\r
+               if( usOffendingInstruction == 0x001F ||\r
+                       usOffendingInstruction == 0x001E ||\r
+                       usOffendingInstruction == 0x001D )\r
+               {\r
+                       /* Since the offending instruction is a 32-bit instruction,\r
+                        * increment the program counter by 4 to move to the next\r
+                        * instruction. */\r
+                       ulPC += 4;\r
+               }\r
+               else\r
+               {\r
+                       /* Since the offending instruction is a 16-bit instruction,\r
+                        * increment the program counter by 2 to move to the next\r
+                        * instruction. */\r
+                       ulPC += 2;\r
+               }\r
 \r
                /* Save the new program counter on the stack. */\r
                pulFaultStackAddress[ 6 ] = ulPC;\r