Update RISC-V_IGLOO2_Creative_SoftConsole demo to make use of new RISC-V porting...

[freertos] / FreeRTOS / Demo / RISC-V_IGLOO2_Creative_SoftConsole / Microsemi_Code / riscv_hal / microsemi-riscv-igloo2.ld

diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/Microsemi_Code/riscv_hal/microsemi-riscv-igloo2.ld b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/Microsemi_Code/riscv_hal/microsemi-riscv-igloo2.ld
index 99d1c10dd143db3cc22dc8563ff3c1ecbff8f319..68d030d72b1c99cdd2962957a88dc68c22c6bfb1 100644 (file)
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/Microsemi_Code/riscv_hal/microsemi-riscv-igloo2.ld
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/Microsemi_Code/riscv_hal/microsemi-riscv-igloo2.ld
@@ -1,17 +1,17 @@
 /*******************************************************************************\r
  * (c) Copyright 2016-2018 Microsemi SoC Products Group.  All rights reserved.\r
- * \r
+ *\r
  * file name : microsemi-riscv-igloo2.ld\r
  * Mi-V soft processor linker script for creating a SoftConsole downloadable\r
  * image executing in eNVM.\r
- * \r
+ *\r
  * This linker script assumes that the eNVM is connected at on the Mi-V soft\r
- * processor memory space. \r
+ * processor memory space.\r
  *\r
  * SVN $Revision: 9661 $\r
  * SVN $Date: 2018-01-15 16:13:33 +0530 (Mon, 15 Jan 2018) $\r
  */\r
- \r
+\r
 OUTPUT_ARCH( "riscv" )\r
 ENTRY(_start)\r
 \r
@@ -24,19 +24,19 @@ MEMORY
 \r
 RAM_START_ADDRESS   = 0x80000000;       /* Must be the same value MEMORY region ram ORIGIN above. */\r
 RAM_SIZE            = 64k;              /* Must be the same value MEMORY region ram LENGTH above. */\r
-STACK_SIZE          = 2k;               /* needs to be calculated for your application */             \r
+STACK_SIZE          = 2k;               /* needs to be calculated for your application */\r
 HEAP_SIZE           = 2k;               /* needs to be calculated for your application */\r
 \r
 SECTIONS\r
 {\r
   .text : ALIGN(0x10)\r
   {\r
-    KEEP (*(SORT_NONE(.text.entry)))   \r
+    KEEP (*(SORT_NONE(.text.entry)))\r
     . = ALIGN(0x10);\r
     *(.text .text.* .gnu.linkonce.t.*)\r
     *(.plt)\r
     . = ALIGN(0x10);\r
-    \r
+\r
     KEEP (*crtbegin.o(.ctors))\r
     KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))\r
     KEEP (*(SORT(.ctors.*)))\r
@@ -45,12 +45,12 @@ SECTIONS
     KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))\r
     KEEP (*(SORT(.dtors.*)))\r
     KEEP (*crtend.o(.dtors))\r
-    \r
+\r
     *(.rodata .rodata.* .gnu.linkonce.r.*)\r
-    *(.gcc_except_table) \r
+    *(.gcc_except_table)\r
     *(.eh_frame_hdr)\r
     *(.eh_frame)\r
-    \r
+\r
     KEEP (*(.init))\r
     KEEP (*(.fini))\r
 \r
@@ -66,14 +66,14 @@ SECTIONS
     KEEP (*(SORT(.fini_array.*)))\r
     PROVIDE_HIDDEN (__fini_array_end = .);\r
     . = ALIGN(0x10);\r
-    \r
+\r
   } >envm\r
 \r
   /* short/global data section */\r
   .sdata : ALIGN(0x10)\r
   {\r
     __sdata_load = LOADADDR(.sdata);\r
-    __sdata_start = .; \r
+    __sdata_start = .;\r
     PROVIDE( __global_pointer$ = . + 0x800);\r
     *(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2)\r
     *(.srodata*)\r
@@ -84,9 +84,9 @@ SECTIONS
 \r
   /* data section */\r
   .data : ALIGN(0x10)\r
-  { \r
+  {\r
     __data_load = LOADADDR(.data);\r
-    __data_start = .; \r
+    __data_start = .;\r
     *(.got.plt) *(.got)\r
     *(.shdata)\r
     *(.data .data.* .gnu.linkonce.d.*)\r
@@ -103,10 +103,10 @@ SECTIONS
     . = ALIGN(0x10);\r
     __sbss_end = .;\r
   } > ram\r
-  \r
+\r
   /* sbss section */\r
   .bss : ALIGN(0x10)\r
-  { \r
+  {\r
     __bss_start = .;\r
     *(.shbss)\r
     *(.bss .bss.* .gnu.linkonce.b.*)\r
@@ -117,7 +117,7 @@ SECTIONS
 \r
   /* End of uninitialized data segment */\r
   _end = .;\r
-  \r
+\r
   .heap : ALIGN(0x10)\r
   {\r
     __heap_start = .;\r
@@ -126,13 +126,14 @@ SECTIONS
     . = ALIGN(0x10);\r
     _heap_end = __heap_end;\r
   } > ram\r
-  \r
+\r
   .stack : ALIGN(0x10)\r
   {\r
     __stack_bottom = .;\r
     . += STACK_SIZE;\r
     __stack_top = .;\r
     _sp = .;\r
+       __freertos_irq_stack_top = .;\r
   } > ram\r
 }\r
 \r