Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup check in...

[freertos] / FreeRTOS / Demo / RISC-V_RV32_SiFive_HiFive1_GCC / bsp / metal.default.lds

diff --git a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds
index 1d45a92664c4f5465340d18824959c0f699c8510..7070af7e864e6f0000e9472e962ff3767bae4894 100644 (file)
--- a/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds
+++ b/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1_GCC/bsp/metal.default.lds
@@ -26,7 +26,7 @@ SECTIONS
 {
        __stack_size = DEFINED(__stack_size) ? __stack_size : 0x400;
        PROVIDE(__stack_size = __stack_size);
-       __heap_size = DEFINED(__heap_size) ? __heap_size : 0x400;
+       __heap_size = DEFINED(__heap_size) ? __heap_size : 0x4;
        PROVIDE(__metal_boot_hart = 0);
        PROVIDE(__metal_chicken_bit = 0);
 
@@ -216,7 +216,8 @@ SECTIONS
                . = ALIGN(16);
                metal_segment_stack_begin = .;
                . += __stack_size;
-               _sp = .;
+               . = ALIGN(16);
+               _sp = .;                
                PROVIDE(metal_segment_stack_end = .);
                __freertos_irq_stack_top = .;
        } >ram AT>ram :ram