--- /dev/null
+/***********************************************************************/
+/* */
+/* PROJECT NAME : RL78L13 */
+/* FILE : iodefine.h */
+/* DESCRIPTION : Definition of I/O Registers */
+/* CPU SERIES : RL78 - L13 */
+/* CPU TYPE : R5F10WMG */
+/* */
+/* This file is generated by e2studio. */
+/* */
+/***********************************************************************/ \r
+ \r
+/************************************************************************/\r
+/* Header file generated from device file: */\r
+/* DR5F10WMG.DVF */\r
+/* Copyright(C) 2012 Renesas */\r
+/* Version E1.00d */\r
+/************************************************************************/\r
+\r
+#ifndef __IOREG_BIT_STRUCTURES\r
+#define __IOREG_BIT_STRUCTURES\r
+typedef struct {\r
+ unsigned char no0 :1;\r
+ unsigned char no1 :1;\r
+ unsigned char no2 :1;\r
+ unsigned char no3 :1;\r
+ unsigned char no4 :1;\r
+ unsigned char no5 :1;\r
+ unsigned char no6 :1;\r
+ unsigned char no7 :1;\r
+} __BITS8;\r
+\r
+typedef struct {\r
+ unsigned short no0 :1;\r
+ unsigned short no1 :1;\r
+ unsigned short no2 :1;\r
+ unsigned short no3 :1;\r
+ unsigned short no4 :1;\r
+ unsigned short no5 :1;\r
+ unsigned short no6 :1;\r
+ unsigned short no7 :1;\r
+ unsigned short no8 :1;\r
+ unsigned short no9 :1;\r
+ unsigned short no10 :1;\r
+ unsigned short no11 :1;\r
+ unsigned short no12 :1;\r
+ unsigned short no13 :1;\r
+ unsigned short no14 :1;\r
+ unsigned short no15 :1;\r
+} __BITS16;\r
+\r
+#endif\r
+\r
+#ifndef IODEFINE_H\r
+#define IODEFINE_H\r
+\r
+/*\r
+ IO Registers\r
+ */\r
+union un_p0 {\r
+ unsigned char p0;\r
+ __BITS8 BIT;\r
+};\r
+union un_p1 {\r
+ unsigned char p1;\r
+ __BITS8 BIT;\r
+};\r
+union un_p2 {\r
+ unsigned char p2;\r
+ __BITS8 BIT;\r
+};\r
+union un_p3 {\r
+ unsigned char p3;\r
+ __BITS8 BIT;\r
+};\r
+union un_p4 {\r
+ unsigned char p4;\r
+ __BITS8 BIT;\r
+};\r
+union un_p5 {\r
+ unsigned char p5;\r
+ __BITS8 BIT;\r
+};\r
+union un_p6 {\r
+ unsigned char p6;\r
+ __BITS8 BIT;\r
+};\r
+union un_p7 {\r
+ unsigned char p7;\r
+ __BITS8 BIT;\r
+};\r
+union un_p12 {\r
+ unsigned char p12;\r
+ __BITS8 BIT;\r
+};\r
+union un_p13 {\r
+ unsigned char p13;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm0 {\r
+ unsigned char pm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm1 {\r
+ unsigned char pm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm2 {\r
+ unsigned char pm2;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm3 {\r
+ unsigned char pm3;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm4 {\r
+ unsigned char pm4;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm5 {\r
+ unsigned char pm5;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm6 {\r
+ unsigned char pm6;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm7 {\r
+ unsigned char pm7;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm12 {\r
+ unsigned char pm12;\r
+ __BITS8 BIT;\r
+};\r
+union un_pm13 {\r
+ unsigned char pm13;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm0 {\r
+ unsigned char adm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_ads {\r
+ unsigned char ads;\r
+ __BITS8 BIT;\r
+};\r
+union un_adm1 {\r
+ unsigned char adm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_krctl {\r
+ unsigned char krctl;\r
+ __BITS8 BIT;\r
+};\r
+union un_krm0 {\r
+ unsigned char krm0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egp0 {\r
+ unsigned char egp0;\r
+ __BITS8 BIT;\r
+};\r
+union un_egn0 {\r
+ unsigned char egn0;\r
+ __BITS8 BIT;\r
+};\r
+union un_lcdm1 {\r
+ unsigned char lcdm1;\r
+ __BITS8 BIT;\r
+};\r
+union un_mlcd {\r
+ unsigned char mlcd;\r
+ __BITS8 BIT;\r
+};\r
+union un_iics0 {\r
+ unsigned char iics0;\r
+ __BITS8 BIT;\r
+};\r
+union un_iicf0 {\r
+ unsigned char iicf0;\r
+ __BITS8 BIT;\r
+};\r
+union un_flars {\r
+ unsigned char flars;\r
+ __BITS8 BIT;\r
+};\r
+union un_fssq {\r
+ unsigned char fssq;\r
+ __BITS8 BIT;\r
+};\r
+union un_flrst {\r
+ unsigned char flrst;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsastl {\r
+ unsigned char fsastl;\r
+ __BITS8 BIT;\r
+};\r
+union un_fsasth {\r
+ unsigned char fsasth;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc0 {\r
+ unsigned char rtcc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_rtcc1 {\r
+ unsigned char rtcc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_csc {\r
+ unsigned char csc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ostc {\r
+ unsigned char ostc;\r
+ __BITS8 BIT;\r
+};\r
+union un_ckc {\r
+ unsigned char ckc;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks0 {\r
+ unsigned char cks0;\r
+ __BITS8 BIT;\r
+};\r
+union un_cks1 {\r
+ unsigned char cks1;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvim {\r
+ unsigned char lvim;\r
+ __BITS8 BIT;\r
+};\r
+union un_lvis {\r
+ unsigned char lvis;\r
+ __BITS8 BIT;\r
+};\r
+union un_monsta0 {\r
+ unsigned char monsta0;\r
+ __BITS8 BIT;\r
+};\r
+union un_asim {\r
+ unsigned char asim;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc0 {\r
+ unsigned char dmc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_dmc1 {\r
+ unsigned char dmc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc0 {\r
+ unsigned char drc0;\r
+ __BITS8 BIT;\r
+};\r
+union un_drc1 {\r
+ unsigned char drc1;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2 {\r
+ unsigned short if2;\r
+ __BITS16 BIT;\r
+};\r
+union un_if2l {\r
+ unsigned char if2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if2h {\r
+ unsigned char if2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if3 {\r
+ unsigned short if3;\r
+ __BITS16 BIT;\r
+};\r
+union un_if3l {\r
+ unsigned char if3l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2 {\r
+ unsigned short mk2;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk2l {\r
+ unsigned char mk2l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk2h {\r
+ unsigned char mk2h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk3 {\r
+ unsigned short mk3;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk3l {\r
+ unsigned char mk3l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02 {\r
+ unsigned short pr02;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr02l {\r
+ unsigned char pr02l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr02h {\r
+ unsigned char pr02h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr03 {\r
+ unsigned short pr03;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr03l {\r
+ unsigned char pr03l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12 {\r
+ unsigned short pr12;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr12l {\r
+ unsigned char pr12l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr12h {\r
+ unsigned char pr12h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr13 {\r
+ unsigned short pr13;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr13l {\r
+ unsigned char pr13l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0 {\r
+ unsigned short if0;\r
+ __BITS16 BIT;\r
+};\r
+union un_if0l {\r
+ unsigned char if0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if0h {\r
+ unsigned char if0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1 {\r
+ unsigned short if1;\r
+ __BITS16 BIT;\r
+};\r
+union un_if1l {\r
+ unsigned char if1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_if1h {\r
+ unsigned char if1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0 {\r
+ unsigned short mk0;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk0l {\r
+ unsigned char mk0l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk0h {\r
+ unsigned char mk0h;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1 {\r
+ unsigned short mk1;\r
+ __BITS16 BIT;\r
+};\r
+union un_mk1l {\r
+ unsigned char mk1l;\r
+ __BITS8 BIT;\r
+};\r
+union un_mk1h {\r
+ unsigned char mk1h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00 {\r
+ unsigned short pr00;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr00l {\r
+ unsigned char pr00l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr00h {\r
+ unsigned char pr00h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01 {\r
+ unsigned short pr01;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr01l {\r
+ unsigned char pr01l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr01h {\r
+ unsigned char pr01h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10 {\r
+ unsigned short pr10;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr10l {\r
+ unsigned char pr10l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr10h {\r
+ unsigned char pr10h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11 {\r
+ unsigned short pr11;\r
+ __BITS16 BIT;\r
+};\r
+union un_pr11l {\r
+ unsigned char pr11l;\r
+ __BITS8 BIT;\r
+};\r
+union un_pr11h {\r
+ unsigned char pr11h;\r
+ __BITS8 BIT;\r
+};\r
+union un_pmc {\r
+ unsigned char pmc;\r
+ __BITS8 BIT;\r
+};\r
+\r
+#define P0 (*(volatile union un_p0 *)0xFFF00).p0\r
+#define P0_bit (*(volatile union un_p0 *)0xFFF00).BIT\r
+#define P1 (*(volatile union un_p1 *)0xFFF01).p1\r
+#define P1_bit (*(volatile union un_p1 *)0xFFF01).BIT\r
+#define P2 (*(volatile union un_p2 *)0xFFF02).p2\r
+#define P2_bit (*(volatile union un_p2 *)0xFFF02).BIT\r
+#define P3 (*(volatile union un_p3 *)0xFFF03).p3\r
+#define P3_bit (*(volatile union un_p3 *)0xFFF03).BIT\r
+#define P4 (*(volatile union un_p4 *)0xFFF04).p4\r
+#define P4_bit (*(volatile union un_p4 *)0xFFF04).BIT\r
+#define P5 (*(volatile union un_p5 *)0xFFF05).p5\r
+#define P5_bit (*(volatile union un_p5 *)0xFFF05).BIT\r
+#define P6 (*(volatile union un_p6 *)0xFFF06).p6\r
+#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT\r
+#define P7 (*(volatile union un_p7 *)0xFFF07).p7\r
+#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT\r
+#define P12 (*(volatile union un_p12 *)0xFFF0C).p12\r
+#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT\r
+#define P13 (*(volatile union un_p13 *)0xFFF0D).p13\r
+#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT\r
+#define SDR00 (*(volatile unsigned short *)0xFFF10)\r
+#define SIO00 (*(volatile unsigned char *)0xFFF10)\r
+#define TXD0 (*(volatile unsigned char *)0xFFF10)\r
+#define SDR01 (*(volatile unsigned short *)0xFFF12)\r
+#define RXD0 (*(volatile unsigned char *)0xFFF12)\r
+#define SDR12 (*(volatile unsigned short *)0xFFF14)\r
+#define TXD3 (*(volatile unsigned char *)0xFFF14)\r
+#define SDR13 (*(volatile unsigned short *)0xFFF16)\r
+#define RXD3 (*(volatile unsigned char *)0xFFF16)\r
+#define TDR00 (*(volatile unsigned short *)0xFFF18)\r
+#define TDR01 (*(volatile unsigned short *)0xFFF1A)\r
+#define TDR01L (*(volatile unsigned char *)0xFFF1A)\r
+#define TDR01H (*(volatile unsigned char *)0xFFF1B)\r
+#define ADCR (*(volatile unsigned short *)0xFFF1E)\r
+#define ADCRH (*(volatile unsigned char *)0xFFF1F)\r
+#define PM0 (*(volatile union un_pm0 *)0xFFF20).pm0\r
+#define PM0_bit (*(volatile union un_pm0 *)0xFFF20).BIT\r
+#define PM1 (*(volatile union un_pm1 *)0xFFF21).pm1\r
+#define PM1_bit (*(volatile union un_pm1 *)0xFFF21).BIT\r
+#define PM2 (*(volatile union un_pm2 *)0xFFF22).pm2\r
+#define PM2_bit (*(volatile union un_pm2 *)0xFFF22).BIT\r
+#define PM3 (*(volatile union un_pm3 *)0xFFF23).pm3\r
+#define PM3_bit (*(volatile union un_pm3 *)0xFFF23).BIT\r
+#define PM4 (*(volatile union un_pm4 *)0xFFF24).pm4\r
+#define PM4_bit (*(volatile union un_pm4 *)0xFFF24).BIT\r
+#define PM5 (*(volatile union un_pm5 *)0xFFF25).pm5\r
+#define PM5_bit (*(volatile union un_pm5 *)0xFFF25).BIT\r
+#define PM6 (*(volatile union un_pm6 *)0xFFF26).pm6\r
+#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT\r
+#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7\r
+#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT\r
+#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12\r
+#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT\r
+#define PM13 (*(volatile union un_pm13 *)0xFFF2D).pm13\r
+#define PM13_bit (*(volatile union un_pm13 *)0xFFF2D).BIT\r
+#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0\r
+#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT\r
+#define ADS (*(volatile union un_ads *)0xFFF31).ads\r
+#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT\r
+#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1\r
+#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT\r
+#define KRCTL (*(volatile union un_krctl *)0xFFF34).krctl\r
+#define KRCTL_bit (*(volatile union un_krctl *)0xFFF34).BIT\r
+#define KRF (*(volatile unsigned char *)0xFFF35)\r
+#define KRM0 (*(volatile union un_krm0 *)0xFFF37).krm0\r
+#define KRM0_bit (*(volatile union un_krm0 *)0xFFF37).BIT\r
+#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0\r
+#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT\r
+#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0\r
+#define EGN0_bit (*(volatile union un_egn0 *)0xFFF39).BIT\r
+#define LCDM0 (*(volatile unsigned char *)0xFFF40)\r
+#define LCDM1 (*(volatile union un_lcdm1 *)0xFFF41).lcdm1\r
+#define LCDM1_bit (*(volatile union un_lcdm1 *)0xFFF41).BIT\r
+#define LCDC0 (*(volatile unsigned char *)0xFFF42)\r
+#define VLCD (*(volatile unsigned char *)0xFFF43)\r
+#define SDR02 (*(volatile unsigned short *)0xFFF44)\r
+#define SIO10 (*(volatile unsigned char *)0xFFF44)\r
+#define TXD1 (*(volatile unsigned char *)0xFFF44)\r
+#define SDR03 (*(volatile unsigned short *)0xFFF46)\r
+#define RXD1 (*(volatile unsigned char *)0xFFF46)\r
+#define SDR10 (*(volatile unsigned short *)0xFFF48)\r
+#define TXD2 (*(volatile unsigned char *)0xFFF48)\r
+#define SDR11 (*(volatile unsigned short *)0xFFF4A)\r
+#define RXD2 (*(volatile unsigned char *)0xFFF4A)\r
+#define MLCD (*(volatile union un_mlcd *)0xFFF4C).mlcd\r
+#define MLCD_bit (*(volatile union un_mlcd *)0xFFF4C).BIT\r
+#define IICA0 (*(volatile unsigned char *)0xFFF50)\r
+#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0\r
+#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT\r
+#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0\r
+#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT\r
+#define TDR02 (*(volatile unsigned short *)0xFFF64)\r
+#define TDR03 (*(volatile unsigned short *)0xFFF66)\r
+#define TDR03L (*(volatile unsigned char *)0xFFF66)\r
+#define TDR03H (*(volatile unsigned char *)0xFFF67)\r
+#define TDR04 (*(volatile unsigned short *)0xFFF68)\r
+#define TDR05 (*(volatile unsigned short *)0xFFF6A)\r
+#define TDR06 (*(volatile unsigned short *)0xFFF6C)\r
+#define TDR07 (*(volatile unsigned short *)0xFFF6E)\r
+#define FLPMC (*(volatile unsigned char *)0xFFF80)\r
+#define FLARS (*(volatile union un_flars *)0xFFF81).flars\r
+#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT\r
+#define FLAPL (*(volatile unsigned short *)0xFFF82)\r
+#define FLAPH (*(volatile unsigned char *)0xFFF84)\r
+#define FSSQ (*(volatile union un_fssq *)0xFFF85).fssq\r
+#define FSSQ_bit (*(volatile union un_fssq *)0xFFF85).BIT\r
+#define FLSEDL (*(volatile unsigned short *)0xFFF86)\r
+#define FLSEDH (*(volatile unsigned char *)0xFFF88)\r
+#define FLRST (*(volatile union un_flrst *)0xFFF89).flrst\r
+#define FLRST_bit (*(volatile union un_flrst *)0xFFF89).BIT\r
+#define FSASTL (*(volatile union un_fsastl *)0xFFF8A).fsastl\r
+#define FSASTL_bit (*(volatile union un_fsastl *)0xFFF8A).BIT\r
+#define FSASTH (*(volatile union un_fsasth *)0xFFF8B).fsasth\r
+#define FSASTH_bit (*(volatile union un_fsasth *)0xFFF8B).BIT\r
+#define FLWL (*(volatile unsigned short *)0xFFF8C)\r
+#define FLWH (*(volatile unsigned short *)0xFFF8E)\r
+#define ITMC (*(volatile unsigned short *)0xFFF90)\r
+#define SEC (*(volatile unsigned char *)0xFFF92)\r
+#define MIN (*(volatile unsigned char *)0xFFF93)\r
+#define HOUR (*(volatile unsigned char *)0xFFF94)\r
+#define WEEK (*(volatile unsigned char *)0xFFF95)\r
+#define DAY (*(volatile unsigned char *)0xFFF96)\r
+#define MONTH (*(volatile unsigned char *)0xFFF97)\r
+#define YEAR (*(volatile unsigned char *)0xFFF98)\r
+#define ALARMWM (*(volatile unsigned char *)0xFFF9A)\r
+#define ALARMWH (*(volatile unsigned char *)0xFFF9B)\r
+#define ALARMWW (*(volatile unsigned char *)0xFFF9C)\r
+#define RTCC0 (*(volatile union un_rtcc0 *)0xFFF9D).rtcc0\r
+#define RTCC0_bit (*(volatile union un_rtcc0 *)0xFFF9D).BIT\r
+#define RTCC1 (*(volatile union un_rtcc1 *)0xFFF9E).rtcc1\r
+#define RTCC1_bit (*(volatile union un_rtcc1 *)0xFFF9E).BIT\r
+#define CMC (*(volatile unsigned char *)0xFFFA0)\r
+#define CSC (*(volatile union un_csc *)0xFFFA1).csc\r
+#define CSC_bit (*(volatile union un_csc *)0xFFFA1).BIT\r
+#define OSTC (*(volatile union un_ostc *)0xFFFA2).ostc\r
+#define OSTC_bit (*(volatile union un_ostc *)0xFFFA2).BIT\r
+#define OSTS (*(volatile unsigned char *)0xFFFA3)\r
+#define CKC (*(volatile union un_ckc *)0xFFFA4).ckc\r
+#define CKC_bit (*(volatile union un_ckc *)0xFFFA4).BIT\r
+#define CKS0 (*(volatile union un_cks0 *)0xFFFA5).cks0\r
+#define CKS0_bit (*(volatile union un_cks0 *)0xFFFA5).BIT\r
+#define CKS1 (*(volatile union un_cks1 *)0xFFFA6).cks1\r
+#define CKS1_bit (*(volatile union un_cks1 *)0xFFFA6).BIT\r
+#define RESF (*(volatile unsigned char *)0xFFFA8)\r
+#define LVIM (*(volatile union un_lvim *)0xFFFA9).lvim\r
+#define LVIM_bit (*(volatile union un_lvim *)0xFFFA9).BIT\r
+#define LVIS (*(volatile union un_lvis *)0xFFFAA).lvis\r
+#define LVIS_bit (*(volatile union un_lvis *)0xFFFAA).BIT\r
+#define WDTE (*(volatile unsigned char *)0xFFFAB)\r
+#define CRCIN (*(volatile unsigned char *)0xFFFAC)\r
+#define RXB (*(volatile unsigned char *)0xFFFAD)\r
+#define TXS (*(volatile unsigned char *)0xFFFAD)\r
+#define MONSTA0 (*(volatile union un_monsta0 *)0xFFFAE).monsta0\r
+#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT\r
+#define ASIM (*(volatile union un_asim *)0xFFFAF).asim\r
+#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT\r
+#define DSA0 (*(volatile unsigned char *)0xFFFB0)\r
+#define DSA1 (*(volatile unsigned char *)0xFFFB1)\r
+#define DRA0 (*(volatile unsigned short *)0xFFFB2)\r
+#define DRA0L (*(volatile unsigned char *)0xFFFB2)\r
+#define DRA0H (*(volatile unsigned char *)0xFFFB3)\r
+#define DRA1 (*(volatile unsigned short *)0xFFFB4)\r
+#define DRA1L (*(volatile unsigned char *)0xFFFB4)\r
+#define DRA1H (*(volatile unsigned char *)0xFFFB5)\r
+#define DBC0 (*(volatile unsigned short *)0xFFFB6)\r
+#define DBC0L (*(volatile unsigned char *)0xFFFB6)\r
+#define DBC0H (*(volatile unsigned char *)0xFFFB7)\r
+#define DBC1 (*(volatile unsigned short *)0xFFFB8)\r
+#define DBC1L (*(volatile unsigned char *)0xFFFB8)\r
+#define DBC1H (*(volatile unsigned char *)0xFFFB9)\r
+#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0\r
+#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT\r
+#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1\r
+#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT\r
+#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0\r
+#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT\r
+#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1\r
+#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT\r
+#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2\r
+#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT\r
+#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l\r
+#define IF2L_bit (*(volatile union un_if2l *)0xFFFD0).BIT\r
+#define IF2H (*(volatile union un_if2h *)0xFFFD1).if2h\r
+#define IF2H_bit (*(volatile union un_if2h *)0xFFFD1).BIT\r
+#define IF3 (*(volatile union un_if3 *)0xFFFD2).if3\r
+#define IF3_bit (*(volatile union un_if3 *)0xFFFD2).BIT\r
+#define IF3L (*(volatile union un_if3l *)0xFFFD2).if3l\r
+#define IF3L_bit (*(volatile union un_if3l *)0xFFFD2).BIT\r
+#define MK2 (*(volatile union un_mk2 *)0xFFFD4).mk2\r
+#define MK2_bit (*(volatile union un_mk2 *)0xFFFD4).BIT\r
+#define MK2L (*(volatile union un_mk2l *)0xFFFD4).mk2l\r
+#define MK2L_bit (*(volatile union un_mk2l *)0xFFFD4).BIT\r
+#define MK2H (*(volatile union un_mk2h *)0xFFFD5).mk2h\r
+#define MK2H_bit (*(volatile union un_mk2h *)0xFFFD5).BIT\r
+#define MK3 (*(volatile union un_mk3 *)0xFFFD6).mk3\r
+#define MK3_bit (*(volatile union un_mk3 *)0xFFFD6).BIT\r
+#define MK3L (*(volatile union un_mk3l *)0xFFFD6).mk3l\r
+#define MK3L_bit (*(volatile union un_mk3l *)0xFFFD6).BIT\r
+#define PR02 (*(volatile union un_pr02 *)0xFFFD8).pr02\r
+#define PR02_bit (*(volatile union un_pr02 *)0xFFFD8).BIT\r
+#define PR02L (*(volatile union un_pr02l *)0xFFFD8).pr02l\r
+#define PR02L_bit (*(volatile union un_pr02l *)0xFFFD8).BIT\r
+#define PR02H (*(volatile union un_pr02h *)0xFFFD9).pr02h\r
+#define PR02H_bit (*(volatile union un_pr02h *)0xFFFD9).BIT\r
+#define PR03 (*(volatile union un_pr03 *)0xFFFDA).pr03\r
+#define PR03_bit (*(volatile union un_pr03 *)0xFFFDA).BIT\r
+#define PR03L (*(volatile union un_pr03l *)0xFFFDA).pr03l\r
+#define PR03L_bit (*(volatile union un_pr03l *)0xFFFDA).BIT\r
+#define PR12 (*(volatile union un_pr12 *)0xFFFDC).pr12\r
+#define PR12_bit (*(volatile union un_pr12 *)0xFFFDC).BIT\r
+#define PR12L (*(volatile union un_pr12l *)0xFFFDC).pr12l\r
+#define PR12L_bit (*(volatile union un_pr12l *)0xFFFDC).BIT\r
+#define PR12H (*(volatile union un_pr12h *)0xFFFDD).pr12h\r
+#define PR12H_bit (*(volatile union un_pr12h *)0xFFFDD).BIT\r
+#define PR13 (*(volatile union un_pr13 *)0xFFFDE).pr13\r
+#define PR13_bit (*(volatile union un_pr13 *)0xFFFDE).BIT\r
+#define PR13L (*(volatile union un_pr13l *)0xFFFDE).pr13l\r
+#define PR13L_bit (*(volatile union un_pr13l *)0xFFFDE).BIT\r
+#define IF0 (*(volatile union un_if0 *)0xFFFE0).if0\r
+#define IF0_bit (*(volatile union un_if0 *)0xFFFE0).BIT\r
+#define IF0L (*(volatile union un_if0l *)0xFFFE0).if0l\r
+#define IF0L_bit (*(volatile union un_if0l *)0xFFFE0).BIT\r
+#define IF0H (*(volatile union un_if0h *)0xFFFE1).if0h\r
+#define IF0H_bit (*(volatile union un_if0h *)0xFFFE1).BIT\r
+#define IF1 (*(volatile union un_if1 *)0xFFFE2).if1\r
+#define IF1_bit (*(volatile union un_if1 *)0xFFFE2).BIT\r
+#define IF1L (*(volatile union un_if1l *)0xFFFE2).if1l\r
+#define IF1L_bit (*(volatile union un_if1l *)0xFFFE2).BIT\r
+#define IF1H (*(volatile union un_if1h *)0xFFFE3).if1h\r
+#define IF1H_bit (*(volatile union un_if1h *)0xFFFE3).BIT\r
+#define MK0 (*(volatile union un_mk0 *)0xFFFE4).mk0\r
+#define MK0_bit (*(volatile union un_mk0 *)0xFFFE4).BIT\r
+#define MK0L (*(volatile union un_mk0l *)0xFFFE4).mk0l\r
+#define MK0L_bit (*(volatile union un_mk0l *)0xFFFE4).BIT\r
+#define MK0H (*(volatile union un_mk0h *)0xFFFE5).mk0h\r
+#define MK0H_bit (*(volatile union un_mk0h *)0xFFFE5).BIT\r
+#define MK1 (*(volatile union un_mk1 *)0xFFFE6).mk1\r
+#define MK1_bit (*(volatile union un_mk1 *)0xFFFE6).BIT\r
+#define MK1L (*(volatile union un_mk1l *)0xFFFE6).mk1l\r
+#define MK1L_bit (*(volatile union un_mk1l *)0xFFFE6).BIT\r
+#define MK1H (*(volatile union un_mk1h *)0xFFFE7).mk1h\r
+#define MK1H_bit (*(volatile union un_mk1h *)0xFFFE7).BIT\r
+#define PR00 (*(volatile union un_pr00 *)0xFFFE8).pr00\r
+#define PR00_bit (*(volatile union un_pr00 *)0xFFFE8).BIT\r
+#define PR00L (*(volatile union un_pr00l *)0xFFFE8).pr00l\r
+#define PR00L_bit (*(volatile union un_pr00l *)0xFFFE8).BIT\r
+#define PR00H (*(volatile union un_pr00h *)0xFFFE9).pr00h\r
+#define PR00H_bit (*(volatile union un_pr00h *)0xFFFE9).BIT\r
+#define PR01 (*(volatile union un_pr01 *)0xFFFEA).pr01\r
+#define PR01_bit (*(volatile union un_pr01 *)0xFFFEA).BIT\r
+#define PR01L (*(volatile union un_pr01l *)0xFFFEA).pr01l\r
+#define PR01L_bit (*(volatile union un_pr01l *)0xFFFEA).BIT\r
+#define PR01H (*(volatile union un_pr01h *)0xFFFEB).pr01h\r
+#define PR01H_bit (*(volatile union un_pr01h *)0xFFFEB).BIT\r
+#define PR10 (*(volatile union un_pr10 *)0xFFFEC).pr10\r
+#define PR10_bit (*(volatile union un_pr10 *)0xFFFEC).BIT\r
+#define PR10L (*(volatile union un_pr10l *)0xFFFEC).pr10l\r
+#define PR10L_bit (*(volatile union un_pr10l *)0xFFFEC).BIT\r
+#define PR10H (*(volatile union un_pr10h *)0xFFFED).pr10h\r
+#define PR10H_bit (*(volatile union un_pr10h *)0xFFFED).BIT\r
+#define PR11 (*(volatile union un_pr11 *)0xFFFEE).pr11\r
+#define PR11_bit (*(volatile union un_pr11 *)0xFFFEE).BIT\r
+#define PR11L (*(volatile union un_pr11l *)0xFFFEE).pr11l\r
+#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT\r
+#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h\r
+#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT\r
+#define MDAL (*(volatile unsigned short *)0xFFFF0)\r
+#define MULA (*(volatile unsigned short *)0xFFFF0)\r
+#define MDAH (*(volatile unsigned short *)0xFFFF2)\r
+#define MULB (*(volatile unsigned short *)0xFFFF2)\r
+#define MDBH (*(volatile unsigned short *)0xFFFF4)\r
+#define MULOH (*(volatile unsigned short *)0xFFFF4)\r
+#define MDBL (*(volatile unsigned short *)0xFFFF6)\r
+#define MULOL (*(volatile unsigned short *)0xFFFF6)\r
+#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc\r
+#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT\r
+\r
+/*\r
+ Sfr bits\r
+ */\r
+#define ADCE ADM0_bit.no0\r
+#define ADCS ADM0_bit.no7\r
+#define LCDVLM LCDM1_bit.no0\r
+#define LCDSEL LCDM1_bit.no3\r
+#define BLON LCDM1_bit.no4\r
+#define VLCON LCDM1_bit.no5\r
+#define SCOC LCDM1_bit.no6\r
+#define LCDON LCDM1_bit.no7\r
+#define OPTCKE MLCD_bit.no4\r
+#define COMEXP MLCD_bit.no6\r
+#define MLCDEN MLCD_bit.no7\r
+#define SPD0 IICS0_bit.no0\r
+#define STD0 IICS0_bit.no1\r
+#define ACKD0 IICS0_bit.no2\r
+#define TRC0 IICS0_bit.no3\r
+#define COI0 IICS0_bit.no4\r
+#define EXC0 IICS0_bit.no5\r
+#define ALD0 IICS0_bit.no6\r
+#define MSTS0 IICS0_bit.no7\r
+#define IICRSV0 IICF0_bit.no0\r
+#define STCEN0 IICF0_bit.no1\r
+#define IICBSY0 IICF0_bit.no6\r
+#define STCF0 IICF0_bit.no7\r
+#define FSSTP FSSQ_bit.no6\r
+#define SQST FSSQ_bit.no7\r
+#define SQEND FSASTH_bit.no6\r
+#define ESQEND FSASTH_bit.no7\r
+#define RCLOE1 RTCC0_bit.no5\r
+#define RCLOSEL RTCC0_bit.no6\r
+#define RTCE RTCC0_bit.no7\r
+#define RWAIT RTCC1_bit.no0\r
+#define RWST RTCC1_bit.no1\r
+#define RIFG RTCC1_bit.no3\r
+#define WAFG RTCC1_bit.no4\r
+#define RITE RTCC1_bit.no5\r
+#define WALIE RTCC1_bit.no6\r
+#define WALE RTCC1_bit.no7\r
+#define HIOSTOP CSC_bit.no0\r
+#define XTSTOP CSC_bit.no6\r
+#define MSTOP CSC_bit.no7\r
+#define SDIV CKC_bit.no3\r
+#define MCM0 CKC_bit.no4\r
+#define MCS CKC_bit.no5\r
+#define CSS CKC_bit.no6\r
+#define CLS CKC_bit.no7\r
+#define PCLOE0 CKS0_bit.no7\r
+#define PCLOE1 CKS1_bit.no7\r
+#define LVIF LVIM_bit.no0\r
+#define LVIOMSK LVIM_bit.no1\r
+#define LVISEN LVIM_bit.no7\r
+#define LVILV LVIS_bit.no0\r
+#define LVIMD LVIS_bit.no7\r
+#define DWAIT0 DMC0_bit.no4\r
+#define DS0 DMC0_bit.no5\r
+#define DRS0 DMC0_bit.no6\r
+#define STG0 DMC0_bit.no7\r
+#define DWAIT1 DMC1_bit.no4\r
+#define DS1 DMC1_bit.no5\r
+#define DRS1 DMC1_bit.no6\r
+#define STG1 DMC1_bit.no7\r
+#define DST0 DRC0_bit.no0\r
+#define DEN0 DRC0_bit.no7\r
+#define DST1 DRC1_bit.no0\r
+#define DEN1 DRC1_bit.no7\r
+#define TKBIF2 IF2_bit.no0\r
+#define TMIF04 IF2_bit.no1\r
+#define TMIF05 IF2_bit.no2\r
+#define PIF6 IF2_bit.no3\r
+#define PIF7 IF2_bit.no4\r
+#define LCDIF0 IF2_bit.no5\r
+#define CMPIF0 IF2_bit.no6\r
+#define CMPIF1 IF2_bit.no7\r
+#define TMIF06 IF2H_bit.no0\r
+#define TMIF07 IF2H_bit.no1\r
+#define SREIF3 IF2H_bit.no4\r
+#define MDIF IF2H_bit.no5\r
+#define FLIF IF2H_bit.no7\r
+#define DMAIF2 IF3_bit.no0\r
+#define DMAIF3 IF3_bit.no1\r
+#define TKBMK2 MK2_bit.no0\r
+#define TMMK04 MK2_bit.no1\r
+#define TMMK05 MK2_bit.no2\r
+#define PMK6 MK2_bit.no3\r
+#define PMK7 MK2_bit.no4\r
+#define LCDMK0 MK2_bit.no5\r
+#define CMPMK0 MK2_bit.no6\r
+#define CMPMK1 MK2_bit.no7\r
+#define TMMK06 MK2H_bit.no0\r
+#define TMMK07 MK2H_bit.no1\r
+#define SREMK3 MK2H_bit.no4\r
+#define MDMK MK2H_bit.no5\r
+#define FLMK MK2H_bit.no7\r
+#define DMAMK2 MK3_bit.no0\r
+#define DMAMK3 MK3_bit.no1\r
+#define TKBPR02 PR02_bit.no0\r
+#define TMPR004 PR02_bit.no1\r
+#define TMPR005 PR02_bit.no2\r
+#define PPR06 PR02_bit.no3\r
+#define PPR07 PR02_bit.no4\r
+#define LCDPR00 PR02_bit.no5\r
+#define CMPPR00 PR02_bit.no6\r
+#define CMPPR01 PR02_bit.no7\r
+#define TPR006 PR02H_bit.no0\r
+#define TPR007 PR02H_bit.no1\r
+#define SREPR03 PR02H_bit.no4\r
+#define MDPR0 PR02H_bit.no5\r
+#define FLPR0 PR02H_bit.no7\r
+#define DMAPR02 PR03_bit.no0\r
+#define DMAPR03 PR03_bit.no1\r
+#define TKBPR12 PR12_bit.no0\r
+#define TMPR104 PR12_bit.no1\r
+#define TMPR105 PR12_bit.no2\r
+#define PPR16 PR12_bit.no3\r
+#define PPR17 PR12_bit.no4\r
+#define LCDPR10 PR12_bit.no5\r
+#define CMPPR10 PR12_bit.no6\r
+#define CMPPR11 PR12_bit.no7\r
+#define TPR106 PR12H_bit.no0\r
+#define TPR107 PR12H_bit.no1\r
+#define SREPR13 PR12H_bit.no4\r
+#define MDPR1 PR12H_bit.no5\r
+#define FLPR1 PR12H_bit.no7\r
+#define DMAPR12 PR13_bit.no0\r
+#define DMAPR13 PR13_bit.no1\r
+#define WDTIIF IF0_bit.no0\r
+#define LVIIF IF0_bit.no1\r
+#define PIF0 IF0_bit.no2\r
+#define PIF1 IF0_bit.no3\r
+#define PIF2 IF0_bit.no4\r
+#define PIF3 IF0_bit.no5\r
+#define PIF4 IF0_bit.no6\r
+#define PIF5 IF0_bit.no7\r
+#define STIF2 IF0H_bit.no0\r
+#define SRIF2 IF0H_bit.no1\r
+#define SREIF2 IF0H_bit.no2\r
+#define DMAIF0 IF0H_bit.no3\r
+#define DMAIF1 IF0H_bit.no4\r
+#define CSIIF00 IF0H_bit.no5\r
+#define IICIF00 IF0H_bit.no5\r
+#define STIF0 IF0H_bit.no5\r
+#define TMIF00 IF0H_bit.no6\r
+#define SRIF0 IF0H_bit.no7\r
+#define SREIF0 IF1_bit.no0\r
+#define TMIF01H IF1_bit.no0\r
+#define CSIIF10 IF1_bit.no1\r
+#define IICIF10 IF1_bit.no1\r
+#define STIF1 IF1_bit.no1\r
+#define SRIF1 IF1_bit.no2\r
+#define SREIF1 IF1_bit.no3\r
+#define TMIF03H IF1_bit.no3\r
+#define IICAIF0 IF1_bit.no4\r
+#define RTITIF IF1_bit.no5\r
+#define TMIF01 IF1_bit.no7\r
+#define TMIF02 IF1H_bit.no0\r
+#define TMIF03 IF1H_bit.no1\r
+#define ADIF IF1H_bit.no2\r
+#define RTCIF IF1H_bit.no3\r
+#define TMKAIF IF1H_bit.no4\r
+#define KRIF IF1H_bit.no5\r
+#define STIF3 IF1H_bit.no6\r
+#define SRIF3 IF1H_bit.no7\r
+#define WDTIMK MK0_bit.no0\r
+#define LVIMK MK0_bit.no1\r
+#define PMK0 MK0_bit.no2\r
+#define PMK1 MK0_bit.no3\r
+#define PMK2 MK0_bit.no4\r
+#define PMK3 MK0_bit.no5\r
+#define PMK4 MK0_bit.no6\r
+#define PMK5 MK0_bit.no7\r
+#define STMK2 MK0H_bit.no0\r
+#define SRMK2 MK0H_bit.no1\r
+#define SREMK2 MK0H_bit.no2\r
+#define DMAMK0 MK0H_bit.no3\r
+#define DMAMK1 MK0H_bit.no4\r
+#define CSIMK00 MK0H_bit.no5\r
+#define IICMK00 MK0H_bit.no5\r
+#define STMK0 MK0H_bit.no5\r
+#define TMMK00 MK0H_bit.no6\r
+#define SRMK0 MK0H_bit.no7\r
+#define SREMK0 MK1_bit.no0\r
+#define TMMK01H MK1_bit.no0\r
+#define CSIMK10 MK1_bit.no1\r
+#define IICMK10 MK1_bit.no1\r
+#define STMK1 MK1_bit.no1\r
+#define SRMK1 MK1_bit.no2\r
+#define SREMK1 MK1_bit.no3\r
+#define TMMK03H MK1_bit.no3\r
+#define IICAMK0 MK1_bit.no4\r
+#define RTITMK MK1_bit.no5\r
+#define TMMK01 MK1_bit.no7\r
+#define TMMK02 MK1H_bit.no0\r
+#define TMMK03 MK1H_bit.no1\r
+#define ADMK MK1H_bit.no2\r
+#define RTCMK MK1H_bit.no3\r
+#define TMKAMK MK1H_bit.no4\r
+#define KRMK MK1H_bit.no5\r
+#define STMK3 MK1H_bit.no6\r
+#define SRMK3 MK1H_bit.no7\r
+#define WDTIPR0 PR00_bit.no0\r
+#define LVIPR0 PR00_bit.no1\r
+#define PPR00 PR00_bit.no2\r
+#define PPR01 PR00_bit.no3\r
+#define PPR02 PR00_bit.no4\r
+#define PPR03 PR00_bit.no5\r
+#define PPR04 PR00_bit.no6\r
+#define PPR05 PR00_bit.no7\r
+#define STPR02 PR00H_bit.no0\r
+#define SRPR02 PR00H_bit.no1\r
+#define SREPR02 PR00H_bit.no2\r
+#define DMAPR00 PR00H_bit.no3\r
+#define DMAPR01 PR00H_bit.no4\r
+#define CSIPR000 PR00H_bit.no5\r
+#define IICPR000 PR00H_bit.no5\r
+#define STPR00 PR00H_bit.no5\r
+#define TMPR000 PR00H_bit.no6\r
+#define SRPR00 PR00H_bit.no7\r
+#define SREPR00 PR01_bit.no0\r
+#define TMPR001H PR01_bit.no0\r
+#define CSIPR010 PR01_bit.no1\r
+#define IICPR010 PR01_bit.no1\r
+#define STPR01 PR01_bit.no1\r
+#define SRPR01 PR01_bit.no2\r
+#define SREPR01 PR01_bit.no3\r
+#define TMPR003H PR01_bit.no3\r
+#define IICAPR00 PR01_bit.no4\r
+#define RTITPR0 PR01_bit.no5\r
+#define TMPR001 PR01_bit.no7\r
+#define TMPR002 PR01H_bit.no0\r
+#define TMPR003 PR01H_bit.no1\r
+#define ADPR0 PR01H_bit.no2\r
+#define RTCPR0 PR01H_bit.no3\r
+#define TMKAPR0 PR01H_bit.no4\r
+#define KRPR0 PR01H_bit.no5\r
+#define STPR03 PR01H_bit.no6\r
+#define SRPR03 PR01H_bit.no7\r
+#define WDTIPR1 PR10_bit.no0\r
+#define LVIPR1 PR10_bit.no1\r
+#define PPR10 PR10_bit.no2\r
+#define PPR11 PR10_bit.no3\r
+#define PPR12 PR10_bit.no4\r
+#define PPR13 PR10_bit.no5\r
+#define PPR14 PR10_bit.no6\r
+#define PPR15 PR10_bit.no7\r
+#define STPR12 PR10H_bit.no0\r
+#define SRPR12 PR10H_bit.no1\r
+#define SREPR12 PR10H_bit.no2\r
+#define DMAPR10 PR10H_bit.no3\r
+#define DMAPR11 PR10H_bit.no4\r
+#define CSIPR100 PR10H_bit.no5\r
+#define IICPR100 PR10H_bit.no5\r
+#define STPR10 PR10H_bit.no5\r
+#define TMPR100 PR10H_bit.no6\r
+#define SRPR10 PR10H_bit.no7\r
+#define SREPR10 PR11_bit.no0\r
+#define TMPR101H PR11_bit.no0\r
+#define CSIPR110 PR11_bit.no1\r
+#define IICPR110 PR11_bit.no1\r
+#define STPR11 PR11_bit.no1\r
+#define SRPR11 PR11_bit.no2\r
+#define SREPR11 PR11_bit.no3\r
+#define TMPR103H PR11_bit.no3\r
+#define IICAPR10 PR11_bit.no4\r
+#define RTITPR1 PR11_bit.no5\r
+#define TMPR101 PR11_bit.no7\r
+#define TMPR102 PR11H_bit.no0\r
+#define TMPR103 PR11H_bit.no1\r
+#define ADPR1 PR11H_bit.no2\r
+#define RTCPR1 PR11H_bit.no3\r
+#define TMKAPR1 PR11H_bit.no4\r
+#define KRPR1 PR11H_bit.no5\r
+#define STPR13 PR11H_bit.no6\r
+#define SRPR13 PR11H_bit.no7\r
+#define MAA PMC_bit.no0\r
+\r
+/*\r
+ Interrupt vector addresses\r
+ */\r
+#define RST_vect (0x0)\r
+#define INTDBG_vect (0x2)\r
+#define INTWDTI_vect (0x4)\r
+#define INTLVI_vect (0x6)\r
+#define INTP0_vect (0x8)\r
+#define INTP1_vect (0xA)\r
+#define INTP2_vect (0xC)\r
+#define INTP3_vect (0xE)\r
+#define INTP4_vect (0x10)\r
+#define INTP5_vect (0x12)\r
+#define INTST2_vect (0x14)\r
+#define INTSR2_vect (0x16)\r
+#define INTSRE2_vect (0x18)\r
+#define INTDMA0_vect (0x1A)\r
+#define INTDMA1_vect (0x1C)\r
+#define INTCSI00_vect (0x1E)\r
+#define INTIIC00_vect (0x1E)\r
+#define INTST0_vect (0x1E)\r
+#define INTTM00_vect (0x20)\r
+#define INTSR0_vect (0x22)\r
+#define INTSRE0_vect (0x24)\r
+#define INTTM01H_vect (0x24)\r
+#define INTCSI10_vect (0x26)\r
+#define INTIIC10_vect (0x26)\r
+#define INTST1_vect (0x26)\r
+#define INTSR1_vect (0x28)\r
+#define INTSRE1_vect (0x2A)\r
+#define INTTM03H_vect (0x2A)\r
+#define INTIICA0_vect (0x2C)\r
+#define INTRTIT_vect (0x2E)\r
+#define INTTM01_vect (0x32)\r
+#define INTTM02_vect (0x34)\r
+#define INTTM03_vect (0x36)\r
+#define INTAD_vect (0x38)\r
+#define INTRTC_vect (0x3A)\r
+#define INTIT_vect (0x3C)\r
+#define INTKR_vect (0x3E)\r
+#define INTST3_vect (0x40)\r
+#define INTSR3_vect (0x42)\r
+#define INTTKB20_vect (0x44)\r
+#define INTTM04_vect (0x46)\r
+#define INTTM05_vect (0x48)\r
+#define INTP6_vect (0x4A)\r
+#define INTP7_vect (0x4C)\r
+#define INTLCD0_vect (0x4E)\r
+#define INTCMP0_vect (0x50)\r
+#define INTCMP1_vect (0x52)\r
+#define INTTM06_vect (0x54)\r
+#define INTTM07_vect (0x56)\r
+#define INTSRE3_vect (0x5C)\r
+#define INTMD_vect (0x5E)\r
+#define INTFL_vect (0x62)\r
+#define INTDMA2_vect (0x64)\r
+#define INTDMA3_vect (0x66)\r
+#define BRK_I_vect (0x7E)\r
+#endif\r
projects / freertos / blobdiff