]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/RL78_multiple_IAR/RegTest.s87
Update IAR RL78 demo regtest tasks to make use of SKZ instructions as the latest...
[freertos] / FreeRTOS / Demo / RL78_multiple_IAR / RegTest.s87
index 3c2bbefd15f28875454c8ffa8e6e8f056a24ea6c..d91a93d86ce98c95db4fea51dd5051a382bc0767 100644 (file)
@@ -110,7 +110,7 @@ loop1:
 \r
        ; Compare with the expected value.\r
        CMPW    AX, #0x1122\r
-       BZ              +5\r
+       SKZ\r
 \r
        ; Jump over the branch to vRegTestError() if the register contained the\r
        ; expected value - otherwise flag an error by executing vRegTestError().\r
@@ -119,19 +119,19 @@ loop1:
        ; Repeat for all the registers.\r
        MOVW    AX, BC\r
        CMPW    AX, #0x3344\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOVW    AX, DE\r
        CMPW    AX, #0x5566\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOVW    AX, HL\r
        CMPW    AX, #0x7788\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOV             A, CS\r
        CMP             A, #0x01\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
 \r
 #if __DATA_MODEL__ == __DATA_MODEL_FAR__\r
@@ -140,7 +140,7 @@ loop1:
        ; test it when using the far model.\r
        MOV             A, ES\r
        CMP             A, #0x02\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
 \r
 #endif\r
@@ -181,30 +181,30 @@ vRegTest2Task:
 \r
 loop2:\r
        CMPW    AX, #0x99aa\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOVW    AX, BC\r
        CMPW    AX, #0xbbcc\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOVW    AX, DE\r
        CMPW    AX, #0xddee\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOVW    AX, HL\r
        CMPW    AX, #0xff12\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
        MOV             A, CS\r
        CMP             A, #0x03\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
 \r
 #if __DATA_MODEL__ == __DATA_MODEL_FAR__\r
 \r
        MOV             A, ES\r
        CMP             A, #0x04\r
-       BZ              +5\r
+       SKZ\r
        BR              vRegTestError\r
 \r
 #endif\r