+++ /dev/null
-/******************************************************************************\r
-* DISCLAIMER\r
-* Please refer to http://www.renesas.com/disclaimer\r
-******************************************************************************\r
- Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.\r
-*******************************************************************************\r
-* File Name : phy.h\r
-* Version : 1.02\r
-* Description : Ethernet PHY device driver\r
-******************************************************************************\r
-* History : DD.MM.YYYY Version Description\r
-* : 15.02.2010 1.00 First Release\r
-* : 17.03.2010 1.01 Modification of macro definitions for access timing\r
-* : 06.04.2010 1.02 RX62N changes\r
-******************************************************************************/\r
-\r
-#ifndef PHY_H\r
-#define PHY_H\r
-\r
-/******************************************************************************\r
-Includes <System Includes> , "Project Includes"\r
-******************************************************************************/\r
-#include <stdint.h>\r
-\r
-/******************************************************************************\r
-Typedef definitions\r
-******************************************************************************/\r
-\r
-/******************************************************************************\r
-Macro definitions\r
-******************************************************************************/\r
-/* Standard PHY Registers */\r
-#define BASIC_MODE_CONTROL_REG 0 \r
-#define BASIC_MODE_STATUS_REG 1 \r
-#define PHY_IDENTIFIER1_REG 2 \r
-#define PHY_IDENTIFIER2_REG 3 \r
-#define AN_ADVERTISEMENT_REG 4 \r
-#define AN_LINK_PARTNER_ABILITY_REG 5 \r
-#define AN_EXPANSION_REG 6\r
-\r
-/* Media Independent Interface */\r
-#define PHY_ST 1\r
-#define PHY_READ 2\r
-#define PHY_WRITE 1\r
-#define PHY_ADDR 0x1F\r
-\r
-#define MDC_WAIT 2\r
-\r
-/* PHY return definitions */\r
-#define R_PHY_OK 0\r
-#define R_PHY_ERROR -1\r
-\r
-/* Auto-Negotiation Link Partner Status */\r
-#define PHY_AN_LINK_PARTNER_100BASE 0x0180\r
-#define PHY_AN_LINK_PARTNER_FULL 0x0140\r
-#define PHY_AN_COMPLETE ( 1 << 5 )\r
-\r
-/*\r
- * Wait counter definitions of PHY-LSI initialization\r
- * ICLK = 96MHz\r
-*/\r
-#define PHY_RESET_WAIT 0x00000020L\r
-#define PHY_AUTO_NEGOTIATON_WAIT 75\r
-\r
-#define PHY_AN_ENABLE 0x1200\r
-#define PHY_AN_10_100_F_H 0xde1\r
-\r
-/******************************************************************************\r
-Variable Externs\r
-******************************************************************************/\r
-\r
-/******************************************************************************\r
-Functions Prototypes\r
-******************************************************************************/\r
-/**\r
- * External prototypes\r
- **/\r
-int16_t phy_init( void );\r
-void phy_set_100full( void );\r
-void phy_set_10half( void );\r
-int16_t phy_set_autonegotiate( void );\r
-\r
-#endif /* PHY_H */\r
-\r