]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Demo/RX600_RX64M_RSK_Renesas_e2studio/Source/RegTest.src
Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt
[freertos] / FreeRTOS / Demo / RX600_RX64M_RSK_Renesas_e2studio / Source / RegTest.src
index 4069725f9343c034c05975932021cfaa6dcf40a7..5313520d0b87b18e993340af3b6d1203926f8ffc 100644 (file)
@@ -1,67 +1,30 @@
 ;/*\r
-;    FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
-;    All rights reserved\r
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-;\r
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-;*/\r
+; * FreeRTOS Kernel V10.0.0\r
+; * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
+; *\r
+; * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
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+; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
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+; * subject to the following conditions:\r
+; *\r
+; * The above copyright notice and this permission notice shall be included in all\r
+; * copies or substantial portions of the Software. If you wish to use our Amazon\r
+; * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
+; *\r
+; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+; *\r
+; * http://www.FreeRTOS.org\r
+; * http://aws.amazon.com/freertos\r
+; *\r
+; * 1 tab == 4 spaces!\r
+; */\r
 \r
        .GLB _vRegTest1Implementation\r
        .GLB _vRegTest2Implementation\r
@@ -97,7 +60,7 @@ _vRegTest1Implementation:
        MOV.L   #13, R13\r
        MOV.L   #14, R14\r
        MOV.L   #15, R15\r
-       \r
+\r
        ;/* Put a known value in the hi and low of the accumulators. */\r
        MVTACHI R1, A0\r
        MVTACLO R2, A0\r
@@ -106,24 +69,24 @@ _vRegTest1Implementation:
 \r
        ;/* Loop, checking each iteration that each register still contains the\r
        ;expected value. */\r
-TestLoop1:                                                             \r
+TestLoop1:\r
 \r
        ;/* Push the registers that are going to get clobbered. */\r
-       PUSHM   R14-R15                                         \r
-       \r
+       PUSHM   R14-R15\r
+\r
        ;/* Increment the loop counter to show this task is still getting CPU time. */\r
        MOV.L   #_ulRegTest1LoopCounter, R14\r
        MOV.L   [ R14 ], R15\r
-       ADD     #1, R15                                         \r
+       ADD     #1, R15\r
        MOV.L   R15, [ R14 ]\r
-       \r
+\r
        ;/* Yield to extend the text coverage.  Set the bit in the ITU SWINTR register. */\r
        MOV.L   #1, R14\r
        MOV.L   #0872E0H, R15\r
        MOV.B   R14, [R15]\r
-       NOP                                                             \r
-       NOP                                                             \r
-       \r
+       NOP\r
+       NOP\r
+\r
        ;/* Check accumulators. */\r
        MVFACHI #0, A0, R15\r
        CMP #1, R15\r
@@ -145,48 +108,48 @@ TestLoop1:
        BNE RegTest1Error\r
 \r
        ;/* Restore the clobbered registers. */\r
-       POPM    R14-R15                                         \r
-       \r
+       POPM    R14-R15\r
+\r
        ;/* Now compare each register to ensure it still contains the value that was\r
        ;set before this loop was entered. */\r
-       CMP     #1, R1                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #2, R2                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #3, R3                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #4, R4                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #5, R5                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #6, R6                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #7, R7                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #8, R8                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #9, R9                                          \r
-       BNE     RegTest1Error                           \r
-       CMP     #10, R10                                        \r
-       BNE     RegTest1Error                           \r
-       CMP     #11, R11                                        \r
-       BNE     RegTest1Error                           \r
-       CMP     #12, R12                                        \r
-       BNE     RegTest1Error                           \r
-       CMP     #13, R13                                        \r
-       BNE     RegTest1Error                           \r
-       CMP     #14, R14                                        \r
-       BNE     RegTest1Error                           \r
-       CMP     #15, R15                                        \r
-       BNE     RegTest1Error                           \r
+       CMP     #1, R1\r
+       BNE     RegTest1Error\r
+       CMP     #2, R2\r
+       BNE     RegTest1Error\r
+       CMP     #3, R3\r
+       BNE     RegTest1Error\r
+       CMP     #4, R4\r
+       BNE     RegTest1Error\r
+       CMP     #5, R5\r
+       BNE     RegTest1Error\r
+       CMP     #6, R6\r
+       BNE     RegTest1Error\r
+       CMP     #7, R7\r
+       BNE     RegTest1Error\r
+       CMP     #8, R8\r
+       BNE     RegTest1Error\r
+       CMP     #9, R9\r
+       BNE     RegTest1Error\r
+       CMP     #10, R10\r
+       BNE     RegTest1Error\r
+       CMP     #11, R11\r
+       BNE     RegTest1Error\r
+       CMP     #12, R12\r
+       BNE     RegTest1Error\r
+       CMP     #13, R13\r
+       BNE     RegTest1Error\r
+       CMP     #14, R14\r
+       BNE     RegTest1Error\r
+       CMP     #15, R15\r
+       BNE     RegTest1Error\r
 \r
        ;/* All comparisons passed, start a new itteratio of this loop. */\r
-       BRA             TestLoop1                               \r
-       \r
-RegTest1Error:                                                 \r
+       BRA             TestLoop1\r
+\r
+RegTest1Error:\r
        ;/* A compare failed, just loop here so the loop counter stops incrementing\r
        ;- causing the check task to indicate the error. */\r
-       BRA RegTest1Error                                       \r
+       BRA RegTest1Error\r
 ;/*-----------------------------------------------------------*/\r
 \r
 ;/* This function is explained in the comments at the top of main.c. */\r
@@ -223,17 +186,17 @@ _vRegTest2Implementation:
 \r
        ;/* Loop, checking each iteration that each register still contains the\r
        ;expected value. */\r
-TestLoop2:                                                             \r
+TestLoop2:\r
 \r
        ;/* Push the registers that are going to get clobbered. */\r
-       PUSHM   R14-R15                                         \r
-       \r
+       PUSHM   R14-R15\r
+\r
        ;/* Increment the loop counter to show this task is still getting CPU time. */\r
        MOV.L   #_ulRegTest2LoopCounter, R14\r
        MOV.L   [ R14 ], R15\r
-       ADD     #1, R15                                         \r
+       ADD     #1, R15\r
        MOV.L   R15, [ R14 ]\r
-       \r
+\r
        ;/* Check accumulators. */\r
        MVFACHI #0, A0, R15\r
        CMP #10H, R15\r
@@ -255,48 +218,48 @@ TestLoop2:
        BNE RegTest1Error\r
 \r
        ;/* Restore the clobbered registers. */\r
-       POPM    R14-R15                                         \r
-       \r
+       POPM    R14-R15\r
+\r
        ;/* Now compare each register to ensure it still contains the value that was\r
        ;set before this loop was entered. */\r
-       CMP     #10H, R1                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #20H, R2                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #30H, R3                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #40H, R4                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #50H, R5                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #60H, R6                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #70H, R7                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #80H, R8                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #90H, R9                                        \r
-       BNE     RegTest2Error                           \r
-       CMP     #100H, R10                                      \r
-       BNE     RegTest2Error                           \r
-       CMP     #110H, R11                                      \r
-       BNE     RegTest2Error                           \r
-       CMP     #120H, R12                                      \r
-       BNE     RegTest2Error                           \r
-       CMP     #130H, R13                                      \r
-       BNE     RegTest2Error                           \r
-       CMP     #140H, R14                                      \r
-       BNE     RegTest2Error                           \r
-       CMP     #150H, R15                                      \r
-       BNE     RegTest2Error                           \r
+       CMP     #10H, R1\r
+       BNE     RegTest2Error\r
+       CMP     #20H, R2\r
+       BNE     RegTest2Error\r
+       CMP     #30H, R3\r
+       BNE     RegTest2Error\r
+       CMP     #40H, R4\r
+       BNE     RegTest2Error\r
+       CMP     #50H, R5\r
+       BNE     RegTest2Error\r
+       CMP     #60H, R6\r
+       BNE     RegTest2Error\r
+       CMP     #70H, R7\r
+       BNE     RegTest2Error\r
+       CMP     #80H, R8\r
+       BNE     RegTest2Error\r
+       CMP     #90H, R9\r
+       BNE     RegTest2Error\r
+       CMP     #100H, R10\r
+       BNE     RegTest2Error\r
+       CMP     #110H, R11\r
+       BNE     RegTest2Error\r
+       CMP     #120H, R12\r
+       BNE     RegTest2Error\r
+       CMP     #130H, R13\r
+       BNE     RegTest2Error\r
+       CMP     #140H, R14\r
+       BNE     RegTest2Error\r
+       CMP     #150H, R15\r
+       BNE     RegTest2Error\r
 \r
        ;/* All comparisons passed, start a new itteratio of this loop. */\r
-       BRA     TestLoop2                                       \r
-       \r
-RegTest2Error:                                                 \r
+       BRA     TestLoop2\r
+\r
+RegTest2Error:\r
        ;/* A compare failed, just loop here so the loop counter stops incrementing\r
        ;- causing the check task to indicate the error. */\r
-       BRA RegTest2Error                                       \r
+       BRA RegTest2Error\r
+\r
 \r
-       \r
        .END\r