--- /dev/null
+Documentation and download available at http://www.FreeRTOS.org/\r
+\r
+Changes between FreeRTOS V10.2.1 and FreeRTOS V10.3.0 released February 7 2020\r
+\r
+ See http://www.FreeRTOS.org/FreeRTOS-V10.3.x.html\r
+\r
+ New and updated kernel ports:\r
+\r
+ + Added RISC-V port for the IAR compiler.\r
+ + Update the Windows simulator port to use a synchronous object to prevent\r
+ a user reported error whereby a task continues to run for a short time\r
+ after being moved to the Blocked state. Note we were not able to\r
+ replicate the reported issue and it likely depends on your CPU model.\r
+ + Correct alignment of stack top in RISC-V port when\r
+ configISR_STACK_SIZE_WORDS is defined to a non zero value, which causes\r
+ the interrupt stack to be statically allocated.\r
+ + The RISC-V machine timer compare register can now be for any HART, whereas\r
+ previously it was always assumed FreeRTOS was running on HART 0.\r
+ + Update the sequence used to update the 64-bit machine timer\r
+ compare register on 32-bit cores to match that suggested in RISC-V\r
+ documentation.\r
+ + Added tickless low power modes into the ARM, IAR and GCC Cortex-M0 compiler\r
+ ports.\r
+ + Updated the behaviour of the ARMv7-M MPU (Memory Protection Unit) ports to\r
+ match that of the ARMv8-M ports whereby privilege escalations can only\r
+ originate from within the kernel's own memory segment. Added\r
+ configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY configuration constant.\r
+ + Update existing MPU ports to correctly disable the MPU before it is\r
+ updated.\r
+ + Added contributed port and demo application for a T-Head (formally C-SKY)\r
+ microcontroller.\r
+\r
+ New API functions:\r
+\r
+ + Added the vPortGetHeapStats() API function which returns information on\r
+ the heap_4 and heap_5 state.\r
+ + Added xTaskCatchUpTicks(), which corrects the tick count value after the\r
+ application code has held interrupts disabled for an extended period.\r
+ + Added xTaskNotifyValueClear() API function.\r
+ + Added uxTimerGetReloadMode() API function.\r
+\r
+ Other miscellaneous changes:\r
+ + Change type of uxPendedTicks from UBaseType_t to TickType_t to ensure it\r
+ has the same type as variables with which it is compared to, and therefore\r
+ also renamed the variable xPendingTicks.\r
+ + Update Keil projects that use the MPU so memory regions come from linker\r
+ script (scatter file) variables instead of being hard coded.\r
+ + Added LPC51U68 Cortex-M0+ demos for GCC (MCUXpresso), Keil and IAR\r
+ compilers.\r
+ + Added CORTEX_MPU_STM32L4_Discovery_Keil_STM32Cube demo.\r
+ + Added LPC54018 MPU demo.\r
+ + Rename xTaskGetIdleRunTimeCounter() to ulTaskGetIdleRunTimeCounter().\r
+\r
+\r
+Changes between FreeRTOS V10.2.1 and FreeRTOS V10.2.0 released May 13 2019:\r
+\r
+ + Added ARM Cortex-M23 port layer to complement the pre-existing ARM\r
+ Cortex-M33 port layer.\r
+ + The RISC-V port now automatically switches between 32-bit and 64-bit\r
+ cores.\r
+ + Introduced the portMEMORY_BARRIER macro to prevent instruction re-ordering\r
+ when GCC link time optimisation is used.\r
+ + Introduced the portDONT_DISCARD macro to the ARMv8-M ports to try and\r
+ prevent the secure side builds from removing symbols required by the\r
+ non secure side build.\r
+ + Introduced the portARCH_NAME to provide additional data to select semi-\r
+ automated build environments.\r
+ + Cortex-M33 and Cortex-M23 ports now correctly disable the MPU before\r
+ updating the MPU registers.\r
+\r
+ + Added Nuvoton NuMaker-PFM-M2351 ARM Cortex-M23 demo.\r
+ + Added LPC55S69 ARM Cortex-M33 demo.\r
+ + Added an STM32 dual core AMP stress test demo.\r
+\r
+\r
+Changes between FreeRTOS V10.1.1 and FreeRTOS V10.2.0 released February 25 2019:\r
+\r
+ + Added GCC RISC-V MCU port with three separate demo applications.\r
+ + Included pre-existing ARM Cortex-M33 (ARMv8-M) GCC/ARMclang and IAR ports\r
+ with Keil simulator demo.\r
+ + Update the method used to detect if a timer is active. Previously the\r
+ timer was deemed to be inactive if it was not referenced from a list.\r
+ However, when a timer is updated it is temporarily removed from, then\r
+ re-added to a list, so now the timer's active status is stored separately.\r
+ + Add vTimerSetReloadMode(), xTaskGetIdleRunTimeCounter(), and\r
+ xTaskGetApplicationTaskTagFromISR() API functions.\r
+ + Updated third party Xtensa port so it is MIT licensed.\r
+ + Added configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H to the Renesas\r
+ compiler RX600v2 port to enable switching between platform.h and\r
+ iodefine.h includes within that port's port.c file.\r
+ + Removed the 'FromISR' functions from the MPU ports as ISRs run privileged\r
+ anyway.\r
+ + Added uxTaskGetStackHighWaterMark2() function to enable the return type to\r
+ be changed without breaking backward compatibility.\r
+ uxTaskGetStackHighWaterMark() returns a UBaseType_t as always,\r
+ uxTaskGetStackHighWaterMark2() returns configSTACK_DEPTH_TYPE to allow the\r
+ user to determine the return type.\r
+ + Fixed issues in memory protected ports related to different combinations\r
+ of static memory only and dynamic memory only builds. As a result the\r
+ definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE became more\r
+ complex and was moved to FreeRTOS.h with a table explaining its definition.\r
+ + Added a 'get task tag from ISR' function.\r
+ + Change the method used to determine if a timer is active or not from just\r
+ seeing if it is referenced from the active timer list to storing its\r
+ active state explicitly. The change prevents the timer reporting that it\r
+ is inactive while it is being moved from one list to another.\r
+ + The pcName parameter passed into the task create functions can be NULL,\r
+ previously a name had to be provided.\r
+ + When using tickless idle, prvResetNextTaskUnblockTime() is now only called\r
+ in xTaskRemoveFromEventList() if the scheduler is not suspended.\r
+ + Introduced portHAS_STACK_OVERFLOW_CHECKING, which should be set to 1 for\r
+ FreeRTOS ports that run on architectures that have stack limit registers.\r
+\r
+\r
+Changes between FreeRTOS V10.1.0 and FreeRTOS V10.1.1 released 7 September 2018\r
+\r
+ + Reverted a few structure name changes that broke several kernel aware\r
+ debugger plug-ins.\r
+ + Updated to the latest trace recorder code.\r
+ + Fixed some formatting in the FreeRTOS+TCP TCP/IP stack code.\r
+ + Reverted moving some variables from file to function scope as doing so\r
+ broke debug scenarios that require the static qualifier to be removed.\r
+\r
+Changes between FreeRTOS V10.0.1 and FreeRTOS V10.1.0 released 22 August 2018\r
+\r
+ FreeRTOS Kernel Changes:\r
+\r
+ + Update lint checked MISRA compliance to use the latest MISRA standard, was\r
+ previously using the original MISRA standard.\r
+ + Updated all object handles (TaskHandle_t, QueueHandle_t, etc.) to be\r
+ unique types instead of void pointers, improving type safety. (this was\r
+ attempted some years back but had to be backed out due to bugs in some\r
+ debuggers). Note this required the pvContainer member of a ListItem_t\r
+ struct to be renamed - set configENABLE_BACKWARD_COMPATIBILITY to 1 if\r
+ this causes an issue.\r
+ + Added configUSE_POSIX_ERRNO to enable per task POSIX style errno\r
+ functionality in a more user friendly way - previously the generic thread\r
+ local storage feature was used for this purpose.\r
+ + Added Xtensa port and demo application for the XCC compiler.\r
+ + Changed the implementation of vPortEndScheduler() for the Win32 port to\r
+ simply call exit( 0 ).\r
+ + Bug fix in vPortEnableInterrupt() for the GCC Microblaze port to protect\r
+ the read modify write access to an internal Microblaze register.\r
+ + Fix minor niggles when the MPU is used with regards to prototype\r
+ differences, static struct size differences, etc.\r
+ + The usStackHighWaterMark member of the TaskStatus_t structure now has type\r
+ configSTACK_DEPTH_TYPE in place of uint16_t - that change should have been\r
+ made when the configSTACK_DEPTH_TYPE type (which gets around the previous\r
+ 16-bit limit on stack size specifications) was introduced.\r
+ + Added the xMessageBufferNextLengthBytes() API function and likewise stream\r
+ buffer equivalent.\r
+ + Introduce configMESSAGE_BUFFER_LENGTH_TYPE to allow the number of bytes\r
+ used to hold the length of a message in the message buffer to be reduced.\r
+ configMESSAGE_BUFFER_LENGTH_TYPE default to size_t, but if, for example,\r
+ messages can never be more than 255 bytes it could be set to uint8_t,\r
+ saving 3 bytes each time a message is written into the message buffer\r
+ (assuming sizeof( size_t ) is 4).\r
+ + Updated the StaticTimer_t structure to ensure it matches the size of the\r
+ Timer_t structure when the size of TaskFunction_t does not equal the size\r
+ of void *.\r
+ + Update various Xilinx demos to use 2018.1 version of the SDK tools.\r
+ + Various updates to demo tasks to maintain test coverage.\r
+ + FreeRTOS+UDP was removed in FreeRTOS V10.1.0 as it was replaced by\r
+ FreeRTOS+TCP, which was brought into the main download in FreeRTOS\r
+ V10.0.0. FreeRTOS+TCP can be configured as a UDP only stack, and\r
+ FreeRTOS+UDP does not contain the patches applied to FreeRTOS+TCP.\r
+\r
+ FreeRTOS+TCP Changes:\r
+\r
+ + Multiple security improvements and fixes in packet parsing routines, DNS\r
+ caching, and TCP sequence number and ID generation.\r
+ + Disable NBNS and LLMNR by default.\r
+ + Add TCP hang protection by default.\r
+\r
+ We thank Ori Karliner of Zimperium zLabs Team for reporting these issues.\r
+\r
+\r
+Changes between FreeRTOS V10.0.0 and FreeRTOS V10.0.1, released December 20 2017\r
+\r
+ + Fix position of "#if defined( __cplusplus )" in stream_buffer.h.\r
+ + Correct declarations of MPU_xQueuePeek() and MPU_xQueueSemaphoreTake() in\r
+ mpu_prototypes.h.\r
+ + Correct formatting in vTaskList() helper function when it prints the state\r
+ of the currently executing task.\r
+ + Introduce #error if stream_buffer.c is built without\r
+ configUSE_TASK_NOTIFICATIONS set to 1.\r
+ + Update FreeRTOS+TCP to V2.0.0\r
+ - Improve the formatting of text that displays the available netword\r
+ interfaces when FreeRTOS+TCP is used on Windows with WinPCap.\r
+ - Introduce ipconfigSOCKET_HAS_USER_WAKE_CALLBACK option to enable a user\r
+ definable callback to execute when data arrives on a socket.\r
+\r
+Changes between FreeRTOS V9.0.1 and FreeRTOS V10.0.0:\r
+\r
+ The FreeRTOS kernel is now MIT licensed: https://www.FreeRTOS.org/license\r
+\r
+ New Features and components:\r
+\r
+ + Stream Buffers - see http://www.FreeRTOS.org/RTOS-stream-buffer-example.html\r
+ + Message Buffers - see http://www.FreeRTOS.org//RTOS-message-buffer-example.html\r
+ + Move FreeRTOS+TCP into the main repository, along with the basic Win32\r
+ TCP demo FreeRTOS_Plus_TCP_Minimal_Windows_Simulator.\r
+\r
+ New ports or demos:\r
+\r
+ + Added demo for TI SimpleLink CC3220 MCU.\r
+ + Added MPU and non MPU projects for Microchip CEC and MEC 17xx and 51xx\r
+ MCUs.\r
+ + Added CORTEX_MPU_Static_Simulator_Keil_GCC demo to test static allocation\r
+ in the MPU port.\r
+\r
+ Fixes or enhancements:\r
+\r
+ + Cortex-M ports push additional register prior to calling\r
+ vTaskSwitchContext to ensure 8-byte alignment is maintained. Only\r
+ important if a user defined tick hook function performs an operation that\r
+ requires 8-byte alignment.\r
+ + Optimisations to the implementation of the standard tickless idle mode on\r
+ Cortex-M devices.\r
+ + Improvements to the Win32 port including using higher priority threads.\r
+ + Ensure interrupt stack alignment on PIC32 ports.\r
+ + Updated GCC TriCore port to build with later compiler versions.\r
+ + Update mpu_wrappers.c to support static allocation.\r
+ + The uxNumberOfItems member of List_t is now volatile - solving an issue\r
+ when the IAR compiler was used with maximum optimization.\r
+ + Introduced configRECORD_STACK_HIGH_ADDRESS. When set to 1 the stack start\r
+ address is saved into each task's TCB (assuming stack grows down).\r
+ + Introduced configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H to allow user defined\r
+ functionality, and user defined initialisation, to be added to FreeRTOS's\r
+ tasks.c source file. When configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H is\r
+ set to 1 a user provided header file called freertos_task_c_additions.h\r
+ will be included at the bottom of tasks.c. Functions defined in that\r
+ header file can call freertos_tasks_c_additions_init(), which in turn\r
+ calls a macro called FREERTOS_TASKS_C_ADDITIONS_INIT(), if it is defined.\r
+ FREERTOS_TASKS_C_ADDITIONS_INIT() can be defined in FreeRTOSConfig.h.\r
+ + Introduced configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) which can be\r
+ defined by a user in FreeRTOSConfig.h. The macro is called before\r
+ assessing whether to enter tickless idle mode or not. If the macro sets\r
+ x to zero then tickless idle mode will not be entered. This allows users\r
+ to abort tickless idle mode entry before the tickless idle function is\r
+ even called - previously it was only possible to abort from within the\r
+ tickless idle function itself.\r
+ + Added configPRINTF(), which can be defined by users to allow all libraries\r
+ to use the same print formatter.\r
+ + Introduced configMAX() and configMIN() macros which default to standard\r
+ max( x, y ) and min( x, y ) macro behaviour, but can be overridden if the\r
+ application writer defines the same macros in FreeRTOSConfig.h.\r
+ + Corrected the definition of StaticTask_t in the case where\r
+ INCLUDE_xTaskAbortDelay is set to 1.\r
+ + Introduced configTIMER_SERVICE_TASK_NAME and configIDLE_TASK_NAME, both of\r
+ which can be defined to strings in FreeRTOSConfig.h to change the default\r
+ names of the timer service and idle tasks respectively.\r
+ + Only fill the stack of a newly created task with a known value if stack\r
+ checking, or high water mark checking/viewing, is in use - removing the\r
+ dependency on memset() in other cases.\r
+ + Introduced xTaskCreateRestrictedStatic() so static allocation can be used\r
+ with the MPU.\r
+ + Ensure suspended tasks cannot be unsuspended by a received task\r
+ notification.\r
+ + Fix race condition in vTaskSetTimeOutState().\r
+ + Updated trace recorder files to the latest version.\r
+\r
+Changes since FreeRTOS V9.0.0:\r
+\r
+ + Priority dis-inheritance behaviour has been enhanced in the case where a\r
+ task that attempted to take a mutex that was held by a lower priority task\r
+ timed out before it was able to obtain the mutex (causing the task that\r
+ holds the mutex to have its priority raised, then lowered again, in\r
+ accordance with the priority inheritance protocol).\r
+ + Split the overloaded xQueueGenericReceive() function into three separate\r
+ dedicated functions.\r
+ + Allow the default human readable text names given to the Idle and Timer\r
+ tasks to be overridden by defining the configIDLE_TASK_NAME and\r
+ configTIMER_SERVICE_TASK_NAME definitions respectively in FreeRTOSConfig.h.\r
+ + Introduced configINITIAL_TICK_COUNT to allow the tick count to take a\r
+ value of than than 0 when the system boots. This can be useful for\r
+ testing purposes - although setting configUSE_16_BIT_TICKS to 1 can also\r
+ be used to test frequent tick overflows.\r
+ + Ensure the Cortex-M SysTick count is cleared to zero before starting the\r
+ first task.\r
+ + Add configASSERT() into ARM Cortex-M ports to check the number of priority\r
+ bit settings.\r
+ + Clear the 'control' register before starting ARM Cortex-M4F ports in case\r
+ the FPU is used before the scheduler is started. This just saves a few\r
+ bytes on the main stack as it prevents space being left for a later save\r
+ of FPU registers.\r
+ + Added xSemaphoreGetMutexHolderFromISR().\r
+ + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.\r
+ + Introduced configSTACK_DEPTH_TYPE to allow users to change the type used\r
+ to specify the stack size when using xTaskCreate(). For historic reasons,\r
+ when FreeRTOS was only used on small MCUs, the type was set to uint16_t,\r
+ but that can be too restrictive when FreeRTOS is used on larger\r
+ processors. configSTACK_DEPTH_TYPE defaults to uint16_t.\r
+ xTaskCreateStatic(), being a newer function, used a uint32_t.\r
+ + Increase the priority of the Windows threads used by the Win32 port. As\r
+ all the threads run on the same core, and the threads run with very high\r
+ priority, there is a risk that the host will become unresponsive, so also\r
+ prevent the Windows port executing on single core hosts.\r
+\r
+Changes between FreeRTOS V9.0.0 and FreeRTOS V9.0.0rc2 released May 25 2016:\r
+\r
+ See http://www.FreeRTOS.org/FreeRTOS-V9.html\r
+\r
+ RTOS kernel updates:\r
+\r
+ + The prototype of the new xTaskCreateStatic() API function was modified to\r
+ remove a parameter and improve compatibility with other new\r
+ "CreateStatic()" API functions. The stack size parameter in\r
+ xTaskCreateStatic() is now uint32_t, which changes the prototype of the\r
+ callback functions. See the following URL:\r
+ http://www.freertos.org/xTaskCreateStatic.html\r
+ + GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT\r
+ constant. When configUSE_TASK_FPU_SUPPORT is set to 2 every task is\r
+ automatically given a floating point (FPU) context.\r
+ + GCC ARM Cortex-A port: It is now possible to automatically save and\r
+ restore all floating point (FPU) registers on entry to each potentially\r
+ nested interrupt by defining vApplicationFPUSafeIRQHandler() instead of\r
+ vApplicationIRQHandler().\r
+ + All ARM Cortex-M3/4F/7 ports: Clear the least significant bit of the task\r
+ entry address placed onto the stack of a task when the task is created for\r
+ strict compliance with the ARM Cortex-M3/4/7 architecture documentation\r
+ (no noticeable effect unless using the QMEU emulator).\r
+ + Added GCC and Keil ARM Cortex-M4F MPU ports - previously the MPU was only\r
+ supported on ARM Cortex-M3.\r
+ + ARM Cortex-M3/4F MPU ports: Update to fully support the FreeRTOS V9.0.0\r
+ API (other than static object creation) and added the\r
+ FreeRTOS/Demo/CORTEX_MPU_Simulator_Keil_GCC demo application to\r
+ demonstrate how to use the updated MPU port.\r
+ + All ARM Cortex-M3/4F/7 ports: Add additional barrier instructions to the\r
+ default low power tickless implementation.\r
+ + All ARM Cortex-M0 ports: Prevent an item being left on the stack of the\r
+ first task that executes.\r
+ + Win32 ports: Reduce the amount of stack used and change the way Windows\r
+ threads are deleted to increase the maximum execution time.\r
+ + Add an ARM Cortex-M4F port for the MikroC compiler. Ensure to read the\r
+ documentation page for this port before use.\r
+ + MPS430X IAR port: Update to be compatible with the latest EW430 tools\r
+ release.\r
+ + IAR32 GCC port: Correct vPortExitCritical() when\r
+ configMAX_API_CALL_INTERRUPT_PRIORITY == portMAX_PRIORITY.\r
+ + For consistency vTaskGetTaskInfo() now has the alias vTaskGetInfo(),\r
+ xTaskGetTaskHandle() now has the alias xTaskGetHandle() and\r
+ pcQueueGetQueueName() now has an alias pcQueueGetName().\r
+ + Fix various errors in comments and compiler warnings.\r
+\r
+ Demo application updates:\r
+\r
+ + Update Atmel Studio projects to use Atmel Studio 7.\r
+ + Update Xilinx SDK projects to use the 2016.1 version of the SDK.\r
+ + Remove dependency on legacy IO libraries from the PIC32 demos.\r
+ + Move the Xilinx UltraScale Cortex-R5 demo into the main distribution.\r
+ + Update the MSP432 libraries to the latest version.\r
+ + Add Microchip CEC1302 (ARM Cortex-M4F) demos for GCC, Keil and MikroC\r
+ compilers.\r
+ + Move the Atmel SAMA5D2 demo into the main distribution.\r
+\r
+Changes between FreeRTOS V9.0.0rc1 and FreeRTOS V9.0.0rc2 (release candidate 2)\r
+released March 30 2016:\r
+\r
+ NOTE - See http://www.FreeRTOS.org/FreeRTOS-V9.html for details\r
+\r
+ + The functions that create RTOS objects using static memory allocation have\r
+ been simplified and will not revert to using dynamic allocation if a\r
+ buffer is passed into a function as NULL.\r
+ + Introduced the configSUPPORT_DYNAMIC_ALLOCATION configuration constant to\r
+ allow a FreeRTOS application to be built without a heap even being being\r
+ defined. The Win32 example located in the\r
+ /FreeRTOS/demo/WIN32-MSVC-Static-Allocation-Only directory is provided as\r
+ a reference for projects that do not include a FreeRTOS heap.\r
+ + Minor run-time optimisations.\r
+ + Two new low power tickless implementations that target Silicon Labs EFM32\r
+ microcontrollers.\r
+ + Addition of the xTimerGetPeriod() and xTimerGetExpireTime() API functions.\r
+\r
+Changes between FreeRTOS V8.2.3 and FreeRTOS V9.0.0rc1 (release candidate 1)\r
+released February 19 2016:\r
+\r
+ RTOS Kernel Updates:\r
+\r
+ + Major new feature - tasks, semaphores, queues, timers and event groups can\r
+ now be created using statically allocated memory, so without any calls to\r
+ pvPortMalloc().\r
+ + Major new features - Added the xTaskAbortDelay() API function which allows\r
+ one task to force another task to immediately leave the Blocked state,\r
+ even if the event the blocked task is waiting for has not occurred, or the\r
+ blocked task's timeout has not expired.\r
+ + Updates necessary to allow FreeRTOS to run on 64-bit architectures.\r
+ + Added vApplicationDaemonTaskStartupHook() which executes when the RTOS\r
+ daemon task (which used to be called the timer service task) starts\r
+ running. This is useful if the application includes initialisation code\r
+ that would benefit from executing after the scheduler has been started.\r
+ + Added the xTaskGetTaskHandle() API function, which obtains a task handle\r
+ from the task's name. xTaskGetTaskHandle() uses multiple string compare\r
+ operations, so it is recommended that it is called only once per task.\r
+ The handle returned by xTaskGetTaskHandle() can then be stored locally for\r
+ later re-use.\r
+ + Added the pcQueueGetQueueName() API function, which obtains the name of\r
+ a queue from the queue's handle.\r
+ + Tickless idling (for low power applications) can now also be used when\r
+ configUSE_PREEMPTION is 0.\r
+ + If one task deletes another task, then the stack and TCB of the deleted\r
+ task is now freed immediately. If a task deletes itself, then the stack\r
+ and TCB of the deleted task are freed by the Idle task as before.\r
+ + If a task notification is used to unblock a task from an ISR, but the\r
+ xHigherPriorityTaskWoken parameter is not used, then pend a context switch\r
+ that will then occur during the next tick interrupt.\r
+ + Heap_1.c and Heap_2.c now use the configAPPLICATION_ALLOCATED_HEAP\r
+ settings, which previously was only used by heap_4.c.\r
+ configAPPLICATION_ALLOCATED_HEAP allows the application writer to declare\r
+ the array that will be used as the FreeRTOS heap, and in-so-doing, place\r
+ the heap at a specific memory location.\r
+ + TaskStatus_t structures are used to obtain details of a task.\r
+ TaskStatus_t now includes the bae address of the task's stack.\r
+ + Added the vTaskGetTaskInfo() API function, which returns a TaskStatus_t\r
+ structure that contains information about a single task. Previously this\r
+ information could only be obtained for all the tasks at once, as an array\r
+ of TaskStatus_t structures.\r
+ + Added the uxSemaphoreGetCount() API function.\r
+ + Replicate previous Cortex-M4F and Cortex-M7 optimisations in some\r
+ Cortex-M3 port layers.\r
+\r
+ Demo Application Updates:\r
+\r
+ Further demo applications will be added prior to the final FreeRTOS V9\r
+ release.\r
+\r
+ + Updated SAM4L Atmel Studio project to use Atmel Studio 7.\r
+ + Added ARM Cortex-A53 64-bit port.\r
+ + Added a port and demo for the ARM Cortex-A53 64-bit cores on the Xilinx\r
+ Ultrascale MPSoC.\r
+ + Added Cortex-M7 SAME70 GCC demo.\r
+ + Added EFM32 Giant and Wonder Gecko demos.\r
+\r
+\r
+Changes between V8.2.2 and V8.2.3 released October 16, 2015\r
+\r
+ RTOS kernel updates:\r
+\r
+ + Fix bug identified in a modification made in V8.2.2 to the software timer\r
+ code that allows tickless low power applications to sleep indefinitely\r
+ when software timers are used.\r
+ + Simplify and improve efficiency of stack overflow checking.\r
+ + Add xTaskNotifyStateClear() API function.\r
+ + New IAR and GCC Cortex-R ports for microprocessors that do not use an ARM\r
+ generic interrupt controller (GIC).\r
+ + New PIC32MEC14xx port.\r
+ + Add support for PIC32MZ EF parts (with floating point) into the PIC32MZ\r
+ port.\r
+ + Zynq7000 port layer now declares the functions that setup and clear the\r
+ tick interrupt as weak symbols so they can be overridden by the\r
+ application, and uses a global XScuGic object so the same object can be\r
+ used by the application code.\r
+ + Introduced configUSE_TASK_FPU_SUPPORT, although the PIC32MZ EF port is\r
+ currently the only port that uses it.\r
+ + Updates to RL78 and 78K0 IAR port layers to improve support for\r
+ combinations of memory models.\r
+ + Minor updates to heap_5.c to remove compiler warnings generated by some\r
+ compilers.\r
+ + License simplifications. See /FreeRTOS/License/license.txt in the\r
+ official distribution.\r
+\r
+ FreeRTOS+ updates:\r
+\r
+ + Update directory names to use WolfSSL instead of CyaSSL, inline with\r
+ WolfSSL's re-branding.\r
+ + Update to latest WolfSSL code.\r
+ + Update to latest FreeRTOS+Trace recorder code.\r
+ + Add in the FreeRTOS+Trace recorder library required for streaming trace.\r
+\r
+ Demo application changes:\r
+\r
+ + Add demo applications for Renesas RZ/T (Cortex-R), PIC32MZ EF (PIC32 with\r
+ floating point hardware), PIC32MEC14xx, RX71M, RX113 and RX231.\r
+ + General tidy up of spelling and compiler warnings.\r
+\r
+\r
+Changes between V8.2.1 and V8.2.2 released August 12, 2015\r
+\r
+ RTOS kernel updates:\r
+\r
+ + Added Intel IA32/x86 32-bit port.\r
+ + General maintenance.\r
+ + PRIVILEGED_FUNCTION and PRIVILEGED_DATA macros, which are used in memory\r
+ protected systems, have been added to the newer event group and software\r
+ timer functions.\r
+ + Add the errno definitions used by FreeRTOS+ components into projdefs.h.\r
+ + Remove the restriction that prevented tick-less idle implementations\r
+ waiting indefinitely when software timers were used in the same\r
+ application.\r
+ + Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of\r
+ xTaskNotifyAndQuery().\r
+ + Add additional NOPs to the MSP430X port layers to ensure strict compliance\r
+ with the hardware documentation.\r
+ + Microblaze port: Added option for port optimised task selection.\r
+ + Microblaze port: Previously tasks inherited the exception enable state\r
+ at the time the task was created. Now all tasks are created with\r
+ exceptions enabled if the Microblaze design supports exceptions.\r
+ + Windows port: Add additional safe guards to ensure the correct start up\r
+ sequence and thread switching timing.\r
+ + Windows port: Improve the implementation of the port optimised task\r
+ selection assembly code.\r
+ + Update heap_4 and heap_5 to allow use on 64-bit processors.\r
+ + Simplify the code that creates a queue.\r
+ + General improved tick-less idle behaviour.\r
+ + Ensure none of the variables in the common kernel files are initialised to\r
+ anything other than zero.\r
+ + Correct calculation of xHeapStructSize in heap_4 and heap_5.\r
+\r
+ Demo application updates:\r
+\r
+ + Added demo project for the new IA32/x86 port that targets the Galileo\r
+ hardware.\r
+ + Added MSP430FR5969 demos (previously provided as a separate download).\r
+ + Added FreeRTOS BSP repository for automatic creation of FreeRTOS\r
+ applications in the Xilinx SDK.\r
+ + Added Atmel Studio / GCC project for the SAMV71 (ARM Cortex-M7)\r
+ + Update Xilinx SDK projects to use version 2015.2 of the SDK.\r
+ + Remove Microblaze demos that were using obsolete tools.\r
+ + Add MSP43FR5969 IAR and CCS demos.\r
+\r
+ FreeRTOS+ Updates:\r
+\r
+ + Updated FreeRTOS+Trace recorder library, which requires an update to the\r
+ FreeRTOS+Trace application.\r
+ + Added Reliance Edge source code and demo application. Reliance edge is\r
+ a fail safe transactional file system ideal for applications that require\r
+ file storage, and especially when high reliability is essential.\r
+ + Introduce configAPPLICATION_PROVIDES_cOutputBuffer to allow FreeRTOS+CLI\r
+ users to place the output buffer at a fixed memory address.\r
+ + Improve the NetworkInterface.c file provided for the Windows port of\r
+ FreeRTOS+UDP.\r
+\r
+Changes between V8.2.0 and V8.2.1 released 24th March 2015.\r
+\r
+ RTOS kernel updates:\r
+\r
+ + Added user definable and flexible thread local storage facility.\r
+ + Added vTimerSetTimerID() API function to complement the pvTimerGetTimerID()\r
+ function to allow the timer's ID to be used as timer local storage.\r
+ + Fixed a potential issue related to the use of queue sets from an ISR.\r
+ + Some updates to the Xilinx Microblaze GCC port.\r
+ + Added ARM Cortex-M4F port for Texas Instruments Code Composer Studio.\r
+ + Added ARM Cortex-M7 r0p1 port layer for IAR, GCC and Keil which contains a\r
+ minor errata work around. All other ARM Cortex-M7 core revisions should\r
+ use the ARM Cortex-M4F port.\r
+ + Exclude the whole of croutine.c if configUSE_CO_ROUTINES is set to 0.\r
+ + Change some data types from uint32_t to size_t in preparation for 64-bit\r
+ Windows port.\r
+ + Update the PIC32 port to remove deprecation warnings output by the latest\r
+ XC32 compilers.\r
+ + Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to\r
+ overwrite items in two queues that are part of the same set.\r
+\r
+ Demo application updates:\r
+\r
+ + Added demo application for TI's ARM Cortex-M4F based MSP432\r
+ microcontroller using IAR, Keil and CCS compilers.\r
+ + Added demo application for STM32F ARM Cortex-M7 based microcontroller\r
+ using IAR and Keil.\r
+ + Added demo application for Atmel SAMV71 ARM Cortex-M7 based\r
+ microcontroller using IAR and Keil.\r
+ + Added Microblaze demo that uses the 2014.4 version of the Xilinx SDK and\r
+ runs on the KC705 evaluation board (Kintex FPGA).\r
+\r
+Changes between V8.1.2 and V8.2.0 released 16th January 2015\r
+\r
+ Changes between release candidate 1 and the official release are restricted\r
+ to maintenance only.\r
+\r
+ Significant RTOS kernel updates:\r
+\r
+ + MAJOR NEW FEATURE! Task notifications. Please see the following URL for\r
+ details: http://www.FreeRTOS.org/RTOS-task-notifications.html\r
+ + NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into\r
+ a new header file called FreeRTOS/Source/include/deprecated_definitions.h.\r
+ This header file must be present to build. Note some of the obsolete\r
+ definitions are still used by very old demo application projects.\r
+\r
+ Other RTOS kernel updates:\r
+\r
+ + Made xSemaphoreGiveFromISR() a function rather than a macro that calls\r
+ xQueueGenericSendFromISR(). This allows for major performance\r
+ enhancements at the expense of some additional code size if both functions\r
+ are used in the same application. NOTE: In most uses cases such use of\r
+ a semaphore can now be replaced with a task notification which is smaller\r
+ and faster still.\r
+ + The TCB is now always allocated such that the task's stack grows away from\r
+ the TCB (improves debugging of stack overflows as the overflow will not\r
+ overwrite the task's name).\r
+ + GCC, IAR and Keil Cortex-M4F ports now use more inlining (performance\r
+ enhancements at the cost of a little additional code space).\r
+ + Queues are now allocated with a single call to pvPortMalloc() which\r
+ allocates both the queue structure and the queue storage area.\r
+ + Introduced a new critical section macro for reading the tick count that\r
+ defines away to nothing in cases where the width of the tick allows the\r
+ tick count to be read atomically (performance benefits - especially when\r
+ optimisation is on).\r
+ + Introduced configAPPLICATION_ALLOCATED_HEAP in heap_4.c to allow the\r
+ application writer to provide their own heap array - and in so doing\r
+ control the location of the heap.\r
+ + Introduced configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES which, when set, will\r
+ include known values in both list and list item structures. The values\r
+ are intended to assist debugging. If the values get overwritten then it\r
+ is likely application code has written over RAM used by the kernel.\r
+ + configASSERT()s in all Cortex-M ports used to test the lowest 5 bits of\r
+ the interrupt control register to detect taskENTER_CRITICAL() being called\r
+ from an interrupt. This has been changed to test all 8 bits.\r
+ + Introduced uxTaskPriorityGetFromISR().\r
+ + Microblze V8 port now tests XPAR_MICROBLAZE_0_USE_FPU for inequality to 0\r
+ rather than equality to 1, and 2 and 3 are also valid values.\r
+ + Cortex-A5 GIC-less port no longer passes the address of the interrupting\r
+ peripheral into the interrupt handler.\r
+ + Fix an issue in FreeRTOS-MPU where an attempt was made to free the stack\r
+ belonging to a task when the task was deleted, even when the stack was\r
+ allocated statically.\r
+ + Utility (helper) functions that format task statistic information into\r
+ human readable tables now pad task names with spaces to ensure columns\r
+ line up correctly even where task name lengths vary greatly.\r
+ + Update FreeRTOS+Trace recorder library to version 2.7.0.\r
+\r
+ Demo application updates:\r
+\r
+ + Added two new standard demo task sets: IntSemTest and TaskNotify.\r
+ + Added port and demo application for Atmel SAMA5D4 Cortex-A5 MPU.\r
+ + Added demo application for Altera Cyclone V Cortex-A9 MPU.\r
+ + Updated Zynq demo to use version 2014.4 of Xilinx's SDK and added in\r
+ demo tasks for new RTOS features.\r
+ + Updated Atmel SAM4E and SAM4S demos to include a lot of additional test\r
+ and demo tasks.\r
+ + Fixed a corner case issue in Atmel SAM4L low power tickless\r
+ implementation, and added button interrupt handling.\r
+ + Make the interrupt queue tests more tolerant to heave CPU loads.\r
+ + Updated MSVC FreeRTOS simulator demo to include the latest standard test\r
+ and demo tasks.\r
+ + Updated MingW/Eclipse FreeRTOS simulator demo to match the FreeRTOS MSVC\r
+ simulator demo.\r
+ + Updated all demos that use FreeRTOS+Trace to work with the latest trace\r
+ recorder code.\r
+\r
+\r
+Changes between V8.1.1 and V8.1.2 released September 2nd 2014\r
+\r
+ Move the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into the\r
+ individual port layers where necessary so it does not affect ports that do\r
+ not support the definition.\r
+\r
+Changes between V8.1.0 and V8.1.1 released August 29th 2014\r
+\r
+ By popular requests - a minor patch to V8.1.0 to re-instate the ability to\r
+ give a mutex type semaphore (with priority inheritance) from an interrupt\r
+ handler.\r
+\r
+Changes between V8.0.1 and V8.1.0 released August 26th 2014\r
+\r
+ FreeRTOS scheduler, kernel, demo and test updates:\r
+\r
+ + Improved the priority inheritance algorithms to assist integration with\r
+ off the shelf middleware that may hold multiple mutexes simultaneously.\r
+ + Introduce heap_5.c, which is similar to heap_4.c but allows the heap to\r
+ span multiple non-contiguous memory regions.\r
+ + Updated all Cortex-A9 ports to help trap a couple of common usage errors -\r
+ the first being when a task incorrectly attempts to exit its implementing\r
+ function and the second being when a non interrupt safe API function is\r
+ called from an interrupt.\r
+ + Update all Cortex-A9 ports to remove obsolete mode switches prior to\r
+ restoring a task context.\r
+ + configUSE_PORT_OPTIMISED_TASK_SELECTION now defaults to 1 instead of 0.\r
+ + Update all Cortex-M3/4F ports to trap a non interrupt safe API function\r
+ being called from an interrupt handler.\r
+ + Simplify the alignment checks in heap_4.c.\r
+ + Update the MSVC Windows simulator demo to use heap_5.c in place of\r
+ heap_4.c to ensure end users have an example to refer to.\r
+ + Updated standard demo test code to test the new priority inheritance\r
+ algorithms.\r
+ + Updated the standard demo tasks to make use of stdint and the FreeRTOS\r
+ specific typedefs that were introduced in FreeRTOS V8.0.0.\r
+ + Introduce the pdMS_TO_TICKS() macro as a more user friendly and intuitive\r
+ alternative to pdTICKS_PER_MS - both of which can be used to convert a\r
+ time specified in milliseconds to a time specified in RTOS ticks.\r
+ + Fix a bug in the Tasking compiler's Cortex-M port that resulted in an\r
+ incorrect value being written to the basepri register. This only effects\r
+ users of the Tasking compiler.\r
+ + Update the Zynq demo to use version 2014.2 of the SDK and add in an lwIP\r
+ example that demonstrates lwIP being used with both its raw and sockets\r
+ interfaces.\r
+ + Updated the CCS Cortex-R4 port to enable it to be built with the latest\r
+ CCS compiler.\r
+\r
+ New ports and demo applications:\r
+\r
+ + Two Renesas RX64M ports (RXv2 core) and demos introduced, one for the GCC\r
+ compiler and one for the Renesas compiler. Both demos use e2 studio.\r
+ + Generic IAR Cortex-A5 port (without any reliance on a GIC) introduced.\r
+ The new port is demonstrated on an Atmel SAMA5D3 XPlained board.\r
+\r
+ FreeRTOS+ component updates:\r
+\r
+ + Update CyaSSL to the latest version.\r
+ + Updated the FreeRTOS+ components supplied directly by Real Time Engineers\r
+ Ltd. to make use of stdint and the FreeRTOS specific typedefs that were\r
+ introduced in FreeRTOS V8.0.0.\r
+ + Rework and simplify the FreeRTOS+FAT SL RAM disk driver.\r
+\r
+ Miscellaneous updates and maintenance:\r
+\r
+ + Update the IAR and DS-5/ARM RZ demos to target the official RZ RSK\r
+ hardware in place of the previously targeted Renesas internal (not\r
+ publicly available) hardware.\r
+ + Various other maintenance tasks.\r
+\r
+\r
+Changes between V8.0.0 and V8.0.1 released 2nd May 2014\r
+\r
+ + Minor fixes to the event group functionality that was released in V8.0.0.\r
+ The 'clear bits from ISR' functionality is now implemented using a\r
+ deferred interrupt callback instead of a function, and the 'wait bits' and\r
+ 'task sync' functions now correctly clear internal control bits before\r
+ returning a value in every possible path through the respective functions.\r
+ + Ensure the updating of internal control data is protected by a critical\r
+ section after a task is deleted or suspended.\r
+ + Minor fixes to FreeRTOS+FAT SL - namely seeking beyond the end of a file\r
+ when the offset was not a multiple of the sector size.\r
+ + Ensure Cortex-A9 system registers are only ever accessed as 32-bit values,\r
+ even when only the lest significant byte of the register is implemented.\r
+\r
+ Other updates:\r
+\r
+ + Updated the XMC4200 IAR project so it links with version 7.x of the IAR\r
+ tools.\r
+ + Add RL78L1C demo.\r
+ + Add pcTimerGetName() API function.\r
+ + Call _reclaim_reent() when a task is deleted if configUSE_NEWLIB_REENTRANT\r
+ is defined.\r
+\r
+Changes between V7.6.0 and V8.0.0 released 19th Feb 2014\r
+\r
+ http://www.freertos.org/upgrading-to-FreeRTOS-V8.html\r
+\r
+ FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,\r
+ although a change to the type used to reference character strings may result\r
+ in application code generating a few (easily clearable) compiler warnings\r
+ after the upgrade, and an updated typedef naming convention means use of the\r
+ old typedef names is now discouraged.\r
+ See http://www.freertos.org/upgrading-to-FreeRTOS-V8.html for full\r
+ information.\r
+\r
+ New features and functionality:\r
+\r
+ + Event groups - see http://www.freertos.org/FreeRTOS-Event-Groups.html\r
+ + Centralised deferred interrupt processing - see\r
+ http://www.freertos.org/xTimerPendFunctionCallFromISR.html\r
+\r
+ Other updates:\r
+\r
+ + Previously, when a task left the Blocked state, a context switch was\r
+ performed if the priority of the unblocked task was greater than or equal\r
+ to the priority of the Running task. Now a context switch is only\r
+ performed if the priority of the unblocked task is greater than the\r
+ priority of the Running task.\r
+ + New low power tickless demonstration project that targets the ST STM32L\r
+ microcontroller - see\r
+ http://www.freertos.org/STM32L-discovery-low-power-tickless-RTOS-demo.html\r
+ + Add xPortGetMinimumEverFreeHeapSize() to heap_4.c.\r
+ + Small change to the tickless low power implementation on the SAM4L to\r
+ ensure the alarm value (compare match value) cannot be set to zero when a\r
+ tickless period is exited due to an interrupt originating from a source\r
+ other than the RTOS tick.\r
+ + Update the GCC/Eclipse Win32 simulator demo to make better use of Eclipse\r
+ resource filters and match the functionality of the MSVC equivalent.\r
+ + xTaskIsTaskSuspended() is no longer a public function. Use\r
+ eTaskGetState() in its place.\r
+ + Improved trace macros, including tracing of heap usage.\r
+ + Remove one level of indirection when accepting interrupts on the PIC32MZ.\r
+ + Add Cortex-A9 GCC port layer.\r
+ + Add Xilinx Zynq demo application.\r
+\r
+\r
+Changes between V7.5.3 and V7.6.0 released 18th November 2013\r
+\r
+ V7.6.0 changes some behaviour when the co-operative scheduler is used (when\r
+ configUSE_PREEMPTION is set to 0). It is important to note that the\r
+ behaviour of the pre-emptive scheduler is unchanged - the following\r
+ description only applies when configUSE_PREEMPTION is set to 0:\r
+\r
+ WHEN configUSE_PREEMPTION IS SET TO 0 (which is in a small minority of\r
+ cases) a context switch will now only occur when a task places itself into\r
+ the Blocked state, or explicitly calls taskYIELD(). This differs from\r
+ previous versions, where a context switch would also occur when implicitly\r
+ moving a higher priority task out of the Blocked state. For example,\r
+ previously, WHEN PREEMPTION WAS TURNED OFF, if task A unblocks task B by\r
+ writing to a queue, then the scheduler would switch to the higher priority\r
+ task. Now, WHEN PREEMPTION IS TURNED OFF, if task A unblocks task B by\r
+ writing to a queue, task B will not start running until task A enters the\r
+ Blocked state or task A calls taskYIELD(). [If configUSE_PREEMPTION is not\r
+ set to 0, so the normal pre-emptive scheduler is being used, then task B\r
+ will start running immediately that it is moved out of the Blocked state].\r
+\r
+ Other changes:\r
+\r
+ + Added a port layer and a demo project for the new PIC32MZ architecture.\r
+ + Update the PIC32MX port layer to re-introduce some ehb instructions that\r
+ were previously removed, add the ability to catch interrupt stack\r
+ overflows (previously only task stack overflows were trapped), and also\r
+ add the ability to catch an application task incorrectly attempting to\r
+ return from its implementing function.\r
+ + Make dramatic improvements to the performance of the Win32 simulator port\r
+ layer.\r
+ + Ensure tasks that are blocked indefinitely report their state as Blocked\r
+ instead of Suspended.\r
+ + Slight improvement to the Cortex-M4F port layers where previously one\r
+ register was inadvertently being saved twice.\r
+ + Introduce the xSemaphoreCreateBinary() API function to ensure consistency\r
+ in the semantics of how each semaphore type is created. It is no longer\r
+ recommended to use vSemaphoreCreateBinary() (the version prefixed with a\r
+ 'v'), although it will remain in the code for backward compatibility.\r
+ + Update the Cortex-M0 port layers to allow the scheduler to be started\r
+ without using the SVC handler.\r
+ + Added a build configuration to the PIC32MX MPLAB X demo project that\r
+ targets the PIC32 USB II starter kit. Previously all the build\r
+ configurations required the Explorer 16 hardware.\r
+ + Some of the standard demo tasks have been updated to ensure they execute\r
+ correctly with the updated co-operative scheduling behaviour.\r
+ + Added comprehensive demo for the Atmel SAM4E, including use of\r
+ FreeRTOS+UDP, FreeRTOS+FAT SL and FreeRTOS+CLI.\r
+\r
+ FreeRTOS+ Changes:\r
+\r
+ + Minor maintenance on FreeRTOS+UDP.\r
+\r
+Changes between V7.5.2 and V7.5.3 released October 14 2013\r
+\r
+ Kernel changes:\r
+\r
+ + Prior to V7.5.x yields requested from the tick hook would occur in the\r
+ same tick interrupt - revert to that original behaviour.\r
+ + New API function uxQueueSpacesAvailable().\r
+ + Introduced the prvTaskExitError() function to Cortex-M0, Cortex-M3/4\r
+ and Cortex-M4F ports. prvTaskExitError() is used to trap tasks that\r
+ attempt to return from their implementing functions (tasks should call\r
+ vTaskDelete( NULL ); if they want to exit).\r
+ + The Cortex-M0 version of portSET_INTERRUPT_MASK_FROM_ISR and\r
+ portCLEAR_INTERRUPT_MASK_FROM_ISR are now fully nestable.\r
+ + Improved behaviour and robustness of the default Cortex-M tickless idle\r
+ behaviour.\r
+ + Add workaround for silicon errata PMU_CM001 in Infineon XMC4000 devices to\r
+ all Cortex-M4F ports.\r
+ + Add Cortex-M0 port for Keil.\r
+ + Updated Cortus port.\r
+ + Ensure _impure_ptr is initialised before the scheduler is started.\r
+ Previously it was not set until the first context switch.\r
+\r
+ FreeRTOS+ changes:\r
+\r
+ + Update FreeRTOS+UDP to V1.0.1 - including direct integration of the\r
+ FreeRTOS+Nabto task, improvements to the DHCP behaviour, and a correction\r
+ to the test that prevents the network event hook being called on the first\r
+ network down event. The FreeRTOS+UDP change history is maintained\r
+ separately.\r
+ + Correct the __NVIC_PRIO_BITS setting in the LPC18xx.h header files\r
+ provided in the NXP CMSIS library, then update the interrupts used by the\r
+ LPC18xx demos accordingly.\r
+ + Replace double quotes (") with single quotes (') in FreeRTOS+CLI help\r
+ strings to ensure the strings can be used with the JSON descriptions used\r
+ in the FreeRTOS+Nabto demos.\r
+\r
+ Demo and miscellaneous changes:\r
+\r
+ + Added demo for the Atmel SAMD20 Cortex-M0+. The demo includes\r
+ FreeRTOS+CLI\r
+ + Added a demo for the Infineon Cortex-M0 that can be built with the IAR\r
+ Keil and GCC tools.\r
+ + Updated the Infineon XMC4000 demos for IAR, Keil, GCC and Tasking tools,\r
+ with additional build configurations to directly support the XMC4200 and\r
+ XMC4400 devices, in addition to the previously supported XMC4500.\r
+ + Updated the demo application.\r
+ + Added additional trace macros traceMALLOC and traceFREE to track heap\r
+ usage.\r
+\r
+Changes between V7.5.0 and V7.5.2 released July 24 2013\r
+\r
+ V7.5.2 makes the new Cortex-M vPortCheckInterruptPriority() function\r
+ compatible with the STM32 standard peripheral driver library, and adds\r
+ an extra critical section to the default low power tickless mode\r
+ implementation. Only users of the STM32 peripheral library or the default\r
+ tickless implementation need update from version 7.5.0.\r
+\r
+Changes between V7.4.2 and V7.5.0 released July 19 2013\r
+\r
+ V7.5.0 is a major upgrade that includes multiple scheduling and efficiency\r
+ improvements, and some new API functions.\r
+\r
+ Compatibility information for FreeRTOS users:\r
+ FreeRTOS V7.5.0 is backward compatible with FreeRTOS V7.4.0 with one\r
+ exception; the vTaskList() and vTaskGetRunTimeStats() functions are now\r
+ considered legacy, having been replaced by the single uxTaskGetSystemState()\r
+ function. configUSE_STATS_FORMATTING_FUNCTIONS must be set to 1 in\r
+ FreeRTOSConfig.h for vTaskList() and vTaskGetRunTimeStats() to be\r
+ available.\r
+\r
+ Compatibility information for FreeRTOS port writers:\r
+ vTaskIncrementTick() is now called xTaskIncrementTick() (because it now\r
+ returns a value).\r
+\r
+ Headline changes:\r
+\r
+ + Multiple scheduling and efficiency improvements.\r
+ + Core kernel files now pass PC-Lint V8 static checking without outputting\r
+ any warnings (information on the test conditions will follow).\r
+\r
+ New API functions:\r
+\r
+ + uxTaskGetSystemState() http://www.freertos.org/uxTaskGetSystemState.html\r
+ + xQueueOverwrite() http://www.freertos.org/xQueueOverwrite.html\r
+ + xQueueOverwriteFromISR()\r
+ + xQueuePeekFromISR()\r
+\r
+ The following ports and demos, which were previously available separately,\r
+ are now incorporated into the main FreeRTOS zip file download:\r
+\r
+ + ARM Cortex-A9 IAR\r
+ + ARM Cortex-A9 ARM compiler\r
+ + Renesas RZ\r
+ + Microsemi SmartFusion2\r
+\r
+ New FreeRTOSConfig.h settings\r
+ http://shop.freertos.org/FreeRTOS_API_and_Configuration_Reference_s/1822.htm\r
+\r
+ + configUSE_TIME_SLICING\r
+ + configUSE_NEWLIB_REENTRANT\r
+ + configUSE_STATS_FORMATTING_FUNCTIONS\r
+ + configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS\r
+\r
+ Other changes:\r
+\r
+ + (MPU port only) The configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS\r
+ options provides a mechanism that allows application writers to execute\r
+ certain functions in privileged mode even when a task is running in user\r
+ mode.\r
+ + Ports that support interrupt nesting now include a configASSERT() that\r
+ will trigger if an interrupt safe FreeRTOS function is called from an\r
+ interrupt that has a priority designated as above the maximum system/API\r
+ call interrupt priority.\r
+ + The included FreeRTOS+Trace recorder code has been updated to the latest\r
+ version, and the demo applications that use the trace recorder code have\r
+ been updated accordingly.\r
+ + The FreeRTOS Windows Simulator (MSVC version only) has been updated to\r
+ include a new basic 'blinky' build option in addition to the original\r
+ comprehensive build option.\r
+ + Improve RAM usage efficiency of heap_4.c and heap_2.c.\r
+ + Prevent heap_4.c from attempting to free memory blocks that were not\r
+ allocated by heap_4.c, or have already been freed.\r
+ + As FreeRTOS now comes with FreeRTOS+FAT SL (donated by HCC) the Chan FATfs\r
+ files have been removed from FreeRTOS/Demo/Common.\r
+ + Fix build error when R4 port is build in co-operative mode.\r
+ + Multiple port and demo application maintenance activities.\r
+\r
+Changes between V7.4.1 and V7.4.2 released May 1 2013\r
+\r
+ NOTE: There are no changes in the FreeRTOS kernel between V7.4.1 and V7.4.2\r
+\r
+ + Added FreeRTOS+FAT SL source code and demo project. The demo project\r
+ runs in the FreeRTOS Windows simulator for easy and hardware independent\r
+ experimentation and evaluation. See http://www.FreeRTOS.org/fat_sl\r
+\r
+Changes between V7.4.0 and V7.4.1 released April 18 2013\r
+\r
+ + To ensure strict conformance with the spec and ensure compatibility with\r
+ future chips data and instruction barrier instructions have been added to\r
+ the yield macros of Cortex-M and Cortex-R port layers. For efficiency\r
+ the Cortex-M port layer "yield" and "yield" from ISR are now implemented\r
+ separately as the barrier instructions are not required in the ISR case.\r
+ + Added FreeRTOS+UDP into main download.\r
+ + Reorganised the FreeRTOS+ directory so it now matches the FreeRTOS\r
+ directory with Source and Demo subdirectories.\r
+ + Implemented the Berkeley sockets select() function in FreeRTOS+UDP.\r
+ + Changed (unsigned) casting in calls to standard library functions with\r
+ (size_t) casting.\r
+ + Added the Atmel SAM4L and Renesas RX100 demos that demonstrates the\r
+ tickless (tick suppression) low power FreeRTOS features.\r
+ + Add a new RL78 IAR demo that targets numerous new RL78 chips and\r
+ evaluation boards.\r
+ + Adjusted stack alignment on RX200 ports to ensure an assert was not\r
+ falsely triggered when configASSERT() is defined.\r
+ + Updated the Cortex_M4F_Infineon_XMC4500_IAR demo to build with the latest\r
+ version of EWARM.\r
+ + Corrected header comments in the het.c and het.h files (RM48/TMS570 demo).\r
+\r
+\r
+Changes between V7.3.0 and V7.4.0 released February 20 2013\r
+\r
+ + New feature: Queue sets. See:\r
+ http://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html\r
+ + Overhauled the default tickless idle mode implementation provided with the\r
+ ARM Cortex-M3 port layers.\r
+ + Enhanced tickless support in the core kernel code with the introduction of\r
+ the configEXPECTED_IDLE_TIME_BEFORE_SLEEP macro and the\r
+ eTaskConfirmSleepModeStatus() function.\r
+ + Added the QueueSet.c common demo/test file. Several demo applications\r
+ have been updated to use the new demo/test tasks.\r
+ + Removed reliance on the PLIB libraries from the MPLAB PIC32 port layer and\r
+ demo applications.\r
+ + Added the FreeRTOS+Trace recorder code to the MSVC Win32 demo.\r
+ + Renamed eTaskStateGet() to eTaskGetState() for consistency, and added a\r
+ pre-processor macro for backward compatibility with the previous name.\r
+ + Updated functions implemented in the core queue.c source file to allow\r
+ queue.h to be included from the .c file directly (this prevents compiler\r
+ warnings that were generated by some compilers).\r
+ + Updated the CCS Cortex-R4 port layer to replace the CLZ assembler function\r
+ with the CLZ compiler intrinsic that is provided by the latest versions of\r
+ the CCS ARM compiler.\r
+ + Updated all heap_x.c implementations to replace the structure that was\r
+ used to ensure the start of the heap was aligned with a more portable\r
+ direct C code implementation.\r
+ + Added support for PIC24 devices that include EDS.\r
+ + Minor optimisations to the PIC32 port layer.\r
+ + Minor changes to tasks.c that allow the state viewer plug-ins to display\r
+ additional information.\r
+ + Bug fix: Update prvProcessReceivedCommands() in timers.c to remove an\r
+ issue that could occur if the priority of the timer daemon task was set\r
+ below the priority of tasks that used timer services.\r
+ + Update the FreeRTOS+Trace recorder code to the latest version.\r
+\r
+Changes between V7.2.0 and V7.3.0 released October 31 2012\r
+\r
+ + Added ability to override the default scheduler task selection mechanism\r
+ with implementations that make use of architecture specific instructions.\r
+ + Added ability to suppress tick interrupts during idle time, and in so\r
+ doing, provide the ability to make use of architecture specific low power\r
+ functionality.\r
+ + Added the portSUPPRESS_TICKS_AND_SLEEP() macro and vTaskStepTick() helper\r
+ function.\r
+ + Added the configSYSTICK_CLOCK_HZ configuration constant.\r
+ + Reworked the Cortex-M3 and Cortex-M4F port layers for GCC, Keil and IAR to\r
+ directly support basic power saving functionality.\r
+ + Added hooks to allow basic power saving to be augmented in the application\r
+ by making use of chip specific functionality.\r
+ + Minor change to allow mutex type semaphores to be used from interrupts\r
+ (which would not be a normal usage model for a mutex).\r
+ + Change the behaviour of the interrupt safe interrupt mask save and restore\r
+ macros in the Cortex-M ports. The save macro now returns the previous\r
+ mask value. The restore macro now uses the previous mask value. These\r
+ changes are not necessary for the kernel's own implementation, and are\r
+ made purely because the macros were being used by application writers.\r
+ + Added eTaskStateGet() API function.\r
+ + Added port specific optimisations to the PIC32 port layer, and updated the\r
+ PIC32 demo applications to make use of this new feature.\r
+ + Added port specific optimisations to the Win32 simulator port.\r
+ + Added new ports and demo applications for the TI Hercules RM48 and TMS570\r
+ safety microcontrollers.\r
+ + Added SAM3 demos targeting the ATSAM3S-EK2 and ATSAM3X-EK evaluation\r
+ boards.\r
+ + Updated the PIC32 MPLAB X project to manually set the compiler include\r
+ paths instead of using the IDE entry box following reports that the\r
+ include paths were somehow being deleted.\r
+ + Improved character handling in FreeRTOS+CLI.\r
+\r
+Changes between V7.1.1 and V7.2.0 released 14 August 2012\r
+\r
+ FreeRTOS V7.2.0 is backward compatible with FreeRTOS V7.1.2.\r
+\r
+ + Added a FreeRTOS+ sub-directory. The directory contains some FreeRTOS+\r
+ source code, and example projects that use the FreeRTOS Win32 simulator.\r
+ + Added a new example heap allocation implementation (heap_4.c) that\r
+ includes memory block coalescence.\r
+ + Added a demo that targets the Atmel SAM4S Cortex-M4 based microcontroller.\r
+ The demo is preconfigured to build using the free Atmel Studio 6 IDE and\r
+ GCC compiler.\r
+ + Added xSemaphoreTakeFromISR() implementation.\r
+ + The last parameter in ISR safe FreeRTOS queue and semaphore functions\r
+ (xHigherPriorityTaskWoken) is now optional and can be set to NULL if it\r
+ is not required.\r
+ + Update the IAR and MSP430X ports to clear all lower power mode bits before\r
+ exiting the tick interrupt [bug fix].\r
+ + Allow xQueueReset() to be used, even when the queues event lists are not\r
+ empty.\r
+ + Added a vQueueDelete() handler for the FreeRTOS MPU port (this was\r
+ previously missing).\r
+ + Updated the vPortSVCHandler() functions in the FreeRTOS MPU port layer to\r
+ ensure it compiles with the latest ARM GCC compilers from Linaro.\r
+ + Updated the prvReadGP() function in the NIOS II port to ensure the compiler\r
+ can choose any register for the functions parameter (required at high\r
+ compiler optimisation levels).\r
+ + Add #error macros into the Keil and IAR Cortex-M ports to ensure they\r
+ cannot be built if the user has set configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+ to 0.\r
+ + Added comments in the FreeRTOSConfig.h files associated with Cortex-M3 and\r
+ Cortex-M4 demos stating that the configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+ parameter must not be set to 0.\r
+ + Introduce new INCLUDE_xQueueGetMutexHolder configuration constant\r
+ (defaulted to 0).\r
+ + Added two new list handling macros - for internal use only in upcoming new\r
+ products.\r
+ + Removed all mention of the legacy vTaskStartTrace and ulTaskEndTrace\r
+ macros. FreeRTOS+Trace supersedes the legacy trace.\r
+ + Added a configASSERT() into the vPortFree() function in heap_1.c as it is\r
+ invalid for the function to be called.\r
+ + Made the xRxLock and xTxLock members of the queue structure volatile.\r
+ This is probably not necessary, and is included as a precautionary\r
+ measure.\r
+ + Modify the assert() that checks to see if the priority passed into an\r
+ xTaskCreate() function is within valid bounds to permit the assert to be\r
+ used in the FreeRTOS MPU port.\r
+ + The software timer service (daemon) task is now created in a way that\r
+ to ensure compatibility with FreeRTOS MPU.\r
+\r
+Changes between V7.1.0 and V7.1.1 released May 1 2012\r
+\r
+ New ports:\r
+\r
+ The following ports are brand new:\r
+ + Cortex-M3 Tasking\r
+\r
+ The following ports have been available as separate downloads for a number\r
+ of months, but are now included in the main FreeRTOS download.\r
+ + Cortex-M0 IAR\r
+ + Cortex-M0 GCC\r
+ + Cortex-M4F GCC (with full floating point support)\r
+\r
+\r
+ New demos:\r
+\r
+ The following demos are brand new:\r
+ + Renesas RX63N RDK (Renesas compiler)\r
+\r
+ The following demos have been available as separate downloads for a number\r
+ of months, but are now included in the main FreeRTOS download.\r
+ + NXP LPC1114 GCC/LPCXpresso\r
+ + ST STM32F0518 IAR\r
+ + Infineon XMC4500 GCC/Atollic\r
+ + Infineon XMC4500 IAR\r
+ + Infineon XMC4500 Keil\r
+ + Infineon XMC4500 Tasking\r
+\r
+\r
+ Kernel miscellaneous / maintenance:\r
+\r
+ + Introduced the portSETUP_TCB() macro to remove the requirement for the\r
+ Windows simulator to use the traceTASK_CREATE() macro, leaving the trace\r
+ macro available for use by FreeRTOS+Trace (http://www.FreeRTOS.org/trace).\r
+ + Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future\r
+ FreeRTOS+Trace versions to provide even more information to users.\r
+ + Updated the FreeRTOS MPU port to be correct for changes that were\r
+ introduced in FreeRTOS V7.1.0.\r
+ + Introduced the xQueueReset() API function.\r
+ + Introduced the xSemaphoreGetMutexHolder() API function.\r
+ + Tidy up various port implementations to add the static key word where\r
+ appropriate, and remove obsolete code.\r
+ + Slight change to the initial stack frame given to the RX600 ports to allow\r
+ them to be used in the Eclipse based E2Studio IDE without confusing GDB.\r
+ + Correct the alignment given to the initial stack of Cortex-M4F tasks.\r
+ + Added a NOP following each DINT instruction on MSP430 devices for strict\r
+ conformance with the instructions on using DINT.\r
+ + Changed the implementation of thread deletes in the Win32 port to prevent\r
+ the port making use of the traceTASK_DELETE() trace macros - leaving this\r
+ macro free for use by FreeRTOS+Trace.\r
+ + Made some benign changes to the RX600 Renesas compiler port layer to\r
+ ensure the code can be built to a library without essential code being\r
+ removed by the linker.\r
+ + Reverted the change in the name of the uxTaskNumber variable made in\r
+ V7.1.0 as it broke the IAR plug-in.\r
+\r
+\r
+ Demo miscellaneous / maintenance:\r
+\r
+ + The command interpreter has now been formally released as FreeRTOS+CLI,\r
+ and been moved out of the main FreeRTOS download, to instead be available\r
+ from the FreeRTOS+ Ecosystem site http://www.FreeRTOS.org/plus.\r
+ + flash_timer.c/h has been added to the list of standard demo tasks. This\r
+ performs the same functionality as the flash.c tasks, but using software\r
+ timers in place of tasks.\r
+ + Upgraded the PIC32 demo as follows: Changes to how the library functions\r
+ are called necessitated by the new compiler version, addition of MPLAB X\r
+ project with PIC32MX360, PIC32MX460 and PIC32MX795 configurations,\r
+ addition of simply blinky demo, updated FreeRTOSConfig.h to include more\r
+ parameters, addition of hook function stubs.\r
+ + The MSP430X IAR and CCS demos have been updated to ensure the power\r
+ settings are correct for the configured CPU frequency.\r
+ + Rowley CrossWorks projects have been updated to correct the "multiple\r
+ definition of ..." warnings introduced when the toolchain was updated.\r
+ + Updated various FreeRTOSConfig.h header files associated with projects\r
+ that build with Eclipse to include a #error statement informing the user\r
+ that the CreateProjectDirectoryStructure.bat batch file needs to be\r
+ executed before the projects can be opened.\r
+ + Renamed directories that included "CCS4" in their name to remove the '4'\r
+ and instead just be "CCS". This is because the demo was updated and\r
+ tested to also work with later Code Composer Studio versions.\r
+ + Updated the TCP/IP periodic timer frequency in numerous uIP demos to be\r
+ 50ms instead of 500ms.\r
+\r
+Changes between V7.0.2 and V7.1.0 released December 13 2011\r
+\r
+ New ports:\r
+\r
+ + Cortex-M4F IAR port.\r
+ + Cortex-M4F Keil/RVDS port.\r
+ + TriCore GCC port.\r
+\r
+ New demos:\r
+\r
+ + NXP LPC4350 using the Keil MDK, and demonstrated on a Hitex development\r
+ board.\r
+ + ST STM32F407 using the IAR Embedded Workbench for ARM, and demonstrated on\r
+ the IAR STM32F407ZG-SK starter kit.\r
+ + Infineon TriCore TC1782, using the GCC compiler, demonstrated on the\r
+ TriBoard TC1782 evaluation board.\r
+ + Renesas RX630, using the Renesas compiler and HEW, demonstrated on an\r
+ RX630 RSK (Renesas Starter Kit).\r
+\r
+ Miscellaneous / maintenance:\r
+\r
+ + Removed all calls to printf() from the K60/IAR Kinetis demo so the project\r
+ can execute stand alone - without being connected to the debugger.\r
+ + Completed the command interpreter framework. Command handlers now receive\r
+ the entire command string, giving them direct access to parameters.\r
+ Utility functions are provided to check the number of parameters, and\r
+ return parameter sub-strings.\r
+ + The previously documented fix for the bug in xTaskResumeFromISR() that\r
+ effected (only) ports supporting interrupt nesting has now been\r
+ incorporated into the main release.\r
+ + The portALIGNMENT_ASSERT_pxCurrentTCB() definition has been added to allow\r
+ specific ports to skip the second stack alignment check when a task is\r
+ created. This is because the second check is not appropriate for some\r
+ ports - including the new TriCore port where the checked pointer does not\r
+ actually point to a stack.\r
+ + The portCLEAN_UP_TCB() macro has been added to allow port specific clean\r
+ up when a task is deleted - again this is required by the TriCore port.\r
+ + Various other minor changes to ensure warning free builds on a growing\r
+ number of microcontroller and toolchain platforms. This includes a\r
+ (benign) correction to the prototype of the\r
+ vApplicationStackOverflowHook() definition found in lots of recent demos.\r
+\r
+ Trace system:\r
+\r
+ + The legacy trace mechanism has been completely removed - it has been\r
+ obsolete for the years since the trace macros were introduced. The\r
+ configuration constant configUSE_TRACE_FACILITY is now used to optionally\r
+ include additional queue and task information. The additional information\r
+ is intended to make the trace mechanism more generic, and allow the trace\r
+ output to provide more information. When configUSE_TRACE_FACILITY is set\r
+ to 1:\r
+ - the queue structure includes an additional member to hold the queue\r
+ type, which can be base, mutex, counting semaphore, binary semaphore\r
+ or recursive mutex.\r
+ - the queue structure includes an additional member to hold a queue\r
+ number. A trace tool can set and query the queue number for its own\r
+ purposes. The kernel does not use the queue number itself.\r
+ - the TCB structure includes an additional member to hold a task number\r
+ number. A trace tool can set and query the task number for its own\r
+ purposes. The kernel does not use the task number itself.\r
+ + Queues and all types of semaphores are now automatically allocated their\r
+ type as they are created.\r
+ + Added two new trace macros - traceTASK_PRIORITY_INHERIT() and\r
+ traskTASK_PRIORITY_DISINHERIT().\r
+ + Updated the traceQUEUE_CREATE_FAILED() macro to take a parameter that\r
+ indicates the type of queue, mutex, or semaphore that failed to be\r
+ created.\r
+ + The position from which traceCREATE_MUTEX() is called has been moved from\r
+ after the call to xQueueGenericSend() [within the same function] to before\r
+ the call. This ensures the trace events occur in the correct order.\r
+ + The value passed into tracePRIORITY_SET() has been corrected for the case\r
+ where vTaskPrioritySet() is called with a null parameter.\r
+\r
+Changes between V7.0.1 and V7.0.2 released September 20 2011\r
+\r
+ New ports:\r
+\r
+ + The official FreeRTOS Renesas RX200 port and demo application have been\r
+ incorporated into the main FreeRTOS zip file download.\r
+ + The official FreeRTOS Renesas RL78 port and demo application have been\r
+ incorporated into the main FreeRTOS zip file download.\r
+ + The official FreeRTOS Freescale Kinetis K60 tower demo application has\r
+ been incorporated into the main FreeRTOS zip file download. This includes\r
+ an embedded web server example.\r
+ + A new Microblaze V8 port layer has been created to replace the older, now\r
+ deprecated, port layer. The V8 port supports V8.x of the Microblaze IP,\r
+ including exceptions, caches, and the floating point unit. A new\r
+ Microblaze demo has also been added to demonstrate the new Microblaze V8\r
+ port layer. The demo application was created using V13.1 of the Xilinx\r
+ EDK, and includes a basic embedded web server that uses lwIP V1.4.0.\r
+ + The official FreeRTOS Fujitsu FM3 MB9A310 demo application has been\r
+ incorporated into the main FreeRTOS zip file download. Projects are\r
+ provided for both the IAR and Keil toolchains.\r
+\r
+\r
+ API additions:\r
+\r
+ + xTaskGetIdleTaskHandle() has been added.\r
+ + xTaskGetTimerDaemonTaskHandle() has been added.\r
+ + pcTaskGetTaskName() has been added.\r
+ + vSemaphoreDelete() macro has been added to make it obvious how to delete\r
+ a semaphore. In previous versions vQueueDelete() had to be used.\r
+ + vTaskCleanUpResources() has been removed. It has been obsolete for a\r
+ while.\r
+ + portPOINTER_SIZE_TYPE has been introduced to prevent compiler warnings\r
+ being generated when the size of a pointer does not match the size of\r
+ the stack type. This will (has already) be used in new ports, but will\r
+ not be retrofitted to existing ports until the existing port itself is\r
+ updated.\r
+\r
+ Other updates and news:\r
+\r
+ + The core files have all been modified to tighten the coding standard even\r
+ further. These are style, not functional changes.\r
+ + All ARM7 port layers have been slightly modified to prevent erroneous\r
+ assert() failures when tasks are created and configASSERT() is defined.\r
+ + All ARM IAR projects have been updated to build with the latest V6.2.x\r
+ versions of the IAR Embedded Workbench for ARM tools (EWARM). This was\r
+ necessary due to a change in the way EWARM uses the CMSIS libraries.\r
+ + The PIC32 port layer has been updated in preparation for V2 of the C32\r
+ compiler.\r
+ + The old Virtex-4 Microblaze demo has been marked as deprecated. Please\r
+ use the brand new Spartan-6 port and demo in its place.\r
+ + The bones of a new generic command interpreter is located in\r
+ FreeRTOS/Demo/Common/Utils/CommandInterpreter.c. This is still a work in\r
+ progress, and not documented. It is however already in use. It will be\r
+ documented in full when the projects that are already using it are\r
+ completed.\r
+ + A couple of new standard demos have been included. First, a version of\r
+ flop.c called sp_flop.c. This is similar to flop.c, but uses single\r
+ precision floats in place of double precision doubles. This allows the\r
+ for testing ports to processors that have only single precision floating\r
+ point units, and revert to using emulated calculations whenever a double\r
+ is used. Second, comtest_strings.c has been included to allow the test\r
+ of UART drivers when an entire string is transmitted at once. The\r
+ previous comtest.c only used single character transmission and reception.\r
+ + lwIP V1.4.0 is now included in the FreeRTOS/Demo/Common directory, and\r
+ used by a couple of new demos.\r
+\r
+Changes between V7.0.0 and V7.0.1 released May 13 2011\r
+\r
+ + Added a Fujitsu FM3 demo application for both the IAR and Keil tool\r
+ chains.\r
+ + Added a SmartFusion demo application for all of the IAR, Keil and\r
+ SoftConsole (GCC/Eclipse) tool chains.\r
+ + Updated the RX600 port and demo applications to take into account the\r
+ different semantics required when using the latest (V1.0.2.0) version of\r
+ the Renesas compiler.\r
+ + Modified the RX600 Ethernet driver slightly to make it more robust under\r
+ heavy load, and updated the uIP handling task to make use of the FreeRTOS\r
+ software timers.\r
+ + Slightly changed the PIC32 port layer to move an ehb instruction in line\r
+ with the recommendations of the MIPS core manual, and ensure 8 byte stack\r
+ alignment is truly always obtained.\r
+ + Changed the behaviour when tasks are suspended before the scheduler has\r
+ been started. Before, there needed to be at least one task that was not\r
+ in the suspended state. This is no longer the case.\r
+\r
+Changes between V6.1.1 and V7.0.0 released April 8 2011\r
+\r
+ FreeRTOS V7.0.0 is backward compatible with FreeRTOS V6.x.x\r
+\r
+ Main changes:\r
+\r
+ + Introduced a new software timer implementation.\r
+ + Introduced a new common demo application file to exercise the new timer\r
+ implementation.\r
+ + Updated the Win32/MSVC simulator project to include the new software timer\r
+ demo tasks and software timer tick hook test. Much simpler software timer\r
+ demonstrations are included in the demo projects for both of the new ports\r
+ (MSP430X with CCS4 and STM32 with TrueStudio).\r
+ + Various enhancements to the kernel implementation in tasks.c. These are\r
+ transparent to users and do not effect the pre-existing API.\r
+ + Added calls to configASSERT() within the kernel code. configASSERT() is\r
+ functionally equivalent to the standard C assert() macro, but does not\r
+ rely on the compiler providing assert.h.\r
+\r
+ Other changes:\r
+\r
+ + Updated the MSP430X IAR port and demo project to include support for the\r
+ medium memory model.\r
+ + Added a demo project for the MSP430X that targets the MSP430X Discovery\r
+ board and uses the Code Composer Studio 4 tools. This demo includes use\r
+ of the new software timer implementation.\r
+ + Added an STM32F100RB demo project that targets the STM32 Discovery Board\r
+ and uses the TrueStudio Eclipse based IDE from Atollic.\r
+ + Removed some compiler warnings from the PSoC demo application.\r
+ + Updated the PIC32 port layer to ensure the\r
+ configMAX_SYSCALL_INTERRUPT_PRIORITY constant works as expected no matter\r
+ what its value is (within the valid range set by the microcontroller\r
+ kernel).\r
+ + Updated the PIC24, dsPIC and PIC32 projects so they work with the latest\r
+ MPLAB compiler versions from Microchip.\r
+ + Various cosmetic changes to prepare for a standards compliance statement\r
+ that will be published after the software release.\r
+\r
+\r
+Changes between V6.1.0 and V6.1.1 released January 14 2011\r
+\r
+ + Added two new Windows simulator ports. One uses the free Microsoft Visual\r
+ Studio 2010 express edition, and the other the free MingW/Eclipse\r
+ environment. Demo projects are provided for both.\r
+ + Added three demo projects for the PSoC 5 (CYAC5588). These are for the\r
+ GCC, Keil, and RVDS build tools, and all use the PSoC Creator IDE.\r
+ + Added a demo for the low power STM32L152 microcontroller using the IAR\r
+ Embedded Workbench.\r
+ + Added a new port for the MSP430X core using the IAR Embedded Workbench.\r
+ + Updated all the RX62N demo projects that target the Renesas Demonstration\r
+ Kit (RDK) to take into account the revered LED wiring on later hardware\r
+ revisions, and the new J-Link debug interface DLL.\r
+ + Updated all the RX62N demo projects so the IO page served by the example\r
+ embedded web server works with all web browsers.\r
+ + Updated the Red Suite projects to work with the up coming Red Suite\r
+ release, and to use a more recent version of the CMSIS libraries.\r
+ + Added the traceTAKE_MUTEX_RECURSIVE_FAILED() trace macro.\r
+ + Removed the (pointless) parameter from the traceTASK_CREATE_FAILED()\r
+ trace macro.\r
+ + Introduced the portALT_GET_RUN_TIME_COUNTER_VALUE() macro to compliment\r
+ the already existing portGET_RUN_TIME_COUNTER_VALUE(). This allows for\r
+ more flexibility in how the time base for the run time statistics feature\r
+ can be implemented.\r
+ + Added a "cpsie i" instruction before the "svc 0" instruction used to start\r
+ the scheduler in each of the Cortex M3 ports. This is to ensure that\r
+ interrupts are globally enabled prior to the "svc 0" instruction being\r
+ executed in cases where interrupts are left disabled by the C start up\r
+ code.\r
+ + Slight optimisation in the run time stats calculation.\r
+\r
+Changes between V6.0.5 and V6.1.0 released October 6 2010\r
+\r
+ + Added xTaskGetTickCountFromISR() function.\r
+ + Modified vTaskSuspend() to allow tasks that have just been created to be\r
+ immediately suspended even when the kernel has not been started. This\r
+ allows them to effectively start in the Suspended state - a feature that\r
+ has been asked for on numerous occasions to assist with initialisation\r
+ procedures.\r
+ + Added ports for the Renesas RX62N using IAR, GCC and Renesas tool suites.\r
+ + Added a STM32F103 demo application that uses the Rowley tools.\r
+ + Under specific conditions xFreeBytesRemaining within heap_2.c could end up\r
+ with an incorrect value. This has been fixed.\r
+ + xTaskCreateGeneric() has a parameter that can be used to pass the handle\r
+ of the task just created out to the calling task. The assignment to this\r
+ parameter has been moved to ensure it is assigned prior to the newly\r
+ created having any possibility of executing. This takes into account the\r
+ case where the assignment is made to a global variable that is accessed by\r
+ the newly created task.\r
+ + Fixed some build time compiler warnings in various FreeTCPIP (based on\r
+ uIP) files.\r
+ + Fixed some build time compiler warnings in Demo/Common/Minimal/IntQueue.c.\r
+\r
+Changes between V6.0.4 and V6.0.5 released May 17 2010\r
+\r
+ + Added port and demo application for the Cortus APS3 processor.\r
+\r
+Changes between V6.0.3 and V6.0.4 released March 14 2010\r
+\r
+ + All the contributed files that were located in the Demo/Unsupported_Demos\r
+ directory have been removed. These files are instead now available in the\r
+ new Community Contributions section of the FreeRTOS website. See\r
+ http://www.freertos.org/RTOS-contributed-ports.html\r
+ + The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory\r
+ has been upgraded to use V2.x of the Rowley Crossworks STM32 support\r
+ package.\r
+ + An initial Energy Micro EFM32 demo has been included. This will be\r
+ updated over the coming months to make better use of the low power modes\r
+ the EFM32 provides.\r
+\r
+Changes between V6.0.2 and V6.0.3 released February 26 2010\r
+\r
+ + SuperH SH7216 (SH2A-FPU) port and demo application added.\r
+ + Slight modification made to the default implementation of\r
+ pvPortMallocAligned() and vPortFreeAligned() macros so by default they\r
+ just call pvPortMalloc() and vPortFree(). The macros are only needed to\r
+ be defined when a memory protection unit (MPU) is being used - and then\r
+ only depending on other configuration settings.\r
+\r
+Changes between V6.0.1 and V6.0.2 released January 9th 2010\r
+\r
+ + Changed all GCC ARM 7 ports to use 0 as the SWI instruction parameter.\r
+ Previously the parameter was blank and therefore only an implicit 0 but\r
+ newer GCC releases do not permit this.\r
+ + Updated IAR SAM7S and SAM7X ports to work with IAR V5.40.\r
+ + Changed the stack alignment requirement for PIC32 from 4 bytes to 8 bytes.\r
+ + Updated prvListTaskWithinSingleList() is it works on processors where the\r
+ stack grows up from low memory.\r
+ + Corrected some comments.\r
+ + Updated the startup file for the RVDS LPC21xx demo.\r
+\r
+Changes between V6.0.0 and V6.0.1 released November 15th 2009\r
+\r
+ + Altered pxPortInitialiseStack() for all Cortex-M3 ports to ensure the\r
+ stack pointer is where the compiler expects it to be when a task first\r
+ starts executing.\r
+\r
+ The following minor changes only effect the Cortex-M3 MPU port:\r
+\r
+ + portRESET_PRIVILEGE() assembly macro updated to include a clobber list.\r
+ + Added prototypes for all the privileged function wrappers to ensure no\r
+ compile time warnings are generated no matter what the warning level\r
+ setting.\r
+ + Corrected the name of portSVC_prvRaisePrivilege to\r
+ portSVC_RAISE_PRIVILEGE.\r
+ + Added conditional compilation into xTaskGenericCreate() to prevent some\r
+ compilers issuing warnings when portPRIVILEGE_BIT is defined as zero.\r
+\r
+\r
+Changes between V5.4.2 and V6.0.0 released October 16th 2009\r
+\r
+ FreeRTOS V6 is backward compatible with FreeRTOS V5.x.\r
+\r
+ Main changes:\r
+\r
+ + FreeRTOS V6 is the first version to include memory protection unit (MPU)\r
+ support. Two ports now exist for the Cortex M3, the standard FreeRTOS\r
+ which does not include MPU support, and FreeRTOS-MPU which does.\r
+ + xTaskCreateRestricted() and vTaskAllocateMPURegions() API functions added\r
+ in support of FreeRTOS-MPU.\r
+ + Wording for the GPL exception has been (hopefully) clarified. Also the\r
+ license.txt file included in the download has been fixed (the previous\r
+ version contained some corruption).\r
+\r
+ Other changes:\r
+\r
+ + New API function xPortGetFreeHeapSize() added to heap_1.c and heap_2.c.\r
+ + ARM7 GCC demo interrupt service routines wrappers have been modified to\r
+ call the C portion using an __asm statement. This prevents the function\r
+ call being inlined at higher optimisation levels.\r
+ + ARM7 ports now automatically set the THUMB bit if necessary when\r
+ setting up the initial stack of a task - removing the need for\r
+ THUMB_INTERWORK to be defined. This also allows THUMB mode and ARM mode\r
+ tasks to be mixed more easily.\r
+ + All ARM7/9 ports now have portBYTE_ALIGNMENT set to 8 by default.\r
+ + Various demo application project files have been updated to be up to date\r
+ with the latest IDE versions.\r
+ + The linker scripts used with command line GCC demos have been updated to\r
+ include an eh_frame section to allow their use with the latest Yagarto\r
+ release. Likewise the demo makefiles have been updated to include\r
+ command line options to reduce or eliminate the eh_frame section all\r
+ together.\r
+ + The definition of portBYTE_ALIGNMENT_MASK has been moved out of the\r
+ various memory allocation files and into the common portable.h header\r
+ file.\r
+ + Removed unnecessary use of portLONG, portSHORT and portCHAR.\r
+ + Added LM3Sxxxx demo for Rowley CrossWorks.\r
+ + Posix simulator has been upgraded - see the corresponding WEB page on the\r
+ FreeRTOS.org site.\r
+\r
+\r
+Changes between V5.4.1 and V5.4.2 released August 9th 2009\r
+\r
+ + Added a new port and demo app for the Altera Nios2 soft core.\r
+ + Added LPC1768 demo for IAR.\r
+ + Added a USB CDC demo to all LPC1768 demos (Code Red, CrossWorks and IAR).\r
+ + Changed clock frequency of LPC1768 demos to 99MHz.\r
+\r
+Changes between V5.4.0 and V5.4.1 released July 25th 2009\r
+\r
+ + New hook function added. vApplicationMallocFailedHook() is (optionally)\r
+ called if pvPortMalloc() returns NULL.\r
+ + Additional casting added to xTaskCheckForTimeOut(). This prevents\r
+ problems that can arise should configUSE_16_BIT_TICKS be set to 1 on a\r
+ 32 bit architecture (which would probably be a mistake, anyway).\r
+ + Corrected the parameter passed to NVIC_SetPriority() to set the MAC\r
+ interrupt priority in both LPC1768 demos.\r
+ + Decreased the default setting of configMINIMAL_STACK_SIZE in the PIC32\r
+ demo application to ensure the heap space was not completely consumed\r
+ before the scheduler was started.\r
+\r
+Changes between V5.3.1 and V5.4.0 released July 13th 2009\r
+\r
+ + Added Virtex5 / PPC440 port and demos.\r
+ + Replaced the LPC1766 Red Suite demo with an LPC1768 Red Suite demo. The\r
+ original demo was configured to use engineering samples of the CPU. The\r
+ new demo has an improved Ethernet driver.\r
+ + Added LPC1768 Rowley demo with zero copy Ethernet driver.\r
+ + Reworked byte alignment code to ensure 8 byte alignment works correctly.\r
+ + Set configUSE_16_BIT_TICKS to 0 in the PPC405 demo projects.\r
+ + Changed the initial stack setup for the PPC405 to ensure the small data\r
+ area pointers are setup correctly.\r
+\r
+Changes between V5.3.0 and V5.3.1 released June 21st 2009\r
+\r
+ + Added ColdFire V1 MCF51CN128 port and WEB server demo.\r
+ + Added STM32 Connectivity Line STM32107 Cortex M3 WEB server demo.\r
+ + Changed the Cortex M3 port.c asm statements to __asm so it can be\r
+ compiled using Rowley CrossWorks V2 in its default configuration.\r
+ + Updated the Posix/Linux simulator contributed port.\r
+\r
+Changes between V5.2.0 and V5.3.0 released June 1st 2009\r
+\r
+ Main changes:\r
+\r
+ + Added new (optional) feature that gathers statistics on the amount of CPU\r
+ time used by each task.\r
+ + Added a new demo application for the Atmel AT91SAM3U Cortex-M3 based\r
+ microcontroller.\r
+ + Added a new demo application for the NXP LPC1766 Cortex-M3 based\r
+ microcontroller.\r
+ + Added a contributed port/demo that allows FreeRTOS to be 'simulated' in a\r
+ Linux environment.\r
+\r
+ Minor changes:\r
+ + Updated the Stellaris uIP WEB server demos to include the new run time\r
+ statistics gathering feature - and include a served WEB page that\r
+ presents the information in a tabular format.\r
+ + Added in the lwIP port layer for the Coldfire MCF52259.\r
+ + Updated the CrossWorks LPC2368 WEB server to include an image in the\r
+ served content.\r
+ + Changed some of the timing in the initialisation of the LPC2368 MAC to\r
+ permit its use on all part revisions.\r
+ + Minor modifications to the core uIP code to remove some compiler warnings.\r
+ + Added xTaskGetApplicationTaskTag() function and updated the OpenWatcom\r
+ demo to make use of the new function.\r
+ + Added contributed demos for AVR32 AP7000, STM32 Primer 2 and STM32 using\r
+ Rowley Crossworks.\r
+ + Heap_1.c and Heap_2.c used to define structures for the purpose of data\r
+ alignment. These have been converted to unions to save a few bytes of\r
+ RAM that would otherwise be wasted.\r
+ + Remove the call to strncpy() used to copy the task name into the TCB when\r
+ the maximum task name is configured to be 1 byte long.\r
+\r
+Changes between V5.1.2 and V5.2.0 released March 14th 2009\r
+\r
+ + Optimised the queue send and receive functions (also used by semaphores).\r
+ + Replaced the standard critical sections used to protect BIOS calls in the\r
+ PC port to instead use scheduler locks. This is because the BIOS calls\r
+ always return with interrupts enabled.\r
+ + Corrected unclosed comments in boot.s.\r
+\r
+Changes between V5.1.1 and V5.1.2 released February 9th 2009\r
+\r
+ + Added NEC V850ES port and demo.\r
+ + Added NEC 78K0R port and demo.\r
+ + Added MCF52259 port and demo.\r
+ + Added the AT91SAM9XE port and demo.\r
+ + Updated the MCF52233 FEC driver to work around a silicon bug that\r
+ prevents the part auto negotiating some network parameters.\r
+ + Minor modifications to the MCF52233 makefile to permit it to be used\r
+ on Linux hosts.\r
+ + Updated the STM32 primer files to allow them to be built with the latest\r
+ version of the RIDE tools.\r
+ + Updated the threads.js Java script used for kernel aware debugging in\r
+ the Rowley CrossWorks IDE.\r
+\r
+\r
+Changes between V5.1.0 and V5.1.1 released November 20, 2008\r
+\r
+ + Added Coldfire MCF52233 WEB server demo using GCC and Eclipse.\r
+ + Added IAR MSP430 port and demo.\r
+ + Corrected several compiler time issues that had crept in as tool versions\r
+ change.\r
+ + Included FreeRTOS-uIP - a faster uIP. This is not yet complete.\r
+\r
+Changes between V5.0.4 and V5.1.0 released October 24, 2008\r
+\r
+ + Added a new port and demo application for the ColdFire V2 core using the\r
+ CodeWarrior development tools.\r
+ + Replaced the ARM7 demo that used the old (and now no longer supported)\r
+ Keil compiler with a new port that uses the new Keil/RVDS combo.\r
+ + Stack overflow checking now works for stacks that grow up from low\r
+ memory (PIC24 and dsPIC).\r
+ + BUG FIX - set the PIC32 definition of portSTACK_GROWTH to the correct\r
+ value of -1.\r
+ + MSP430 port layers have been updated to permit tasks to place the\r
+ microcontroller into power down modes 1 to 3. The demo applications have\r
+ likewise been updated to demonstrate the new feature.\r
+ + Replaced the two separate MSP430/Rowley port layers with a single and more\r
+ flexible version.\r
+ + Added more contributed ports, including ports for NEC and SAM9\r
+ microcontrollers.\r
+ + Changed the linker script used in the LPC2368 Eclipse demo.\r
+\r
+Changes between V5.0.3 and V5.0.4 released September 22, 2008\r
+\r
+ + Completely re-written port for ColdFire GCC.\r
+ + Bug fix: All Cortex M3 ports have a minor change to the code that sets\r
+ the pending interrupt.\r
+ + Some header files require that FreeRTOS.h be included prior to their\r
+ inclusion. #error message have been added to all such header file\r
+ informing users to the cause of the compilation error should the headers\r
+ not be included in the correct order.\r
+\r
+Changes between V5.0.2 and V5.0.3 released July 31, 2008\r
+\r
+ Changes relating to the Cortex M3:\r
+\r
+ + Added configMAX_SYSCALL_INTERRUPT_PRIORITY usage to all the Cortex M3\r
+ ports and demos. See the port documentation pages on the FreeRTOS.org\r
+ WEB site for full usage information.\r
+ + Improved efficiency of Cortex M3 port even further.\r
+ + Ensure the Cortex M3 port works no matter where the vector table is\r
+ located.\r
+ + Added the IntQTimer demo/test tasks to a demo project for each CM3 port\r
+ (Keil, GCC and IAR) to test the new configMAX_SYSCALL_INTERRUPT_PRIORITY\r
+ functionality.\r
+ + Added the mainINCLUDE_WEB_SERVER definition to the LM3SXXXX IAR and Keil\r
+ projects to allow the WEB server to be conditionally excluded from the\r
+ build and therefore allow use of the KickStart (code size limited)\r
+ compiler version.\r
+\r
+ Other changes:\r
+\r
+ + Moved the PIC24 and dsPIC versions of vPortYield() from the C file to\r
+ an assembly file to allow use with all MPLAB compiler versions. This also\r
+ allows the omit-frame-pointer optimisation to be turned off.\r
+\r
+Changes between V5.0.0 and V5.0.2 released May 30, 2008\r
+\r
+ + Updated the PIC32 port to allow queue API calls to be used from\r
+ interrupts above the kernel interrupt priority, and to allow full\r
+ interrupt nesting. Task stack usages has also been reduced.\r
+ + Added a new PowerPC port that demonstrates how the trace macros can be\r
+ used to allow the use of a floating point co-processor. The\r
+ traceTASK_SWITCHED_OUT() and traceTASK_SWITCHED_INT() macros are used to\r
+ save and restore the floating point context respectively for those tasks\r
+ that actually use floating point operations.\r
+ + BUG FIX: The first PPC405 port contained a bug in that it did not leave\r
+ adequate space above the stack for the backchain to be saved when a task\r
+ started to execute for the first time.\r
+ + Updated queue.c to add in the means to allow interrupt nesting and for\r
+ queue API functions to be called from interrupts that have a priority\r
+ above the kernel priority. This is only supported on PIC32 ports thus\r
+ far.\r
+ + Fixed the compiler warnings that were generated when the latest version\r
+ of WinAVR was used.\r
+ + Remove all inline usage of 'inline' from the core kernel code.\r
+ + Added the queue registry feature. The queue registry is provided as a\r
+ means for kernel aware debuggers to locate queue definitions. It has no\r
+ purpose unless you are using a kernel aware debugger. The queue registry\r
+ will only be used when configQUEUE_REGISTRY_SIZE is greater than zero.\r
+ + Added the ST Cortex-M3 drivers into the Demo/Common/Drivers directory to\r
+ prevent them from having to be included in multiple demos.\r
+ + Added a Keil STM32 demo application.\r
+ + Changed the blocktim.c test files as it is no longer legitimate for all\r
+ ports to call queue API functions from within a critical section.\r
+ + Added the IntQueue.c test file to test the calling of queue API functions\r
+ from different interrupt priority levels, and test interrupt nesting.\r
+\r
+Changes between V5.0.0 and V5.0.1\r
+\r
+ + V5.0.1 was a customer specific release.\r
+\r
+Changes between V4.8.0 and V5.0.0 released April 15, 2008\r
+\r
+ *** VERY IMPORTANT INFORMATION ON UPGRADING TO FREERTOS.ORG V5.0.0 ***\r
+\r
+ The parameters to the functions xQueueSendFromISR(), xQueueSendToFrontFromISR(),\r
+ xQueueSendToBackFromISR() and xSemaphoreGiveFromISR() have changed. You must\r
+ update all calls to these functions to use the new calling convention! Your\r
+ compiler might not issue any type mismatch warnings!\r
+\r
+\r
+ See http://www.FreeRTOS.org/upgrading.html for full information.\r
+\r
+\r
+ Other changes:\r
+\r
+ + Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3\r
+ microcontrollers.\r
+ + New task hook feature added.\r
+ + PowerPC demo updated to use version 10.1 of the Xilinx EDK.\r
+ + Efficiency gains within the PIC32 port layer.\r
+\r
+Changes between V4.7.2 and V4.8.0 released March 26 2008\r
+\r
+ + Added a Virtex4 PowerPC 405 port and demo application.\r
+ + Added optional stack overflow checking and new\r
+ uxTaskGetStackHighWaterMark() function.\r
+ + Added new xQueueIsQueueEmptyFromISR(), xQueueIsQueueFullFromISR() and\r
+ uxQueueMessagesWaitingFromISR() API functions.\r
+ + Efficiency improvements to the Cortex-M3 port layer. NOTE: This\r
+ requires that an SVC handler be installed in the application.\r
+ + Efficiency improvements to the queue send and receive functions.\r
+ + Added new trace macros. These are application definable to provide\r
+ a flexible trace facility.\r
+ + Implemented the configKERNEL_INTERRUPT_PRIORITY within the Keil Cortex\r
+ M3 port layer (bringing it up to the same standard as the IAR and GCC\r
+ versions).\r
+ + Ports that used the arm-stellaris-eabi-gcc tools have been converted to\r
+ use the arm-non-eabi-gcc tools.\r
+\r
+Changes between V4.7.1 and V4.7.2 released February 21, 2008\r
+\r
+ + Added Fujitsu MB91460 port and demo.\r
+ + Added Fujitsu MB96340 port and demo.\r
+ + Tidied up the capitalisation of include files to facilitate builds on\r
+ Linux hosts.\r
+ + Removed some redundant casting that was generating warnings - but was\r
+ included to remove warnings on other compilers.\r
+\r
+Changes between V4.7.0 and V4.7.1 released February 3, 2008\r
+\r
+ + Updated all IAR ARM projects to use V5.11 of the IAR Embedded Workbench\r
+ for ARM.\r
+ + Introduced recursive semaphore feature.\r
+ + Updated LPC2368 demos to take into account silicon bugs in old chip\r
+ revisions.\r
+ + Updated STR9 uIP port to manually set the net mask and gateway addresses.\r
+ + Updating demos to allow more to run with the co-operative scheduler.\r
+ + Fixed co-operative scheduler behaviour upon the occurrence of a tick\r
+ interrupt while the scheduler was suspended.\r
+ + Updated documentation contained within semphr.h.\r
+ + ARM7 GCC ports no longer use the IRQ attribute.\r
+\r
+Changes between V4.6.1 and V4.7.0 released December 6, 2007\r
+\r
+ + Introduced the counting semaphore macros and demo source files. The\r
+ Open Watcom PC project has been updated to include the new demo. See\r
+ the online documentation for more information.\r
+ + Introduced the 'alternative' queue handling API and demo source files.\r
+ The Open Watcom PC project has been updated to include the new demo\r
+ source files. See the online documentation for more information.\r
+ + Added AT91SAM7X Eclipse demo project.\r
+ + Added the STM32 primer demo project for the GCC compiler and Ride IDE.\r
+ + Removed the .lock files that were mistakenly included in the V4.6.1\r
+ eclipse workspaces.\r
+\r
+Changes between V4.6.0 and V4.6.1 released November 5 2007\r
+\r
+ + Added support for the MIPS M4K based PIC32.\r
+ + Added 'extern "C"' to all the header files to facilitate use with C++.\r
+\r
+Changes between V4.5.0 and V4.6.0 released October 28 2007\r
+\r
+ + Changed the method used to force a context switch within an ISR for the\r
+ ARM7/9 GCC ports only. The portENTER_SWITCHING_ISR() and\r
+ portEXIT_SWITCHING_ISR() macros are no longer supported. This is to\r
+ ensure correct behaviour no matter which GCC version is used, with or\r
+ without the -fomit-frame-pointer option, and at all optimisation levels.\r
+ + Corrected the prototype for xQueueGenericSend() within queue.h.\r
+\r
+Changes between V4.4.0 and V4.5.0 released September 17 2007\r
+\r
+ + Added the xQueueSendToFront(), xQueueSendToBack() and xQueuePeek()\r
+ functionality. These should now be used in preference to the old\r
+ xQueueSend() function - which is maintained for backward compatibility.\r
+ + Added Mutex functionality. The behaviour of mutexes is subtly different\r
+ to the already existing binary semaphores as mutexes automatically\r
+ include a priority inheritance mechanism.\r
+ + Added the GenQTest.c and QPeek.c to test and demonstrate the behaviour\r
+ of the new functionality.\r
+ + Updated the LM3Sxxxx and PC ports to include the new GenQTest.c and\r
+ QPeek.c files.\r
+ + Updated the GCC port for the Cortex M3 to include the\r
+ configKERNEL_INTERRUPT_PRIORITY functionality. This was previously only\r
+ included in the IAR port.\r
+ + Optimised the GCC and IAR port layer code - specifically the context\r
+ switch code.\r
+ + Consolidated the LM3Sxxxx EK demos for all development tools into a\r
+ single project that automatically detects which version of the EK the\r
+ application is executing on.\r
+ + Added Eclipse support for LM3Sxxxx evaluation kits.\r
+ + Added Eclipse support for the Keil LPC2368 evaluation kit.\r
+ + Added the Demo/Drivers directory to hold code that is common to multiple\r
+ demo application projects.\r
+ + Included some minor bug fixes in the uIP 1.0 code.\r
+ + Added an lwIP demo for the STR9 - thanks ST for assistance.\r
+ + Updated the AVR32 port to ensure correct behaviour with full compiler\r
+ optimisation.\r
+ + Included binaries for OpenOCD FTDI and parallel port interfaces.\r
+\r
+Changes between V4.4.0 and V4.3.1 released July 31, 2007\r
+\r
+ + Added AVR32 UC3B demo application.\r
+ + Updated AVR32 UC3A port and demo applications.\r
+ + Added IAR lwIP demo for AVR32 UC3A.\r
+ + Updated listGET_OWNER_OF_NEXT_ENTRY() to assist compiler optimisation\r
+ (thanks Niu Yong for making the suggestion).\r
+ + Added xTaskGetSchedulerState() API function.\r
+ + BUG FIX: Corrected behaviour when tasks that are blocked indefinitely\r
+ have their block time adjusted (within xQueueSend() and xQueueReceive()),\r
+ and are the subject of a call the vTaskResume() when they are not\r
+ actually in the Suspended state (thanks Dan Searles for reporting the\r
+ issues).\r
+\r
+\r
+Changes between V4.3.0 and V4.3.1 released June 11, 2007\r
+\r
+ + Added STMicroelectronics STM32 Cortex-M3 demo application.\r
+ + Updated ustdlib.c for the GCC LM3S6965 demo.\r
+\r
+Changes between V4.2.1 and V4.3.0 released June 5, 2007\r
+\r
+ + Introduced configKERNEL_INTERRUPT_PRIORITY to the IAR Cortex-M3, PIC24\r
+ and dsPIC ports. See the LM3S6965 and PIC24 demo application\r
+ documentation pages for more information.\r
+ + Updated the PIC24 and dsPIC demos to build with V3.0 of the PIC30 GCC\r
+ tools, and changed the demo applications.\r
+ + Added demos for the new Ethernet and CAN enabled Luminary Micro Stellaris\r
+ microcontrollers.\r
+ + Corrected bug in uIP the demos that prevented frames of approximately 1480\r
+ bytes and over from being transmitted.\r
+ + Included the LPC2368/uIP/Rowley demo into the main FreeRTOS.org\r
+ download.\r
+ + Update to WizC PIC18 port to permit its use with version 14 of the\r
+ compiler. Thanks Marcel!\r
+\r
+Changes between V4.2.1 and V4.2.0 released April 2, 2007\r
+\r
+ + Added AVR32 AT32UC3A ports for GCC and IAR.\r
+ + Added -fomit-frame-pointer option to lwIP SAM7X demo makefile.\r
+ + Moved location of call to LCD_Init() in STR9 demo to ensure it is only\r
+ called after the scheduler has been started.\r
+\r
+Changes between V4.1.3 and V4.2.0 released February 8, 2007\r
+\r
+ + Changes to both task.c and queue.c as a result of testing performed on\r
+ the SafeRTOS code base.\r
+ + Added Cortex-M3 LM3S811 demos for GCC and IAR tools.\r
+\r
+Changes between V4.1.2 and V4.1.3 released November 19, 2006\r
+\r
+ + Added STR750 ARM7 port using the Raisonance RIDE/GCC tools.\r
+ + Added -fomit-frame-pointer option to Rowley ARM7 demos as work around\r
+ to GCC bug at some optimisation levels.\r
+ + Altered the way the heap is defined in the LM3S811 Keil demo to prevent\r
+ the RAM usage from counting toward the code size limit calculation.\r
+ + CO-ROUTINE BUG FIX: Removed the call to prvIsQueueEmpty from within\r
+ xQueueCRReceive as it exited with interrupts enabled. Thanks Paul Katz.\r
+ + Tasks that block on events with a timeout of portMAX_DELAY are now\r
+ blocked indefinitely if configINCLUDE_vTaskSuspend is defined.\r
+ Previously portMAX_DELAY was just the longest block time possible. This\r
+ is still the case if configINCLUDE_vTaskSuspend is not defined.\r
+ + Minor changes to some demo application files.\r
+\r
+Changes between V4.1.1 and V4.1.2 released October 21, 2006\r
+\r
+ + Added 16bit PIC ports and demos.\r
+ + Added STR750 port and demo.\r
+\r
+\r
+Changes between V4.1.0 and V4.1.1 released September 24, 2006\r
+\r
+ + Added the Luminary Micro Stellaris LM3S811 demo application.\r
+\r
+Changes between V4.0.5 and V4.1.0 released August 28, 2006\r
+\r
+ + Prior to V4.1.0, under certain documented circumstances, it was possible\r
+ for xQueueSend() and xQueueReceive() to return without having completed\r
+ and without their block time expiring. The block time effectively\r
+ stated a maximum block time, and the return value of the function needed\r
+ to be checked to determine the reason for returning. This is no longer\r
+ the case as the functions will only return once the block time has\r
+ expired or they are able to complete their operation. It is therefore no\r
+ longer necessary to wrap calls within loops.\r
+ + Changed the critical section handling in the IAR AVR port to correct the\r
+ behaviour when used with later compiler versions.\r
+ + Added the LPC2138 CrossWorks demo into the zip file. Previously this was\r
+ only available as a separate download.\r
+ + Modified the AVR demo applications to demonstrate the use of co-routines.\r
+\r
+Changes between V4.0.4 and V4.0.5 released August 13, 2006\r
+\r
+ + Introduced API function xTaskResumeFromISR(). Same functionality as\r
+ xTaskResume(), but can be called from within an interrupt service routine.\r
+ + Optimised vListInsert() in the case when the wake time is the maximum\r
+ tick count value.\r
+ + Bug fix: The 'value' of the event list item is updated when the priority\r
+ of a task is changed. Previously only the priority of the TCB itself was\r
+ changed.\r
+ + vTaskPrioritySet() and vTaskResume() no longer use the event list item.\r
+ This has not been necessary since V4.0.1 when the xMissedYield handling\r
+ was added.\r
+ + Lowered the PCLK setting on the ARM9 STR9 demo from 96MHz to 48MHz.\r
+ + When ending the scheduler - do not try to attempt a context switch when\r
+ deleting the current task.\r
+ + SAM7X EMAC drivers: Corrected the Rx frame length mask when obtaining\r
+ the length from the rx descriptor.\r
+\r
+\r
+Changes between V4.0.3 and V4.0.4 released June 22, 2006\r
+\r
+ + Added a port and demo application for the STR9 ARM9 based processors from\r
+ ST.\r
+ + Slight optimisation to the vTaskPrioritySet() function.\r
+ + Included the latest uIP version (1.0) in the demo/common/ethernet\r
+ directory.\r
+\r
+Changes between V4.0.2 and V4.0.3 released June 7, 2006\r
+\r
+ + Added a port and demo application for the Cortex-M3 target using the IAR\r
+ development tools.\r
+ + The ARM Cortex-m3 Rowley projects have been updated to use V1.6 of the\r
+ CrossStudio tools.\r
+ + The heap size defined for the lwIP Rowley demo has been reduced so that\r
+ the project will link correctly when using the command line GCC tools\r
+ also. The makefile has also been modified to allow debugging.\r
+ + The lwIP Rowley demo not includes a 'kernel aware' debug window.\r
+ + The uIP Rowley project has been updated to build with V1.6 of CrossWorks.\r
+ + The second set of tasks in the blockQ demo were created the wrong way\r
+ around (inconsistent to the description in the file). This has been\r
+ corrected.\r
+\r
+Changes between V4.0.1 and V4.0.2 released May 28, 2006\r
+\r
+ + Port and demo application added for the Tern Ethernet Engine controller.\r
+ + Port and demo application added for MC9S12 using GCC, thanks to\r
+ Jefferson "imajeff" Smith.\r
+ + The function vTaskList() now suspends the scheduler rather than disabling\r
+ interrupts during the creation of the task list.\r
+ + Allow a task to delete itself by passing in its own handle. Previously\r
+ this could only be done by passing in NULL.\r
+ + Corrected the value passed to the WDG_PeriodValueConfig() library\r
+ function in the STR71x demo.\r
+ + The tick hook function is now called only within a tick isr. Previously\r
+ it was also called when the tick function was called during the scheduler\r
+ unlocking process.\r
+ + The EMAC driver in the SAM7X lwIP demo has been made more robust as per\r
+ the thread: http://sourceforge.net/forum/message.php?msg_id=3714405\r
+ + In the PC ports: Add function prvSetTickFrequencyDefault() to set the\r
+ DOS tick back to its proper value when the scheduler exits. Thanks\r
+ Raynald!\r
+ + In the Borland x86 ports there was a mistake in the portFIRST_CONTEXT\r
+ macro where the BP register was not popped from the stack correctly. The\r
+ BP value would never get used so this did not cause a problem, but it has\r
+ been corrected all the same.\r
+\r
+\r
+Changes between V4.0.0 and V4.0.1 released April 7 2006\r
+\r
+ + Improved the ARM CORTEX M3 ports so they now only have to service\r
+ pendSV interrupts.\r
+ + Added a Luminary Micro port and demo for use with Rowley CrossWorks.\r
+ + Added the xMissedYield handling to tasks.c.\r
+\r
+Changes between V3.2.4 and V4.0.0\r
+\r
+ Major changes:\r
+\r
+ + Added new RTOS port for Luminary Micros ARM CORTEX M3 microcontrollers.\r
+ + Added new co-routine functionality.\r
+\r
+ Other kernel changes:\r
+\r
+ + An optional tick hook call is now included in the tick function.\r
+ + Introduced the xMiniListItem structure and removed the list pxHead\r
+ member in order to reduce RAM usage.\r
+ + Added the following definitions to the FreeRTOSConfig.h file included\r
+ with every port:\r
+ configUSE_TICK_HOOK\r
+ configUSE_CO_ROUTINES\r
+ configMAX_CO_ROUTINE_PRIORITIES\r
+ + The volatile qualification has been changed on the list members to allow\r
+ the task.c code to be tidied up a bit.\r
+ + The scheduler can now be started even if no tasks have been created!\r
+ This is to allow co-routines to run when there are no tasks.\r
+ + A task being woken by an event will now preempt the currently running task\r
+ even if its priority is only equal to the currently running task.\r
+\r
+ Port and demo application changes:\r
+\r
+ + Updated the WinAVR demo to compile with the latest version of WinAVR\r
+ with no warnings generated.\r
+ + Changed the WinAVR makefile to make chars signed - needed for the\r
+ co-routine code if BaseType_t is set to char.\r
+ + Added new demo application file crflash.c. This demonstrates co-routine\r
+ functionality including passing data between co-routines.\r
+ + Added new demo application file crhook.c. This demonstrates co-routine\r
+ and tick hook functionality including passing data between and ISR and\r
+ a co-routine.\r
+ + Some NOP's were missing following stmdb{}^ instructions in various ARM7\r
+ ports. These have been added.\r
+ + Updated the Open Watcom PC demo project to include the crflash and crhook\r
+ demo co-routines as an example of their use.\r
+ + Updated the H8S demo to compile with the latest version of GCC.\r
+ + Updated the SAM7X EMAC drivers to take into account the hardware errata\r
+ regarding lost packets.\r
+ + Changed the default MAC address used by some WEB server demos as the\r
+ original addresses used was not liked by some routers.\r
+ + Modified the SAM7X/IAR startup code slightly to prevent it hanging on\r
+ some systems when the code is executed using a j-link debugger. The\r
+ j-link macro file configures the PLL before the code executes so\r
+ attempting to configure it again in the startup code was causing a\r
+ problem for some user. Now a check is performed first to see if the\r
+ PLL is already set up.\r
+ + GCC port now contain all assembler code in a single asm block rather than\r
+ individual blocks as before.\r
+ + GCC LPC2000 code now explicitly uses R0 rather than letting the assembler\r
+ choose the register to use as a temporary register during the context\r
+ switch.\r
+ + Added portNOP() macro.\r
+ + The compare match load value on LPC2000 ports now has 1 added to correct\r
+ the value used.\r
+ + The minimal stack depth has been increased slightly on the WIZC PIC18\r
+ port.\r
+\r
+Changes between V3.2.3 and V3.2.4\r
+\r
+ + Modified the GCC ARM7 port layer to allow use with GCC V4.0.0 and above.\r
+ Many thanks to Glen Biagioni for the provided update.\r
+ + Added a new Microblaze port and demo application.\r
+ + Modified the SAM7X EMAC demo to default to use the MII interface rather\r
+ than the RMII interface.\r
+ + Modified the startup sequence of the SAM7X demo slightly to allow the\r
+ EMAC longer to auto negotiate.\r
+\r
+Changes between V3.2.2 and V3.2.3\r
+\r
+ + Added MII interface support to the SAM7X EMAC peripheral driver.\r
+ Previously versions worked with the RMII interface only.\r
+ + Added command line GCC support to the SAM7X lwIP demo. Previously the\r
+ project could only be built using the CrossWorks IDE. Modifications to\r
+ this end include the addition of a standard makefile and linker script to\r
+ the download, and some adjustments to the stacks allocated to each task.\r
+ + Changed the page returned by the lwIP WEB server demo to display the\r
+ task status table rather than the TCP/IP statistics.\r
+ + Corrected the capitalisation of some header file includes and makefile\r
+ dependencies to facilitate use on Linux host computers.\r
+ + The various LPC2000 ports had a mistake in the timer setup where the\r
+ prescale value was written to T0_PC instead of T0_PR. This would have\r
+ no effect unless a prescale value was actually required. This has been\r
+ corrected.\r
+\r
+Changes between V3.2.1 and V3.2.2 - Released 23 September, 2005\r
+\r
+ + Added an IAR port for the Philips LPC2129\r
+ + The Atmel ARM7 IAR demo project files are now saved in the IAR Embedded\r
+ Workbench V4.30a format.\r
+ + Updated the J-Link macro file included with the SAM7X uIP demo project\r
+ to allow the demo board to be reset over the J-Link.\r
+\r
+Changes between V3.2.0 and V3.2.1 - Released 1 September, 2005\r
+\r
+ + Added lwIP demo for AT91SAM7X using Rowley tools.\r
+ + Added uIP demo for AT91SAM7X using IAR tools.\r
+ + Added function xTaskGetCurrentTaskHandle().\r
+ + Renamed events.h to mevents.h to prevent it conflicting with the events.h\r
+ generated automatically by the HCS12 processor expert utility. events.h\r
+ is only used by the PC demo application.\r
+ + Both PIC18 ports now initialise the TBLPTRU to 0 as this is the value\r
+ expected by the compiler, and the compilers do not write to this\r
+ register.\r
+ + The HCS12 banked model demo now creates the 'suicide' tasks immediately\r
+ prior to starting the scheduler. These tasks should be the last tasks to\r
+ get started in order for the test to function correctly.\r
+\r
+Changes between V3.1.1 and V3.2.0 - Released 29 June, 2005\r
+\r
+ V3.2.0 introduces two new MSP430 ports and corrects a minor kernel\r
+ issues. Thanks to Ares.qi for his input.\r
+\r
+ + Added two MSP430 ports that use the Rowley CrossWorks development tools.\r
+ One port just mirrors the existing GCC port. The other port was provided\r
+ by Milos Prokic. Thanks!\r
+ + V3.2.0 corrects the behavior when vTaskPrioritySet() or vTaskResume()\r
+ are called while the scheduler is locked (by a call to\r
+ vTaskSuspendAll()). When this is done the subject task now starts to\r
+ execute immediately when the scheduler is unlocked if it has the highest\r
+ priority that is ready to run. Previously there was a possibility that\r
+ the task would not run until the next RTOS tick or call to portYIELD().\r
+ + Another similar small correction ensures that in the case where more than\r
+ one task is blocked on a semaphore or queue, the task with the highest\r
+ priority is guaranteed to be unblocked first.\r
+ + Added a couple of more test tasks to the PC demo which cover the points\r
+ above.\r
+\r
+Changes between V3.1.0 and V3.1.1 - Released 21st June, 2005\r
+\r
+ This release updates the HCS12 port. The common kernel code\r
+ remains unchanged.\r
+\r
+ + Updated the HCS12 port to support banking and introduced a demo\r
+ application for the MC9S12DP256. The new demo application is\r
+ located in the Demo/HCS12_CodeWarrior_banked directory.\r
+ + The name of the directory containing the MC9S12F32 demo application\r
+ has been changed to Demo/HCS12_CodeWarrior_small (as in 'small'\r
+ memory model).\r
+ + MC9S12F32 demo updated slightly to use the PLL. The CPU speed for the\r
+ demo application is now 24MHz. Previously it was 8MHz.\r
+ + The demo application file Demo/Common/Minimal/death.c has a slight\r
+ alteration to prevent it using floating point variables.\r
+\r
+\r
+Changes between V3.0.0 and V3.1.0 - Released 11th June, 2005\r
+\r
+ + Added new ports for ST Microsystems STR71x, and Freescale HCS12\r
+ microcontrollers. Currently the HCS12 port is limited to the small\r
+ memory model. Large memory models will be supported in the next\r
+ release.\r
+ + PIC18 wizC port updated. Thanks to Marcel van Lieshout for his\r
+ continuing contribution.\r
+ + The accuracy of the AVR port timer setup has been improved. Thanks to\r
+ Thomas Krutmann for this contribution.\r
+ + Added a new conditional compilation macro configIDLE_SHOULD_YIELD.\r
+ See the WEB documentation for details.\r
+ + Updated the CrossWorks uIP demo to build with V1.4 of CrossWorks.\r
+ + Slight modification to the SAM7 release build configuration to correct\r
+ an include path definition.\r
+ + Updated the MPLAB PIC18 documentation to provide extra details on linker\r
+ file configuration.\r
+\r
+Changes between V3.0.0 and V2.6.1 - Released 23rd April, 2005\r
+\r
+ V3.0.0 includes many enhancements, so this history list is broken into\r
+ subsections as follows:\r
+\r
+ API changes\r
+ New ports\r
+ Directory name changes\r
+ Kernel and miscellaneous changes changes\r
+\r
+ - API changes\r
+\r
+ + Each port now defines BaseType_t as the data type that is most\r
+ efficient for that architecture. The type BaseType_t is used\r
+ extensively in API calls necessitating the following changes to the\r
+ FreeRTOS API function prototypes.\r
+\r
+ See the "New for V3.0.0" section of the FreeRTOS online\r
+ documentation for full details of API changes.\r
+\r
+ - New ports\r
+\r
+ + The AT91FR40008 ARM7 port contributed by John Feller is now included\r
+ in the download (thanks John!).\r
+ + The PIC18 port for the wizC/fedC compiler contributed by Marcel van\r
+ Lieshout is now included in the download (thanks Marcel!).\r
+ + The IAR port for the AVR microcontroller has been upgraded to V3.0.0\r
+ and is now a supported port.\r
+\r
+ - Directory name changes\r
+\r
+ For consistency, and to allow integration of the new ports, the\r
+ following directory names have been changed.\r
+\r
+ + The source/portable/GCC/ARM7 directory has been renamed\r
+ source/portable/GCC/ARM7_LPC2000 so it is compatible with the naming\r
+ of other GCC ARM7 ports.\r
+ + The Demo/PIC directory has been renamed Demo/PIC18_MPLAB to\r
+ accommodate the wizC/fedC PIC port.\r
+ + The demo applications for the two AVR ports no longer share the same\r
+ directory. The WinAVR demo is in the Demo/AVR_ATMega323_WinAVR\r
+ directory and the IAR port in the Demo/AVR_ATMega323_IAR directory.\r
+\r
+\r
+ - Kernel and miscellaneous changes changes\r
+\r
+ See the "New for V3.0.0" section of the FreeRTOS online\r
+ documentation for more information.\r
+\r
+ + Previously 'portmacro.h' contained some user editable definitions\r
+ relating to the user application, and some fixed definitions relating\r
+ specifically to the port being used. The application specific\r
+ definitions have been removed from 'portmacro.h' and placed inside a\r
+ new header file called 'FreeRTOSConfig.h'. 'portmacro.h' should now\r
+ never be modified by the user. A 'FreeRTOSConfig.h' is now included\r
+ in each of FreeRTOS/Demo subdirectories - as it's settings relate to\r
+ the demo application rather than being specific to the port.\r
+ + Introduced configUSE_IDLE_HOOK in idle task.\r
+ + The idle task will yield when another idle priority task is ready to\r
+ run. Previously the idle task would run to the end of its time slice\r
+ regardless.\r
+ + The idle task is now created when the scheduler is started. This\r
+ requires less stack than the previous scheme where it was created upon\r
+ creation of the first application task.\r
+ + The function usPortCheckFreeStackSpace() has been renamed\r
+ usTaskCheckFreeStackSpace() and moved from the portable layer to\r
+ tasks.c.\r
+ + Corrected spelling of portMINMAL_STACK_SIZE to portMINIMAL_STACK_SIZE.\r
+ + The portheap.c file included with the AVR port has been deleted. The\r
+ AVR demo now uses the standard heap1 sample memory allocator.\r
+ + The GCC AVR port is now build using the standard make utility. The\r
+ batch files used previously have been deleted. This means a recent\r
+ version of WinAVR is required in order to create a binary suitable for\r
+ source level debugging.\r
+ + vTaskStartScheduler() no longer takes the configUSE_PREEMPTION\r
+ constant as a parameter. Instead the constant is used directly within\r
+ tasks.c and no parameter is required.\r
+ + The header file 'FreeRTOS.h' has been created and is used to include\r
+ 'projdefs.h', 'FreeRTOSConfig.h' and 'portable.h' in the necessary\r
+ order. FreeRTOS.h can now be included in place of these other\r
+ headers.\r
+ + The header file 'errors.h' has been deleted. The definitions it\r
+ contained are now located within 'projdefs.h'.\r
+ + pvPortMalloc() now takes a size_t parameter as per the ANSI malloc().\r
+ Previously an unsigned short was used.\r
+ + When resuming the scheduler a yield is performed if either a tick has\r
+ been missed, or a task is moved from the pending ready list into a\r
+ ready list. Previously a yield was not performed on this second\r
+ condition.\r
+ + In heap1.c an overflow check has been added to ensure the next free\r
+ byte variable does not wrap around.\r
+ + Introduced the portTASK_FUNCTION() and portTASK_FUNCTION_PROTO()\r
+ macros.\r
+ + The MPLAB PIC port now saved the TABLAT register in interrupt service\r
+ routines.\r
+\r
+Changes between V2.6.0 and V2.6.1 - Released Feb 22, 2005\r
+\r
+ This version adds support for the H8 processor.\r
+\r
+ Other changes:\r
+\r
+ + tskMAX_TASK_NAME_LEN removed from the task.h header and added to each\r
+ individual portmacro.h file as portMAX_TASK_NAME_LEN. This allows RAM\r
+ limited ports to allocate fewer characters to the task name.\r
+ + AVR port - Replaced the inb() and outb() functions with direct memory\r
+ access. This allows the port to be built with the 20050414 build of\r
+ WinAVR.\r
+ + GCC LPC2106 port - removed the 'static' from the definition of\r
+ vNonPreemptiveTick() to allow the demo to link when using the cooperative\r
+ scheduler.\r
+ + GCC LPC2106 port - Corrected the optimisation options in the batch files\r
+ ROM_THUMB.bat, RAM_THUMB.bat, ROM_ARM.bat and RAM_ARM.bat. The lower case\r
+ -o is replaced by an uppercase -O.\r
+ + Tasks.c - The strcpy call has been removed when copying across the task\r
+ name into the TCB.\r
+ + Updated the trace visualisation to always be 4 byte aligned so it can be\r
+ used on ARM architectures.\r
+ + There are now two tracecon executables (that convert the trace file binary\r
+ into an ASCII file). One for big endian targets and one for little endian\r
+ targets.\r
+ + Added ucTasksDeleted variable to prevent vTaskSuspendAll() being called\r
+ too often in the idle task.\r
+ + SAM7 USB driver - Replaced the duplicated RX_DATA_BK0 in the interrupt\r
+ mask with the RX_DATA_BK1.\r
+\r
+\r
+Changes between V2.5.5 and V2.6.0 - Released January 16, 2005\r
+\r
+ + Added the API function vTaskDelayUntil(). The demo app file\r
+ Demo/Common/Minimal/flash.c has been updated to demonstrate its use.\r
+ + Added INCLUDE_vTaskDelay conditional compilation.\r
+ + Changed the name of the Demo/ARM7_AtmelSAM7S64_IAR directory to\r
+ Demo/ARM7_AT91SAM7S64_IAR for consistency.\r
+ + Modified the AT91SAM7S USB driver to allow descriptors that have\r
+ a length that is an exact multiple of the FIFO to be transmitted.\r
+\r
+Changes between V2.5.4 and V2.5.5 - Released January 3, 2005\r
+\r
+ This version adds support for the Atmel SAM7 ARM7 microcontrollers\r
+ along with the IAR development tools.\r
+\r
+ Other changes:\r
+\r
+ + Renamed the Demo/ARM7 directory to Demo/ARM7_LPC2106_GCC.\r
+ + Renamed the Demo/ARM7_Keil directory to Demo/ARM7_LPC2129_Keil.\r
+ + Modified the Philips ARM7 serial interrupt service routines to only\r
+ process one interrupt per call. This seems to enable the ISR to\r
+ operate more quickly.\r
+ + Removed the 'far' keyword from the Open Watcom portable layer source\r
+ files. This allows their use with V1.3 of Open Watcom.\r
+ + Minor modifications to the SDCC build files to allow their use under\r
+ Linux. Thanks to Frieder Ferlemann for this contribution.\r
+ + Small change to sTaskCreate() to allow a context switch even when\r
+ pxCreatedTask is NULL. Thanks to Kamil for this contribution.\r
+ + inline keyword removed from vTaskSwitchContext() and VTaskIncrementTick()\r
+ definitions.\r
+\r
+Changes between V2.5.3 and V2.5.4 - Released Dec 1, 2004\r
+\r
+ This is an important maintenance release.\r
+\r
+ The function cTaskResumeAll() has been modified so it can be used safely\r
+ prior to the kernel being initialised. This was an issue as\r
+ cTaskResumeAll() is called from pvPortMalloc(). Thanks to Daniel Braun\r
+ for highlighting this issue.\r
+\r
+Changes between V2.5.2 and V2.5.3 - Released Nov 2, 2004\r
+\r
+ The critical section handling functions have been changed for the GCC ARM7\r
+ port. Some optimisation levels use the stack differently to others. This\r
+ means the interrupt flags cannot always be stored on the stack and are\r
+ instead now stored in a variable, which is then saved as part of the\r
+ tasks context. This allows the GCC ARM7 port to be used at all\r
+ optimisation levels - including -Os.\r
+\r
+ Other minor changes:\r
+\r
+ + MSP430 definition of usCriticalNesting now uses the volatile qualifier.\r
+ This is probably not required but added just in case.\r
+\r
+Changes between V2.5.1 and V2.5.2 - Released Oct 26, 2004\r
+\r
+ + Added the Keil ARM7 port.\r
+ + Slight modification to comtest.c to make the delay periods more random.\r
+ This creates a better test condition.\r
+\r
+Changes between V2.5.0 and V2.5.1 - Released Oct 9, 2004\r
+\r
+ + Added the MSP430 port.\r
+ + Extra comments added to the GCC ARM7 port.c and portISR.c files.\r
+ + The memory pool allocated within heap_1.c has been placed within a\r
+ structure to ensure correct memory alignment on 32bit systems.\r
+ + Within the GCC ARM7 serial drivers an extra check is made to ensure\r
+ the post to the queue was successful if then attempting immediately\r
+ retrieve the posted character.\r
+ + Changed the name of the constant portTICKS_PER_MS to portTICK_PERIOD_MS\r
+ as the old name was misleading.\r
+\r
+\r
+Changes between V2.4.2 and V2.5.0 - Released Aug 12, 2004\r
+\r
+ The RTOS source code download now includes three separate memory allocation\r
+ schemes - so you can choose the most appropriate for your application.\r
+ These are found in the Source/Portable/MemMang directory. The demo\r
+ application projects have also been updated to demonstrate the new schemes.\r
+ See the "Memory Management" page of the API documentation for more details.\r
+\r
+ + Added heap_1.c, heap_2.c and heap_3.c in the Source/Portable/MemMang\r
+ directory.\r
+ + Replaced the portheap.c files for each demo application with one of the\r
+ new memory allocation files.\r
+ + Updated the portmacro.h file for each demo application to include the\r
+ constants required for the new memory allocators: portTOTAL_HEAP_SIZE and\r
+ portBYTE_ALIGNMENT.\r
+ + Added a new test to the ARM7 demo application that tests the operation\r
+ of the heap_2 memory allocator.\r
+\r
+\r
+Changes between V2.4.1 and V2.4.2 - Released July 14, 2004\r
+\r
+ + The ARM7 port now supports THUMB mode.\r
+ + Modification to the ARM7 demo application serial port driver.\r
+\r
+Changes between V2.4.0 and V2.4.1 - Released July 2, 2004\r
+\r
+ + Rationalised the ARM7 port version of portEXIT_CRITICAL() -\r
+ improvements provided by Bill Knight.\r
+ + Made demo serial driver more complete and robust.\r
+\r
+\r
+Changes between V2.4.0 and V2.3.1 - Released June 30, 2004\r
+\r
+ + Added the first ARM7 port - thanks to Bill Knight for the assistance\r
+ provided.\r
+ + Added extra files to the Demo/Common/Minimal directory. These are\r
+ equivalent to their Demo/Common/Full counterparts but with the\r
+ calls to the functions defined in print.c removed.\r
+ + Added TABLAT to the list of registers saved as part of a PIC18 context.\r
+\r
+Changes between V2.3.0 and V2.3.1 - Released June 25, 2004\r
+\r
+ + Changed the way the vector table is defined to be more portable.\r
+ + Corrected the definitions of SPH and SPL in portmacro.s90.\r
+ The previous definitions prevented V2.3.0 operating if the iom323.h\r
+ header file was included in portmacro.s90.\r
+\r
+Changes between V2.2.0 and V2.3.0 - Released June 19, 2004\r
+\r
+ + Added an AVR port that uses the IAR compiler.\r
+ + Explicit use of 'signed' qualifier on plain char types.\r
+ + Modified the Open Watcom project files to use 'signed' as the\r
+ default char type.\r
+ + Changed odd calculation of initial pxTopOfStack value when\r
+ portSTACK_GROWTH < 0.\r
+ + Added inline qualifier to context switch functions within task.c.\r
+ Ports that do not support the (non ANSI) inline keyword have the\r
+ inline #define'd away in their respective portmacro.h files.\r
+\r
+Changes between V2.1.1 and V2.2.0 - Released May 18, 2004\r
+\r
+ + Added Cygnal 8051 port.\r
+ + PCLATU and PCLATH are now saved as part of the PIC18 context. This\r
+ allows function pointers to be used within tasks. Thanks to Javier\r
+ Espeche for the enhancement.\r
+ + Minor changes to demo application files to reduce stack usage.\r
+ + Minor changes to prevent compiler warnings when compiling the new port.\r
+\r
+Changes between V2.1.0 and V2.1.1 - Released March 12, 2004\r
+\r
+ + Bug fix - pxCurrentTCB is now initialised before the call to\r
+ prvInitialiseTaskLists(). Previously pxCurrentTCB could be accessed\r
+ while null during the initialisation sequence. Thanks to Giuseppe\r
+ Franco for the correction.\r
+\r
+Changes between V2.0.0 and V2.1.0 - Released Feb 29, 2004\r
+\r
+ V2.1.0 has significant reworks that greatly reduce the amount of time\r
+ the kernel has interrupts disabled. The first section of modifications\r
+ listed here must be taken into account by users. The second section\r
+ are related to the kernel implementation and as such are transparent.\r
+\r
+ Section1 :\r
+\r
+ + The typedef TickType_t has been introduced. All delay times should\r
+ now use a variable of type TickType_t in place of the unsigned long's\r
+ used previously. API function prototypes have been updated\r
+ appropriately.\r
+ + The configuration macro USE_16_BIT_TICKS has been introduced. If set\r
+ to 1 TickType_t is defined as an unsigned short. If set to 0\r
+ TickType_t is defined as an unsigned long. See the configuration\r
+ section of the API documentation for more details.\r
+ + The configuration macro INCLUDE_vTaskSuspendAll is now obsolete.\r
+ + vTaskResumeAll() has been renamed cTaskResumeAll() as it now returns a\r
+ value (see the API documentation).\r
+ + ulTaskGetTickCount() has been renamed xTaskGetTickCount() as the type\r
+ it returns now depends on the USE_16_BIT_TICKS definition.\r
+ + cQueueReceive() must now >never< be used from within an ISR. Use the new\r
+ cQueueReceiveFromISR() function instead.\r
+\r
+ Section 2:\r
+\r
+ + A mechanism has been introduced that allows a queue to be accessed by\r
+ a task and ISR simultaneously.\r
+ + A "pending ready" queue has been introduced that enables interrupts to\r
+ be processed when the scheduler is suspended.\r
+ + The list implementation has been improved to provide faster item\r
+ removal.\r
+ + The scheduler now makes use of the scheduler suspend mechanism in places\r
+ where previously interrupts were disabled.\r
+\r
+Changes between V1.2.6 and V2.0.0 - Released Jan 31, 2004\r
+\r
+ + Introduced new API functions:\r
+ vTaskPriorityGet ()\r
+ vTaskPrioritySet ()\r
+ vTaskSuspend ()\r
+ vTaskResume ()\r
+ vTaskSuspendAll ()\r
+ vTaskResumeAll ()\r
+ + Added conditional compilation options that allow the components of the\r
+ kernel that are unused by an application to be excluded from the build.\r
+ See the Configuration section on the WEB site for more information (on\r
+ the API pages). The macros have been added to each portmacro.h file (\r
+ sometimes called prtmacro.h).\r
+ + Rearranged tasks.c.\r
+ + Added demo application file dynamic.c.\r
+ + Updated the PC demo application to make use of dynamic.c.\r
+ + Updated the documentation contained in the kernel header files.\r
+ + Creating a task now causes a context switch if the task being created\r
+ has a higher priority than the calling task - assuming the kernel is\r
+ running.\r
+ + vTaskDelete() now only causes a context switch if the calling task is\r
+ the task being deleted.\r
+\r
+Changes between V1.2.5 and V1.2.6 - Released December 31, 2003\r
+\r
+ Barring the change to the interrupt vector (PIC port) these are minor\r
+ enhancements.\r
+\r
+ + The interrupt vector used for the PIC master ISR has been changed from\r
+ 0x18 to 0x08 - where it should have always been. The incorrect address\r
+ still works but probably executes a number of NOP's before getting to the\r
+ ISR.\r
+ + Changed the baud rate used by the AVR demo application to 38400. This\r
+ has an error percentage of less than one percent with an 8MHz clock.\r
+ + Raised the priority of the Rx task in demo\full\comtest.c. This only\r
+ affects the Flashlite and PC ports. This was done to prevent the Rx\r
+ buffer becoming full.\r
+ + Reverted the Flashlite COM port driver back so it does not use the DMA.\r
+ The DMA appears to miss characters under stress. The Borland Flashlite\r
+ port was also calculating a register value incorrectly resulting in the\r
+ wrong DMA source address being used. The same code worked fine when\r
+ compiling with Open Watcom. Other minor enhancements were made to the\r
+ interrupt handling.\r
+ + Modified the PIC serial Rx ISR to check for and clear overrun errors.\r
+ Overrun errors seem to prevent any further characters being received.\r
+ + The PIC demo projects now have some optimisation switched on.\r
+\r
+\r
+Changes between V1.2.4 and V1.2.5\r
+\r
+ Small fix made to the PIC specific port.c file described below.\r
+\r
+ + Introduced portGLOBAL_INTERRUPT_FLAG definition to test the global\r
+ interrupt flag setting. Using the two bits defined within\r
+ portINITAL_INTERRUPT_STATE was causing the w register to get clobbered\r
+ before the test was performed.\r
+\r
+Changes between V1.2.3 and V1.2.4\r
+\r
+ V1.2.4 contains a release version of the PIC18 port.\r
+ An optional exception has been included with the GPL. See the licensing\r
+ section of www.FreeRTOS.org for details.\r
+\r
+ + The function xPortInitMinimal() has been renamed to\r
+ xSerialPortInitMinimal() and the function xPortInit() has been renamed\r
+ to xSerialPortInit().\r
+ + The function sSerialPutChar() has been renamed cSerialPutChar() and\r
+ the function return type chaned to portCHAR.\r
+ + The integer and flop tasks now include calls to tskYIELD(), allowing\r
+ them to be used with the cooperative scheduler.\r
+ + All the demo applications now use the integer and comtest tasks when the\r
+ cooperative scheduler is being used. Previously they were only used with\r
+ the preemptive scheduler.\r
+ + Minor changes made to operation of minimal versions of comtest.c and\r
+ integer.c.\r
+ + The ATMega port definition of portCPU_CLOSK_HZ definition changed to\r
+ 8MHz base 10, previously it base 16.\r
+\r
+\r
+\r
+Changes between V1.2.2a and V1.2.3\r
+\r
+ The only change of any significance is to the license, which has changed\r
+ from the Open Software License to the GNU GPL.\r
+\r
+ The zip file also contains a pre-release version of the PIC18 port. This\r
+ has not yet completed testing and as such does not constitute part of the\r
+ V1.2.3 release. It is still however covered by the GNU GPL.\r
+\r
+ There are minor source code changes to accommodate the PIC C compiler.\r
+ These mainly involve more explicit casting.\r
+\r
+ + sTaskCreate() has been modified slightly to make use of the\r
+ portSTACK_GROWTH macro. This is required for the PIC port where the\r
+ stack grows in the opposite direction to the other existing ports.\r
+ + prvCheckTasksWaitingTermination() has been modified slightly to bring\r
+ the decrementing of usCurrentNumberOfTasks within the critical section,\r
+ where it should have been since the creation of an eight bit port.\r
+\r
+Changes between V1.2.2 and V1.2.2a\r
+\r
+ The makefile and buildcoff.bat files included with the AVR demo application\r
+ have been modified for use with the September 2003 build of WinAVR. No\r
+ source files have changed.\r
+\r
+Changes between V1.2.1 and V1.2.2\r
+\r
+ There are only minor changes here to allow the PC and Flashlite 186 ports\r
+ to use the Borland V4.52 compiler, as supplied with the Flashlite 186\r
+ development kit.\r
+\r
+ + Introduced a BCC directory under source\portable. This contains all the\r
+ files specific to the Borland compiler port.\r
+ + Corrected the macro naming of portMS_PER_TICK to portTICKS_PER_MS.\r
+ + Modified comtest.c to increase the rate at which the string is\r
+ transmitted and received on the serial port. The Flashlite 186 demo\r
+ app baud rate has also been increased.\r
+ + The values of the constants used in both integer.c files have been\r
+ increased to force the Borland compiler to use 32 bit values. The\r
+ Borland optimiser placed the previous values in 16 bit registers, and in\r
+ So doing invalidated the test.\r
+\r
+Changes between V1.2.0 and V1.2.1\r
+\r
+ This version includes some minor changes to the list implementation aimed\r
+ at improving the context switch time - with is now approximately 10% faster.\r
+ Changes include the removal of some null pointer assignment checks. These\r
+ were redundant where the scheduler uses the list functions, but means any\r
+ user application choosing to use the same list functions must now check\r
+ that no NULL pointers are passed as a parameter.\r
+\r
+ The Flashlite 186 serial port driver has also been modified to use a DMA\r
+ channel for transmissions. The serial driver is fully functional but still\r
+ under development. Flashlite users may prefer to use V1.2.0 for now.\r
+\r
+ Details:\r
+\r
+ + Changed the baud rate for the ATMega323 serial test from 19200 to 57600.\r
+ + Use vSerialPutString() instead of single character puts in\r
+ Demo\Full\Comtest.c. This allows the use of the flashlite DMA serial\r
+ driver. Also the check variable only stops incrementing after two\r
+ consecutive failures.\r
+ + semtest.c creates four tasks, two of which operate at the idle priority.\r
+ The tasks that operate at the idle priority now use a lower expected\r
+ count than those running at a higher priority. This prevents the low\r
+ priority tasks from signalling an error because they have not been\r
+ scheduled enough time for each of them to count the shared variable to\r
+ the higher original value.\r
+ + The flashlite 186 serial driver now uses a DMA channel for transmissions.\r
+ + Removed the volatile modifier from the list function parameters. This was\r
+ only ever included to prevent compiler warnings. Now warnings are\r
+ removed by casting parameters where the calls are made.\r
+ + prvListGetOwnerOfNextEntry() and prvListGetOwnerOfHeadEntry() have been\r
+ removed from list.c and added as macros in list.h.\r
+ + usNumberOfItems has been added to the list structure. This removes the\r
+ need for a pointer comparison when checking if a list is empty, and so\r
+ is slightly faster.\r
+ + Removed the NULL check in vListRemove(). This makes the call faster but\r
+ necessitates any application code utilising the list implementation to\r
+ ensure NULL pointers are not passed.\r
+ + Renamed portTICKS_PER_MS definition to portMS_PER_TICK (milli seconds\r
+ per tick). This is what it always should have been.\r
+\r
+Changes between V1.01 and V1.2.0\r
+\r
+ The majority of these changes were made to accommodate the 8bit AVR port.\r
+ The scheduler workings have not changed, but some of the data types used\r
+ have been made more friendly to an eight bit environment.\r
+\r
+ Details:\r
+\r
+ + Changed the version numbering format.\r
+ + Added AVR port.\r
+ + Split the directory demo\common into demo\common\minimal and\r
+ demo\common\full. The files in the full directory are for systems with\r
+ a display (currently PC and Flashlite 186 demo's). The files in the\r
+ minimal directory are for systems with limited RAM and no display\r
+ (currently MegaAVR).\r
+ + Minor changes to demo application function prototypes to make more use\r
+ of 8bit data types.\r
+ + Within the scheduler itself the following functions have slightly\r
+ modified declarations to make use of 8bit data types where possible:\r
+ xQueueCreate(),\r
+ sQueueReceive(),\r
+ sQUeueReceive(),\r
+ usQueueMessageWaiting(),\r
+ sQueueSendFromISR(),\r
+ sSemaphoreTake(),\r
+ sSemaphoreGive(),\r
+ sSemaphoreGiveFromISR(),\r
+ sTaskCreate(),\r
+ sTaskMoveFromEventList().\r
+\r
+ Where the return type has changed the function name has also changed in\r
+ accordance with the naming convention. For example\r
+ usQueueMessageWaiting() has become ucQueueMessageWaiting().\r
+ + The definition tskMAX_PRIORITIES has been moved from task.h to\r
+ portmacro.h and renamed portMAX_PRIORITIES. This allows different\r
+ ports to allocate a different maximum number of priorities.\r
+ + By default the trace facility is off, previously USE_TRACE_FACILITY\r
+ was defined.\r
+ + comtest.c now uses a psuedo random delay between sends. This allows for\r
+ better testing as the interrupts do not arrive at regular intervals.\r
+ + Minor change to the Flashlite serial port driver. The driver is written\r
+ to demonstrate the scheduler and is not written to be efficient.\r
+\r
+\r
+\r
+Changes between V1.00 and V1.01\r
+\r
+ These changes improve the ports. The scheduler itself has not changed.\r
+\r
+ Improved context switch mechanism used when performing a context\r
+ switch from an ISR (both the tick ISR and the serial comms ISR's within\r
+ the demo application). The new mechanism is faster and uses less stack.\r
+\r
+ The assembler file portasm.asm has been replaced by a header file\r
+ portasm.h. This includes a few assembler macro definitions.\r
+\r
+ All saving and restoring of registers onto/off of the stack is now handled\r
+ by the compiler. This means the initial stack setup for a task has to\r
+ mimic the stack used by the compiler, which is different for debug and\r
+ release builds.\r
+\r
+ Slightly changed the operation of the demo application, details below.\r
+\r
+ Details:\r
+\r
+ + portSWITCH_CONTEXT() replaced by vPortFirstContext().\r
+ + pxPortInitialiseStack() modified to replicate the stack used by the\r
+ compiler.\r
+ + portasm.asm file removed.\r
+ + portasm.h introduced. This contains macro definitions for\r
+ portSWITCH_CONTEXT() and portFIRST_CONTEXT().\r
+ + Context switch from ISR now uses the compiler generated interrupt\r
+ mechanism. This is done simply by calling portSWITCH_CONTEXT and leaving\r
+ the save/restore to compiler generated code.\r
+ + Calls to taskYIELD() during ISR's have been replaced by calling the\r
+ simpler and faster portSWITCH_CONTEXT().\r
+ + The Flashlite 186 port now uses 186 instruction set (used to use 80x86\r
+ instructions only).\r
+ + The blocking queue tasks within the demo application did not operate\r
+ quite as described. This has been corrected.\r
+ + The priority of the comtest Rx task within the demo application has been\r
+ lowered. Received characters are now processed (read from the queue) at\r
+ the idle priority, allowing low priority tasks to run evenly at times of\r
+ a high communications overhead.\r
+ + Prevent the call to kbhit() in main.c for debug builds as the debugger\r
+ seems to have problems stepping over the call. This if for the PC port\r
+ only.\r
+\r
+\r
+\r
projects / freertos / blobdiff