/*\r
- FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd.\r
-\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
- * *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
- * *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
- mission critical applications that require provable dependability.\r
-*/\r
+ * FreeRTOS Kernel V10.2.0\r
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
/* FreeRTOS includes. */\r
#include "FreeRTOS.h"\r
/*-----------------------------------------------------------*/\r
\r
/* Count of the critical section nesting depth. */\r
-unsigned portLONG ulCriticalNesting = 9999;\r
+uint32_t ulCriticalNesting = 9999;\r
\r
/*-----------------------------------------------------------*/\r
\r
/* Registers required to configure the RTI. */\r
-#define portRTI_GCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC00 ) )\r
-#define portRTI_TBCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC04 ) )\r
-#define portRTI_COMPCTRL_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC0C ) )\r
-#define portRTI_CNT0_FRC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC10 ) )\r
-#define portRTI_CNT0_UC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC14 ) )\r
-#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC18 ) )\r
-#define portRTI_CNT0_COMP0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC50 ) )\r
-#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC54 ) )\r
-#define portRTI_SETINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC80 ) )\r
-#define portRTI_CLEARINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC84 ) )\r
-#define portRTI_INTFLAG_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC88 ) )\r
+#define portRTI_GCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )\r
+#define portRTI_TBCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )\r
+#define portRTI_COMPCTRL_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )\r
+#define portRTI_CNT0_FRC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )\r
+#define portRTI_CNT0_UC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )\r
+#define portRTI_CNT0_CPUC0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )\r
+#define portRTI_CNT0_COMP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )\r
+#define portRTI_CNT0_UDCP0_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )\r
+#define portRTI_SETINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )\r
+#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )\r
+#define portRTI_INTFLAG_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )\r
\r
\r
/* Constants required to set up the initial stack of each task. */\r
-#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1F )\r
-#define portINITIAL_FPSCR ( ( portSTACK_TYPE ) 0x00 )\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 0x04 )\r
-#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 )\r
+#define portINITIAL_SPSR ( ( StackType_t ) 0x1F )\r
+#define portINITIAL_FPSCR ( ( StackType_t ) 0x00 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 0x04 )\r
+#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 )\r
\r
/* The number of words on the stack frame between the saved Top Of Stack and\r
R0 (in which the parameters are passed. */\r
\r
/* Saved as part of the task context. Set to pdFALSE if the task does not\r
require an FPU context. */\r
-unsigned long ulTaskHasFPUContext = 0;\r
+uint32_t ulTaskHasFPUContext = 0;\r
\r
/*-----------------------------------------------------------*/\r
\r
/*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which is the start of the as\r
the task has not executed yet. The offset is added to make the return\r
address appear as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;\r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;\r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0x00000000; /* R14 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
\r
#ifdef portPRELOAD_TASK_REGISTERS\r
{\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--;\r
}\r
#else\r
#endif\r
\r
/* Function parameters are passed in R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* Set the status register for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );\r
+ *pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );\r
\r
- if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )\r
+ if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )\r
{\r
/* The task will start in thumb mode. */\r
*pxTopOfStack |= portTHUMB_MODE_BIT;\r
/*\r
* See header file for description.\r
*/\r
-portBASE_TYPE xPortStartScheduler(void)\r
+BaseType_t xPortStartScheduler(void)\r
{\r
/* Start the timer that generates the tick ISR. */\r
prvSetupTimerInterrupt();\r
*/\r
void vPortEndScheduler(void)\r
{\r
- /* It is unlikely that the port will require this function as there\r
- is nothing to return to. */\r
+ /* Not implemented in ports where there is nothing to return to.\r
+ Artificially force an assert. */\r
+ configASSERT( ulCriticalNesting == 1000UL );\r
}\r
/*-----------------------------------------------------------*/\r
\r
__interrupt void vPortNonPreemptiveTick( void )\r
{\r
/* clear clock interrupt flag */\r
- RTI->INTFLAG = 0x00000001;\r
+ portRTI_INTFLAG_REG = 0x00000001;\r
\r
/* Increment the tick count - this may make a delaying task ready\r
to run - but a context switch is not performed. */\r
- vTaskIncrementTick();\r
+ xTaskIncrementTick();\r
}\r
\r
#else\r
projects / freertos / blobdiff