Replace standard types with stdint.h types.

[freertos] / FreeRTOS / Source / portable / CCS / ARM_Cortex-R4 / port.c

diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
index 7fd41deed322caf14ff6d348c4e44b34f59ee6aa..93481c32ae067b517cc9bfbd33b9bc25fe6244df 100644 (file)
--- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
+++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/port.c
@@ -70,29 +70,29 @@
 /*-----------------------------------------------------------*/\r
 \r
 /* Count of the critical section nesting depth. */\r
-unsigned portLONG ulCriticalNesting = 9999;\r
+uint32_t ulCriticalNesting = 9999;\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 /* Registers required to configure the RTI. */\r
-#define portRTI_GCTRL_REG              ( * ( ( volatile unsigned long * ) 0xFFFFFC00 ) )\r
-#define portRTI_TBCTRL_REG     ( * ( ( volatile unsigned long * ) 0xFFFFFC04 ) )\r
-#define portRTI_COMPCTRL_REG   ( * ( ( volatile unsigned long * ) 0xFFFFFC0C ) )\r
-#define portRTI_CNT0_FRC0_REG          ( * ( ( volatile unsigned long * ) 0xFFFFFC10 ) )\r
-#define portRTI_CNT0_UC0_REG   ( * ( ( volatile unsigned long * ) 0xFFFFFC14 ) )\r
-#define portRTI_CNT0_CPUC0_REG  ( * ( ( volatile unsigned long * ) 0xFFFFFC18 ) )\r
-#define portRTI_CNT0_COMP0_REG  ( * ( ( volatile unsigned long * ) 0xFFFFFC50 ) )\r
-#define portRTI_CNT0_UDCP0_REG  ( * ( ( volatile unsigned long * ) 0xFFFFFC54 ) )\r
-#define portRTI_SETINTENA_REG          ( * ( ( volatile unsigned long * ) 0xFFFFFC80 ) )\r
-#define portRTI_CLEARINTENA_REG ( * ( ( volatile unsigned long * ) 0xFFFFFC84 ) )\r
-#define portRTI_INTFLAG_REG    ( * ( ( volatile unsigned long * ) 0xFFFFFC88 ) )\r
+#define portRTI_GCTRL_REG              ( * ( ( volatile uint32_t * ) 0xFFFFFC00 ) )\r
+#define portRTI_TBCTRL_REG     ( * ( ( volatile uint32_t * ) 0xFFFFFC04 ) )\r
+#define portRTI_COMPCTRL_REG   ( * ( ( volatile uint32_t * ) 0xFFFFFC0C ) )\r
+#define portRTI_CNT0_FRC0_REG          ( * ( ( volatile uint32_t * ) 0xFFFFFC10 ) )\r
+#define portRTI_CNT0_UC0_REG   ( * ( ( volatile uint32_t * ) 0xFFFFFC14 ) )\r
+#define portRTI_CNT0_CPUC0_REG  ( * ( ( volatile uint32_t * ) 0xFFFFFC18 ) )\r
+#define portRTI_CNT0_COMP0_REG  ( * ( ( volatile uint32_t * ) 0xFFFFFC50 ) )\r
+#define portRTI_CNT0_UDCP0_REG  ( * ( ( volatile uint32_t * ) 0xFFFFFC54 ) )\r
+#define portRTI_SETINTENA_REG          ( * ( ( volatile uint32_t * ) 0xFFFFFC80 ) )\r
+#define portRTI_CLEARINTENA_REG ( * ( ( volatile uint32_t * ) 0xFFFFFC84 ) )\r
+#define portRTI_INTFLAG_REG    ( * ( ( volatile uint32_t * ) 0xFFFFFC88 ) )\r
 \r
 \r
 /* Constants required to set up the initial stack of each task. */\r
-#define portINITIAL_SPSR               ( ( portSTACK_TYPE ) 0x1F )\r
-#define portINITIAL_FPSCR              ( ( portSTACK_TYPE ) 0x00 )\r
-#define portINSTRUCTION_SIZE           ( ( portSTACK_TYPE ) 0x04 )\r
-#define portTHUMB_MODE_BIT             ( ( portSTACK_TYPE ) 0x20 )\r
+#define portINITIAL_SPSR               ( ( StackType_t ) 0x1F )\r
+#define portINITIAL_FPSCR              ( ( StackType_t ) 0x00 )\r
+#define portINSTRUCTION_SIZE           ( ( StackType_t ) 0x04 )\r
+#define portTHUMB_MODE_BIT             ( ( StackType_t ) 0x20 )\r
 \r
 /* The number of words on the stack frame between the saved Top Of Stack and\r
 R0 (in which the parameters are passed. */\r
@@ -107,7 +107,7 @@ extern void vPortStartFirstTask( void );
 \r
 /* Saved as part of the task context.  Set to pdFALSE if the task does not\r
 require an FPU context. */\r
-unsigned long ulTaskHasFPUContext = 0;\r
+uint32_t ulTaskHasFPUContext = 0;\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
@@ -115,9 +115,9 @@ unsigned long ulTaskHasFPUContext = 0;
 /*\r
  * See header file for description.\r
  */\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
 {\r
-portSTACK_TYPE *pxOriginalTOS;\r
+StackType_t *pxOriginalTOS;\r
 \r
        pxOriginalTOS = pxTopOfStack;\r
 \r
@@ -134,39 +134,39 @@ portSTACK_TYPE *pxOriginalTOS;
        /* First on the stack is the return address - which is the start of the as\r
        the task has not executed yet.  The offset is added to make the return\r
        address appear as it would within an IRQ ISR. */\r
-       *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE;\r
+       *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE;\r
        pxTopOfStack--;\r
 \r
-       *pxTopOfStack = ( portSTACK_TYPE ) 0x00000000;  /* R14 */\r
+       *pxTopOfStack = ( StackType_t ) 0x00000000;     /* R14 */\r
        pxTopOfStack--;\r
-       *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+       *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
        pxTopOfStack--;\r
 \r
        #ifdef portPRELOAD_TASK_REGISTERS\r
        {\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212;  /* R12 */\r
+               *pxTopOfStack = ( StackType_t ) 0x12121212;     /* R12 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111;  /* R11 */\r
+               *pxTopOfStack = ( StackType_t ) 0x11111111;     /* R11 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010;  /* R10 */\r
+               *pxTopOfStack = ( StackType_t ) 0x10101010;     /* R10 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909;  /* R9 */\r
+               *pxTopOfStack = ( StackType_t ) 0x09090909;     /* R9 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808;  /* R8 */\r
+               *pxTopOfStack = ( StackType_t ) 0x08080808;     /* R8 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707;  /* R7 */\r
+               *pxTopOfStack = ( StackType_t ) 0x07070707;     /* R7 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606;  /* R6 */\r
+               *pxTopOfStack = ( StackType_t ) 0x06060606;     /* R6 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505;  /* R5 */\r
+               *pxTopOfStack = ( StackType_t ) 0x05050505;     /* R5 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404;  /* R4 */\r
+               *pxTopOfStack = ( StackType_t ) 0x04040404;     /* R4 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303;  /* R3 */\r
+               *pxTopOfStack = ( StackType_t ) 0x03030303;     /* R3 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202;  /* R2 */\r
+               *pxTopOfStack = ( StackType_t ) 0x02020202;     /* R2 */\r
                pxTopOfStack--;\r
-               *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101;  /* R1 */\r
+               *pxTopOfStack = ( StackType_t ) 0x01010101;     /* R1 */\r
                pxTopOfStack--;\r
        }\r
        #else\r
@@ -176,13 +176,13 @@ portSTACK_TYPE *pxOriginalTOS;
        #endif\r
 \r
        /* Function parameters are passed in R0. */\r
-       *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+       *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
        pxTopOfStack--;\r
 \r
        /* Set the status register for system mode, with interrupts enabled. */\r
-       *pxTopOfStack = ( portSTACK_TYPE ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );\r
+       *pxTopOfStack = ( StackType_t ) ( ( _get_CPSR() & ~0xFF ) | portINITIAL_SPSR );\r
 \r
-       if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00 )\r
+       if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00 )\r
        {\r
                /* The task will start in thumb mode. */\r
                *pxTopOfStack |= portTHUMB_MODE_BIT;\r
@@ -236,7 +236,7 @@ static void prvSetupTimerInterrupt(void)
 /*\r
  * See header file for description.\r
  */\r
-portBASE_TYPE xPortStartScheduler(void)\r
+BaseType_t xPortStartScheduler(void)\r
 {\r
        /* Start the timer that generates the tick ISR. */\r
        prvSetupTimerInterrupt();\r