/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.0.0 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
\r
* *\r
***************************************************************************\r
\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
\r
#define PORTMACRO_H\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portCHAR\r
+#define portSTACK_TYPE uint8_t\r
#define portBASE_TYPE char\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef signed char BaseType_t;\r
+typedef unsigned char UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 1\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portYIELD() __asm( "swi" );\r
#define portNOP() __asm( "nop" );\r
/*-----------------------------------------------------------*/\r
\r
/* Critical section handling. */\r
-#define portENABLE_INTERRUPTS() __asm( "cli" ) \r
+#define portENABLE_INTERRUPTS() __asm( "cli" )\r
#define portDISABLE_INTERRUPTS() __asm( "sei" )\r
\r
/*\r
*/\r
#define portENTER_CRITICAL() \\r
{ \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
portDISABLE_INTERRUPTS(); \\r
uxCriticalNesting++; \\r
\r
/*\r
* Interrupts are disabled so we can access the nesting count directly. If the\r
- * nesting is found to be 0 (no nesting) then we are leaving the critical \r
+ * nesting is found to be 0 (no nesting) then we are leaving the critical\r
* section and interrupts can be re-enabled.\r
*/\r
#define portEXIT_CRITICAL() \\r
{ \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
uxCriticalNesting--; \\r
if( uxCriticalNesting == 0 ) \\r
\r
/* Task utilities. */\r
\r
-/* \r
- * These macros are very simple as the processor automatically saves and \r
+/*\r
+ * These macros are very simple as the processor automatically saves and\r
* restores its registers as interrupts are entered and exited. In\r
- * addition to the (automatically stacked) registers we also stack the \r
+ * addition to the (automatically stacked) registers we also stack the\r
* critical nesting count. Each task maintains its own critical nesting\r
* count as it is legitimate for a task to yield from within a critical\r
* section. If the banked memory model is being used then the PPAGE\r
*/\r
\r
#ifdef BANKED_MODEL\r
- /* \r
+ /*\r
* Load the stack pointer for the task, then pull the critical nesting\r
- * count and PPAGE register from the stack. The remains of the \r
+ * count and PPAGE register from the stack. The remains of the\r
* context are restored by the RTI instruction.\r
*/\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldx pxCurrentTCB" ); \\r
__asm( "lds 0, x" ); \\r
__asm( "staa 0x30" ); /* 0x30 = PPAGE */ \\r
}\r
\r
- /* \r
+ /*\r
* By the time this macro is called the processor has already stacked the\r
- * registers. Simply stack the nesting count and PPAGE value, then save \r
+ * registers. Simply stack the nesting count and PPAGE value, then save\r
* the task stack pointer.\r
*/\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldaa 0x30" ); /* 0x30 = PPAGE */ \\r
__asm( "psha" ); \\r
}\r
#else\r
\r
- /* \r
+ /*\r
* These macros are as per the BANKED versions above, but without saving\r
* and restoring the PPAGE register.\r
*/\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldx pxCurrentTCB" ); \\r
__asm( "lds 0, x" ); \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * pxCurrentTCB; \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
\\r
__asm( "ldaa uxCriticalNesting" ); \\r
__asm( "psha" ); \\r