]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/GCC/ARM7_LPC2000/portmacro.h
Update version number to 8.1.1 for patch release that re-enables mutexes to be given...
[freertos] / FreeRTOS / Source / portable / GCC / ARM7_LPC2000 / portmacro.h
index 62a2b9335722a71bbe7a248eb865bf37e3d5f84b..5f27cd42ac88e25809a56c0303a82bb827fdf9c2 100644 (file)
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+    FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -71,7 +71,7 @@ extern "C" {
 #endif\r
 \r
 /*-----------------------------------------------------------\r
- * Port specific definitions.  \r
+ * Port specific definitions.\r
  *\r
  * The settings in this file configure FreeRTOS correctly for the\r
  * given hardware and compiler.\r
@@ -86,24 +86,28 @@ extern "C" {
 #define portDOUBLE             double\r
 #define portLONG               long\r
 #define portSHORT              short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
 #define portBASE_TYPE  portLONG\r
 \r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
 #if( configUSE_16_BIT_TICKS == 1 )\r
-       typedef unsigned portSHORT portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffff\r
+       typedef uint16_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffff\r
 #else\r
-       typedef unsigned portLONG portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffffffffUL\r
+       typedef uint32_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 #endif\r
-/*-----------------------------------------------------------*/        \r
+/*-----------------------------------------------------------*/\r
 \r
 /* Architecture specifics. */\r
 #define portSTACK_GROWTH                       ( -1 )\r
-#define portTICK_RATE_MS                       ( ( portTickType ) 1000 / configTICK_RATE_HZ )          \r
+#define portTICK_PERIOD_MS                     ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
 #define portBYTE_ALIGNMENT                     8\r
 #define portNOP()                                      __asm volatile ( "NOP" );\r
-/*-----------------------------------------------------------*/        \r
+/*-----------------------------------------------------------*/\r
 \r
 \r
 /* Scheduler utilities. */\r
@@ -118,7 +122,7 @@ extern "C" {
 #define portRESTORE_CONTEXT()                                                                                  \\r
 {                                                                                                                                              \\r
 extern volatile void * volatile pxCurrentTCB;                                                  \\r
-extern volatile unsigned portLONG ulCriticalNesting;                                   \\r
+extern volatile uint32_t ulCriticalNesting;                                    \\r
                                                                                                                                                \\r
        /* Set the LR to the task stack. */                                                                     \\r
        __asm volatile (                                                                                                        \\r
@@ -155,7 +159,7 @@ extern volatile unsigned portLONG ulCriticalNesting;                                        \
 #define portSAVE_CONTEXT()                                                                                             \\r
 {                                                                                                                                              \\r
 extern volatile void * volatile pxCurrentTCB;                                                  \\r
-extern volatile unsigned portLONG ulCriticalNesting;                                   \\r
+extern volatile uint32_t ulCriticalNesting;                                    \\r
                                                                                                                                                \\r
        /* Push R0 as we are going to use the register. */                                      \\r
        __asm volatile (                                                                                                        \\r
@@ -208,8 +212,8 @@ extern void vTaskSwitchContext( void );
 \r
 /*\r
  * The interrupt management utilities can only be called from ARM mode.  When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode.  When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode.  When THUMB_INTERWORK is not\r
  * defined then the utilities are defined as macros here - as per other ports.\r
  */\r
 \r
@@ -220,7 +224,7 @@ extern void vTaskSwitchContext( void );
 \r
        #define portDISABLE_INTERRUPTS()        vPortDisableInterruptsFromThumb()\r
        #define portENABLE_INTERRUPTS()         vPortEnableInterruptsFromThumb()\r
-       \r
+\r
 #else\r
 \r
        #define portDISABLE_INTERRUPTS()                                                                                        \\r
@@ -230,7 +234,7 @@ extern void vTaskSwitchContext( void );
                        "ORR    R0, R0, #0xC0   \n\t"   /* Disable IRQ, FIQ.                    */      \\r
                        "MSR    CPSR, R0                \n\t"   /* Write back modified value.   */      \\r
                        "LDMIA  SP!, {R0}                       " )     /* Pop R0.                                              */\r
-                       \r
+\r
        #define portENABLE_INTERRUPTS()                                                                                         \\r
                __asm volatile (                                                                                                                \\r
                        "STMDB  SP!, {R0}               \n\t"   /* Push R0.                                             */      \\r