/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.1.1 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
\r
* *\r
***************************************************************************\r
\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
/*\r
Changes from V3.2.3\r
- \r
+\r
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1.\r
\r
Changes from V3.2.4\r
\r
- + Removed the use of the %0 parameter within the assembler macros and \r
+ + Removed the use of the %0 parameter within the assembler macros and\r
replaced them with hard coded registers. This will ensure the\r
assembler does not select the link register as the temp register as\r
was occasionally happening previously.\r
Changes from V4.5.0\r
\r
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros\r
- and replaced them with portYIELD_FROM_ISR() macro. Application code \r
+ and replaced them with portYIELD_FROM_ISR() macro. Application code\r
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT()\r
macros as per the V4.5.1 demo code.\r
*/\r
#endif\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned portLONG\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE portLONG\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) \r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 8\r
#define portNOP() __asm volatile ( "NOP" );\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
\r
/* Scheduler utilities. */\r
#define portRESTORE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Set the LR to the task stack. */ \\r
__asm volatile ( \\r
#define portSAVE_CONTEXT() \\r
{ \\r
extern volatile void * volatile pxCurrentTCB; \\r
-extern volatile unsigned portLONG ulCriticalNesting; \\r
+extern volatile uint32_t ulCriticalNesting; \\r
\\r
/* Push R0 as we are going to use the register. */ \\r
__asm volatile ( \\r
\r
/*\r
* The interrupt management utilities can only be called from ARM mode. When\r
- * THUMB_INTERWORK is defined the utilities are defined as functions in \r
- * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not \r
+ * THUMB_INTERWORK is defined the utilities are defined as functions in\r
+ * portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not\r
* defined then the utilities are defined as macros here - as per other ports.\r
*/\r
\r
\r
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()\r
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()\r
- \r
+\r
#else\r
\r
#define portDISABLE_INTERRUPTS() \\r
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \\r
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \\r
"LDMIA SP!, {R0} " ) /* Pop R0. */\r
- \r
+\r
#define portENABLE_INTERRUPTS() \\r
__asm volatile ( \\r
"STMDB SP!, {R0} \n\t" /* Push R0. */ \\r
projects / freertos / blobdiff