/*\r
- FreeRTOS V9.0.0rc2 - Copyright (C) 2016 Real Time Engineers Ltd.\r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.\r
-\r
- ***************************************************************************\r
- >>! NOTE: The modification to the GPL is included to allow you to !<<\r
- >>! distribute a combined work that includes FreeRTOS without being !<<\r
- >>! obliged to provide the source code for proprietary components !<<\r
- >>! outside of the FreeRTOS kernel. !<<\r
- ***************************************************************************\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available on the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that is more than just the market leader, it *\r
- * is the industry's de facto standard. *\r
- * *\r
- * Help yourself get started quickly while simultaneously helping *\r
- * to support the FreeRTOS project by purchasing a FreeRTOS *\r
- * tutorial book, reference manual, or both: *\r
- * http://www.FreeRTOS.org/Documentation *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading\r
- the FAQ page "My application does not run, what could be wrong?". Have you\r
- defined configASSERT()?\r
-\r
- http://www.FreeRTOS.org/support - In return for receiving this top quality\r
- embedded software for free we request you assist our global community by\r
- participating in the support forum.\r
-\r
- http://www.FreeRTOS.org/training - Investing in training allows your team to\r
- be as productive as possible as early as possible. Now you can receive\r
- FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers\r
- Ltd, and the world's leading authority on the world's leading RTOS.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.\r
- Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High\r
- Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and commercial middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.2.1\r
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
\r
#ifndef PORTMACRO_H\r
#define portUSING_MPU_WRAPPERS 1\r
#define portPRIVILEGE_BIT ( 0x80000000UL )\r
\r
-#define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )\r
-#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )\r
-#define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )\r
-#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )\r
-#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )\r
-#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )\r
+#define portMPU_REGION_READ_WRITE ( 0x03UL << 24UL )\r
+#define portMPU_REGION_PRIVILEGED_READ_ONLY ( 0x05UL << 24UL )\r
+#define portMPU_REGION_READ_ONLY ( 0x06UL << 24UL )\r
+#define portMPU_REGION_PRIVILEGED_READ_WRITE ( 0x01UL << 24UL )\r
+#define portMPU_REGION_PRIVILEGED_READ_WRITE_UNPRIV_READ_ONLY ( 0x02UL << 24UL )\r
+#define portMPU_REGION_CACHEABLE_BUFFERABLE ( 0x07UL << 16UL )\r
+#define portMPU_REGION_EXECUTE_NEVER ( 0x01UL << 28UL )\r
\r
#define portUNPRIVILEGED_FLASH_REGION ( 0UL )\r
#define portPRIVILEGED_FLASH_REGION ( 1UL )\r
#define portNUM_CONFIGURABLE_REGIONS ( ( portLAST_CONFIGURABLE_REGION - portFIRST_CONFIGURABLE_REGION ) + 1 )\r
#define portTOTAL_NUM_REGIONS ( portNUM_CONFIGURABLE_REGIONS + 1 ) /* Plus one to make space for the stack region. */\r
\r
-#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " :::"r0" )\r
+#define portSWITCH_TO_USER_MODE() __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " ::: "r0", "memory" )\r
\r
typedef struct MPU_REGION_REGISTERS\r
{\r
\r
/* Scheduler utilities. */\r
\r
-#define portYIELD() __asm volatile ( " SVC %0 \n" :: "i" (portSVC_YIELD) )\r
-#define portYIELD_WITHIN_API() *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET\r
+#define portYIELD() __asm volatile ( " SVC %0 \n" :: "i" (portSVC_YIELD) : "memory" )\r
+#define portYIELD_WITHIN_API() \\r
+{ \\r
+ /* Set a PendSV to request a context switch. */ \\r
+ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \\r
+ \\r
+ /* Barriers are normally not required but do ensure the code is completely \\r
+ within the specified behaviour for the architecture. */ \\r
+ __asm volatile( "dsb" ::: "memory" ); \\r
+ __asm volatile( "isb" ); \\r
+}\r
\r
-#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )\r
-#define portNVIC_PENDSVSET 0x10000000\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET\r
+#define portNVIC_INT_CTRL_REG ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
+#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
/*-----------------------------------------------------------*/\r
\r
-\r
/* Critical section management. */\r
-\r
-/*\r
- * Set basepri to portMAX_SYSCALL_INTERRUPT_PRIORITY without effecting other\r
- * registers. r0 is clobbered.\r
- */\r
-#define portSET_INTERRUPT_MASK() \\r
- __asm volatile \\r
- ( \\r
- " mov r0, %0 \n" \\r
- " msr basepri, r0 \n" \\r
- ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY):"r0" \\r
- )\r
-\r
-/*\r
- * Set basepri back to 0 without effective other registers.\r
- * r0 is clobbered. FAQ: Setting BASEPRI to 0 is not a bug. Please see\r
- * http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing.\r
- */\r
-#define portCLEAR_INTERRUPT_MASK() \\r
- __asm volatile \\r
- ( \\r
- " mov r0, #0 \n" \\r
- " msr basepri, r0 \n" \\r
- :::"r0" \\r
- )\r
-\r
-/* FAQ: Setting BASEPRI to 0 is not a bug. Please see\r
-http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html before disagreeing. */\r
-#define portSET_INTERRUPT_MASK_FROM_ISR() 0;portSET_INTERRUPT_MASK()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) portCLEAR_INTERRUPT_MASK();(void)x\r
-\r
extern void vPortEnterCritical( void );\r
extern void vPortExitCritical( void );\r
+#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortRaiseBASEPRI()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortSetBASEPRI(x)\r
+#define portDISABLE_INTERRUPTS() vPortRaiseBASEPRI()\r
+#define portENABLE_INTERRUPTS() vPortSetBASEPRI(0)\r
+#define portENTER_CRITICAL() vPortEnterCritical()\r
+#define portEXIT_CRITICAL() vPortExitCritical()\r
\r
-#define portDISABLE_INTERRUPTS() portSET_INTERRUPT_MASK()\r
-#define portENABLE_INTERRUPTS() portCLEAR_INTERRUPT_MASK()\r
-#define portENTER_CRITICAL() vPortEnterCritical()\r
-#define portEXIT_CRITICAL() vPortExitCritical()\r
/*-----------------------------------------------------------*/\r
\r
-/* Task function macros as described on the FreeRTOS.org WEB site. */\r
+/* Task function macros as described on the FreeRTOS.org WEB site. These are\r
+not necessary for to use this port. They are defined so the common demo files\r
+(which build with all the ports) will build. */\r
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Architecture specific optimisations. */\r
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+ #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#endif\r
+\r
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
+\r
+ /* Generic helper function. */\r
+ __attribute__( ( always_inline ) ) static inline uint8_t ucPortCountLeadingZeros( uint32_t ulBitmap )\r
+ {\r
+ uint8_t ucReturn;\r
+\r
+ __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" );\r
+ return ucReturn;\r
+ }\r
+\r
+ /* Check the configuration. */\r
+ #if( configMAX_PRIORITIES > 32 )\r
+ #error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.\r
+ #endif\r
+\r
+ /* Store/clear the ready priorities in a bit map. */\r
+ #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
+ #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
\r
+ /*-----------------------------------------------------------*/\r
+\r
+ #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) ucPortCountLeadingZeros( ( uxReadyPriorities ) ) )\r
+\r
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+#ifdef configASSERT\r
+ void vPortValidateInterruptPriority( void );\r
+ #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()\r
+#endif\r
+\r
+/* portNOP() is not required by this port. */\r
#define portNOP()\r
\r
+#define portINLINE __inline\r
+\r
+#ifndef portFORCE_INLINE\r
+ #define portFORCE_INLINE inline __attribute__(( always_inline))\r
+#endif\r
+/*-----------------------------------------------------------*/\r
+\r
+extern BaseType_t xIsPrivileged( void );\r
+extern void vResetPrivilege( void );\r
+\r
+/**\r
+ * @brief Checks whether or not the processor is privileged.\r
+ *\r
+ * @return 1 if the processor is already privileged, 0 otherwise.\r
+ */\r
+#define portIS_PRIVILEGED() xIsPrivileged()\r
+\r
+/**\r
+ * @brief Raise an SVC request to raise privilege.\r
+*/\r
+#define portRAISE_PRIVILEGE() __asm volatile ( "svc %0 \n" :: "i" ( portSVC_RAISE_PRIVILEGE ) : "memory" );\r
+\r
+/**\r
+ * @brief Lowers the privilege level by setting the bit 0 of the CONTROL\r
+ * register.\r
+ */\r
+#define portRESET_PRIVILEGE() vResetPrivilege()\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static BaseType_t xPortIsInsideInterrupt( void )\r
+{\r
+uint32_t ulCurrentInterrupt;\r
+BaseType_t xReturn;\r
+\r
+ /* Obtain the number of the currently executing interrupt. */\r
+ __asm volatile( "mrs %0, ipsr" : "=r"( ulCurrentInterrupt ) :: "memory" );\r
+\r
+ if( ulCurrentInterrupt == 0 )\r
+ {\r
+ xReturn = pdFALSE;\r
+ }\r
+ else\r
+ {\r
+ xReturn = pdTRUE;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+\r
+/*-----------------------------------------------------------*/\r
\r
+portFORCE_INLINE static void vPortRaiseBASEPRI( void )\r
+{\r
+uint32_t ulNewBASEPRI;\r
+\r
+ __asm volatile\r
+ (\r
+ " mov %0, %1 \n" \\r
+ " msr basepri, %0 \n" \\r
+ " isb \n" \\r
+ " dsb \n" \\r
+ :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
+ );\r
+}\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\r
+{\r
+uint32_t ulOriginalBASEPRI, ulNewBASEPRI;\r
+\r
+ __asm volatile\r
+ (\r
+ " mrs %0, basepri \n" \\r
+ " mov %1, %2 \n" \\r
+ " msr basepri, %1 \n" \\r
+ " isb \n" \\r
+ " dsb \n" \\r
+ :"=r" (ulOriginalBASEPRI), "=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory"\r
+ );\r
+\r
+ /* This return will not be reached but is necessary to prevent compiler\r
+ warnings. */\r
+ return ulOriginalBASEPRI;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\r
+{\r
+ __asm volatile\r
+ (\r
+ " msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory"\r
+ );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
+#ifndef configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY\r
+ #warning "configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY is not defined. We recommend defining it to 1 in FreeRTOSConfig.h for better security."\r
+ #define configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY 0\r
+#endif\r
+/*-----------------------------------------------------------*/\r
#ifdef __cplusplus\r
}\r
#endif\r
projects / freertos / blobdiff