Add additional memory barriers into ARM GCC asm code to ensure no re-ordering across...

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CR5 / portmacro.h

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
index be745514096a7ae1481d5e6f8193864c3d391441..08ac40756e456c6628169fa2c08c4a26e6c36197 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
@@ -123,7 +123,7 @@ extern uint32_t ulPortYieldRequired;                        \
 }\r
 \r
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
-#define portYIELD() __asm volatile ( "SWI 0" );\r
+#define portYIELD() __asm volatile ( "SWI 0" ::: "memory" );\r
 \r
 \r
 /*-----------------------------------------------------------\r