Update version number in readiness for V10.3.0 release. Sync SVN with reviewed releas...

[freertos] / FreeRTOS / Source / portable / GCC / ARM_CR5 / portmacro.h

diff --git a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
index da65daa24b962e300aa9429ef40bb5a93fb795a3..3d30a51706c49e7e25e3381b178a14cca978c8ed 100644 (file)
--- a/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/ARM_CR5/portmacro.h
@@ -1,6 +1,6 @@
 /*\r
- * FreeRTOS Kernel V10.0.1\r
- * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
+ * FreeRTOS Kernel V10.3.0\r
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
  *\r
  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
  * this software and associated documentation files (the "Software"), to deal in\r
@@ -189,5 +189,7 @@ number of bits implemented by the interrupt controller. */
 #define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
 #define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
+#define portMEMORY_BARRIER() __asm volatile( "" ::: "memory" )\r
+\r
 #endif /* PORTMACRO_H */\r
 \r