/*\r
- FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+ All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
the terms of the GNU General Public License (version 2) as published by the\r
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
#include <xparameters.h>\r
\r
/*-----------------------------------------------------------\r
- * Port specific definitions. \r
+ * Port specific definitions.\r
*\r
* The settings in this file configure FreeRTOS correctly for the\r
* given hardware and compiler.\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
#endif\r
-/*-----------------------------------------------------------*/ \r
+/*-----------------------------------------------------------*/\r
\r
/* Interrupt control macros and functions. */\r
void microblaze_disable_interrupts( void );\r
void vPortEnterCritical( void );\r
void vPortExitCritical( void );\r
#define portENTER_CRITICAL() { \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
microblaze_disable_interrupts(); \\r
uxCriticalNesting++; \\r
}\r
\r
#define portEXIT_CRITICAL() { \\r
- extern volatile unsigned portBASE_TYPE uxCriticalNesting; \\r
+ extern volatile UBaseType_t uxCriticalNesting; \\r
/* Interrupts are disabled, so we can */ \\r
/* access the variable directly. */ \\r
uxCriticalNesting--; \\r
context, if the flag is not false. This is done to prevent multiple calls to\r
vTaskSwitchContext() being made from a single interrupt, as a single interrupt\r
can result in multiple peripherals being serviced. */\r
-extern volatile unsigned long ulTaskSwitchRequested;\r
+extern volatile uint32_t ulTaskSwitchRequested;\r
#define portYIELD_FROM_ISR( x ) if( x != pdFALSE ) ulTaskSwitchRequested = 1\r
/*-----------------------------------------------------------*/\r
\r
/* Hardware specifics. */\r
#define portBYTE_ALIGNMENT 4\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portNOP() asm volatile ( "NOP" )\r
/*-----------------------------------------------------------*/\r
\r
{\r
/* The following structure members hold the values of the MicroBlaze\r
registers at the time the exception was raised. */\r
- unsigned long ulR1_SP;\r
- unsigned long ulR2_small_data_area;\r
- unsigned long ulR3;\r
- unsigned long ulR4;\r
- unsigned long ulR5;\r
- unsigned long ulR6;\r
- unsigned long ulR7;\r
- unsigned long ulR8;\r
- unsigned long ulR9;\r
- unsigned long ulR10;\r
- unsigned long ulR11;\r
- unsigned long ulR12;\r
- unsigned long ulR13_read_write_small_data_area;\r
- unsigned long ulR14_return_address_from_interrupt;\r
- unsigned long ulR15_return_address_from_subroutine;\r
- unsigned long ulR16_return_address_from_trap;\r
- unsigned long ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */\r
- unsigned long ulR18;\r
- unsigned long ulR19;\r
- unsigned long ulR20;\r
- unsigned long ulR21;\r
- unsigned long ulR22;\r
- unsigned long ulR23;\r
- unsigned long ulR24;\r
- unsigned long ulR25;\r
- unsigned long ulR26;\r
- unsigned long ulR27;\r
- unsigned long ulR28;\r
- unsigned long ulR29;\r
- unsigned long ulR30;\r
- unsigned long ulR31;\r
- unsigned long ulPC;\r
- unsigned long ulESR;\r
- unsigned long ulMSR;\r
- unsigned long ulEAR;\r
- unsigned long ulFSR;\r
- unsigned long ulEDR;\r
+ uint32_t ulR1_SP;\r
+ uint32_t ulR2_small_data_area;\r
+ uint32_t ulR3;\r
+ uint32_t ulR4;\r
+ uint32_t ulR5;\r
+ uint32_t ulR6;\r
+ uint32_t ulR7;\r
+ uint32_t ulR8;\r
+ uint32_t ulR9;\r
+ uint32_t ulR10;\r
+ uint32_t ulR11;\r
+ uint32_t ulR12;\r
+ uint32_t ulR13_read_write_small_data_area;\r
+ uint32_t ulR14_return_address_from_interrupt;\r
+ uint32_t ulR15_return_address_from_subroutine;\r
+ uint32_t ulR16_return_address_from_trap;\r
+ uint32_t ulR17_return_address_from_exceptions; /* The exception entry code will copy the BTR into R17 if the exception occurred in the delay slot of a branch instruction. */\r
+ uint32_t ulR18;\r
+ uint32_t ulR19;\r
+ uint32_t ulR20;\r
+ uint32_t ulR21;\r
+ uint32_t ulR22;\r
+ uint32_t ulR23;\r
+ uint32_t ulR24;\r
+ uint32_t ulR25;\r
+ uint32_t ulR26;\r
+ uint32_t ulR27;\r
+ uint32_t ulR28;\r
+ uint32_t ulR29;\r
+ uint32_t ulR30;\r
+ uint32_t ulR31;\r
+ uint32_t ulPC;\r
+ uint32_t ulESR;\r
+ uint32_t ulMSR;\r
+ uint32_t ulEAR;\r
+ uint32_t ulFSR;\r
+ uint32_t ulEDR;\r
\r
/* A human readable description of the exception cause. The strings used\r
are the same as the #define constant names found in the\r
microblaze_exceptions_i.h header file */\r
- signed char *pcExceptionCause;\r
+ int8_t *pcExceptionCause;\r
\r
/* The human readable name of the task that was running at the time the\r
exception occurred. This is the name that was given to the task when the\r
task was created using the FreeRTOS xTaskCreate() API function. */\r
- signed char *pcCurrentTaskName;\r
+ int8_t *pcCurrentTaskName;\r
\r
/* The handle of the task that was running a the time the exception\r
occurred. */\r
\r
\r
/*\r
- * Installs pxHandler as the interrupt handler for the peripheral specified by \r
+ * Installs pxHandler as the interrupt handler for the peripheral specified by\r
* the ucInterruptID parameter.\r
*\r
* ucInterruptID:\r
- * \r
+ *\r
* The ID of the peripheral that will have pxHandler assigned as its interrupt\r
- * handler. Peripheral IDs are defined in the xparameters.h header file, which \r
- * is itself part of the BSP project. For example, in the official demo \r
- * application for this port, xparameters.h defines the following IDs for the \r
+ * handler. Peripheral IDs are defined in the xparameters.h header file, which\r
+ * is itself part of the BSP project. For example, in the official demo\r
+ * application for this port, xparameters.h defines the following IDs for the\r
* four possible interrupt sources:\r
*\r
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.\r
*\r
*\r
* pxHandler:\r
- * \r
+ *\r
* A pointer to the interrupt handler function itself. This must be a void\r
* function that takes a (void *) parameter.\r
*\r
* the peripheral instance variable, so it can be accessed from inside the\r
* handler function.\r
*\r
- * \r
+ *\r
* pdPASS is returned if the function executes successfully. Any other value\r
* being returned indicates that the function did not execute correctly.\r
*/\r
-portBASE_TYPE xPortInstallInterruptHandler( unsigned char ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
+BaseType_t xPortInstallInterruptHandler( uint8_t ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef );\r
\r
\r
/*\r
- * Enables the interrupt, within the interrupt controller, for the peripheral \r
+ * Enables the interrupt, within the interrupt controller, for the peripheral\r
* specified by the ucInterruptID parameter.\r
*\r
* ucInterruptID:\r
- * \r
+ *\r
* The ID of the peripheral that will have its interrupt enabled in the\r
- * interrupt controller. Peripheral IDs are defined in the xparameters.h header \r
- * file, which is itself part of the BSP project. For example, in the official \r
- * demo application for this port, xparameters.h defines the following IDs for \r
+ * interrupt controller. Peripheral IDs are defined in the xparameters.h header\r
+ * file, which is itself part of the BSP project. For example, in the official\r
+ * demo application for this port, xparameters.h defines the following IDs for\r
* the four possible interrupt sources:\r
*\r
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.\r
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.\r
*\r
*/\r
-void vPortEnableInterrupt( unsigned char ucInterruptID );\r
+void vPortEnableInterrupt( uint8_t ucInterruptID );\r
\r
/*\r
- * Disables the interrupt, within the interrupt controller, for the peripheral \r
+ * Disables the interrupt, within the interrupt controller, for the peripheral\r
* specified by the ucInterruptID parameter.\r
*\r
* ucInterruptID:\r
- * \r
+ *\r
* The ID of the peripheral that will have its interrupt disabled in the\r
- * interrupt controller. Peripheral IDs are defined in the xparameters.h header \r
- * file, which is itself part of the BSP project. For example, in the official \r
- * demo application for this port, xparameters.h defines the following IDs for \r
+ * interrupt controller. Peripheral IDs are defined in the xparameters.h header\r
+ * file, which is itself part of the BSP project. For example, in the official\r
+ * demo application for this port, xparameters.h defines the following IDs for\r
* the four possible interrupt sources:\r
*\r
* XPAR_INTC_0_UARTLITE_1_VEC_ID - for the UARTlite peripheral.\r
* XPAR_INTC_0_GPIO_1_VEC_ID - for the button inputs.\r
*\r
*/\r
-void vPortDisableInterrupt( unsigned char ucInterruptID );\r
+void vPortDisableInterrupt( uint8_t ucInterruptID );\r
\r
/*\r
* This is an application defined callback function used to install the tick\r
- * interrupt handler. It is provided as an application callback because the \r
- * kernel will run on lots of different MicroBlaze and FPGA configurations - not \r
- * all of which will have the same timer peripherals defined or available. This \r
- * example uses the AXI Timer 0. If that is available on your hardware platform \r
- * then this example callback implementation should not require modification. \r
- * The name of the interrupt handler that should be installed is vPortTickISR(), \r
+ * interrupt handler. It is provided as an application callback because the\r
+ * kernel will run on lots of different MicroBlaze and FPGA configurations - not\r
+ * all of which will have the same timer peripherals defined or available. This\r
+ * example uses the AXI Timer 0. If that is available on your hardware platform\r
+ * then this example callback implementation should not require modification.\r
+ * The name of the interrupt handler that should be installed is vPortTickISR(),\r
* which the function below declares as an extern.\r
- */ \r
+ */\r
void vApplicationSetupTimerInterrupt( void );\r
\r
-/* \r
+/*\r
* This is an application defined callback function used to clear whichever\r
* interrupt was installed by the the vApplicationSetupTimerInterrupt() callback\r
- * function - in this case the interrupt generated by the AXI timer. It is \r
- * provided as an application callback because the kernel will run on lots of \r
- * different MicroBlaze and FPGA configurations - not all of which will have the \r
- * same timer peripherals defined or available. This example uses the AXI Timer 0. \r
- * If that is available on your hardware platform then this example callback \r
+ * function - in this case the interrupt generated by the AXI timer. It is\r
+ * provided as an application callback because the kernel will run on lots of\r
+ * different MicroBlaze and FPGA configurations - not all of which will have the\r
+ * same timer peripherals defined or available. This example uses the AXI Timer 0.\r
+ * If that is available on your hardware platform then this example callback\r
* implementation should not require modification provided the example definition\r
- * of vApplicationSetupTimerInterrupt() is also not modified. \r
+ * of vApplicationSetupTimerInterrupt() is also not modified.\r
*/\r
void vApplicationClearTimerInterrupt( void );\r
\r
/*\r
* vPortExceptionsInstallHandlers() is only available when the MicroBlaze\r
- * is configured to include exception functionality, and \r
+ * is configured to include exception functionality, and\r
* configINSTALL_EXCEPTION_HANDLERS is set to 1 in FreeRTOSConfig.h.\r
*\r
* vPortExceptionsInstallHandlers() installs the FreeRTOS exception handler\r
- * for every possible exception cause. \r
+ * for every possible exception cause.\r
*\r
* vPortExceptionsInstallHandlers() can be called explicitly from application\r
* code. After that is done, the default FreeRTOS exception handler that will\r
- * have been installed can be replaced for any specific exception cause by using \r
+ * have been installed can be replaced for any specific exception cause by using\r
* the standard Xilinx library function microblaze_register_exception_handler().\r
*\r
- * If vPortExceptionsInstallHandlers() is not called explicitly by the \r
+ * If vPortExceptionsInstallHandlers() is not called explicitly by the\r
* application, it will be called automatically by the kernel the first time\r
- * xPortInstallInterruptHandler() is called. At that time, any exception \r
+ * xPortInstallInterruptHandler() is called. At that time, any exception\r
* handlers that may have already been installed will be replaced.\r
*\r
* See the description of vApplicationExceptionRegisterDump() for information\r
void vPortExceptionsInstallHandlers( void );\r
\r
/*\r
- * The FreeRTOS exception handler fills an xPortRegisterDump structure (defined \r
- * in portmacro.h) with the MicroBlaze context, as it was at the time the \r
+ * The FreeRTOS exception handler fills an xPortRegisterDump structure (defined\r
+ * in portmacro.h) with the MicroBlaze context, as it was at the time the\r
* exception occurred. The exception handler then calls\r
* vApplicationExceptionRegisterDump(), passing in the completed\r
* xPortRegisterDump structure as its parameter.\r
*\r
* The FreeRTOS kernel provides its own implementation of\r
- * vApplicationExceptionRegisterDump(), but the kernel provided implementation \r
- * is declared as being 'weak'. The weak definition allows the application \r
- * writer to provide their own implementation, should they wish to use the \r
+ * vApplicationExceptionRegisterDump(), but the kernel provided implementation\r
+ * is declared as being 'weak'. The weak definition allows the application\r
+ * writer to provide their own implementation, should they wish to use the\r
* register dump information. For example, an implementation could be provided\r
* that wrote the register dump data to a display, or a UART port.\r
*/\r
projects / freertos / blobdiff