/*\r
* The FreeRTOS kernel's RISC-V port is split between the the code that is\r
* common across all currently supported RISC-V chips (implementations of the\r
- * RISC-V ISA), and code which tailors the port to a specific RISC-V chip:\r
+ * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:\r
*\r
* + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that\r
* is common to all currently supported RISC-V chips. There is only one\r
* as there are multiple RISC-V chip implementations.\r
*\r
* !!!NOTE!!!\r
- * CARE MUST BE TAKEN TO INCLUDE THE CORRECT\r
- * freertos_risc_v_chip_specific_extensions.h HEADER FILE FOR THE CHIP IN USE.\r
- * If the chip in use includes a core local interrupter (CLINT) and does not\r
- * include any chip specific register extensions then set the GNU assembler's\r
- * include path such that the header file contained in the\r
- * FreeRTOS\Source\portable\GCC\RISC-V-RV32 directory is the header file that is\r
- * actually inlcuded. Otherwise set the assembler's include patch to the\r
- * sub-directory off of the\r
- * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions directory\r
- * that contains the freertos_risc_v_chip_specific_extensions.h specific to the\r
- * target chip.\r
+ * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h\r
+ * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the\r
+ * compiler's!) include path. For example, if the chip in use includes a core\r
+ * local interrupter (CLINT) and does not include any chip specific register\r
+ * extensions then add the path below to the assembler's include path:\r
+ * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions\r
*\r
*/\r