/*\r
- FreeRTOS V7.5.3 - Copyright (C) 2013 Real Time Engineers Ltd. \r
- All rights reserved\r
-\r
- VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
- ***************************************************************************\r
- * *\r
- * FreeRTOS provides completely free yet professionally developed, *\r
- * robust, strictly quality controlled, supported, and cross *\r
- * platform software that has become a de facto standard. *\r
- * *\r
- * Help yourself get started quickly and support the FreeRTOS *\r
- * project by purchasing a FreeRTOS tutorial book, reference *\r
- * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
- * *\r
- * Thank you! *\r
- * *\r
- ***************************************************************************\r
-\r
- This file is part of the FreeRTOS distribution.\r
-\r
- FreeRTOS is free software; you can redistribute it and/or modify it under\r
- the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
-\r
- FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
- WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
- link: http://www.freertos.org/a00114.html\r
-\r
- 1 tab == 4 spaces!\r
-\r
- ***************************************************************************\r
- * *\r
- * Having a problem? Start by reading the FAQ "My application does *\r
- * not run, what could be wrong?" *\r
- * *\r
- * http://www.FreeRTOS.org/FAQHelp.html *\r
- * *\r
- ***************************************************************************\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
- license and Real Time Engineers Ltd. contact details.\r
-\r
- http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
- compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
- licenses offer ticketed support, indemnification and middleware.\r
-\r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
- engineered and independently SIL3 certified version for use in safety and\r
- mission critical applications that require provable dependability.\r
-\r
- 1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.0.0\r
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software. If you wish to use our Amazon\r
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
\r
#ifndef PORTMACRO_H\r
#define PORTMACRO_H\r
#define portDOUBLE double\r
#define portLONG long\r
#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
+#define portSTACK_TYPE uint32_t\r
#define portBASE_TYPE long\r
\r
+typedef portSTACK_TYPE StackType_t;\r
+typedef long BaseType_t;\r
+typedef unsigned long UBaseType_t;\r
+\r
#if( configUSE_16_BIT_TICKS == 1 )\r
- typedef unsigned portSHORT portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffff\r
+ typedef uint16_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffff\r
#else\r
- typedef unsigned portLONG portTickType;\r
- #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+ typedef uint32_t TickType_t;\r
+ #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
+\r
+ /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
+ not need to be guarded with a critical section. */\r
+ #define portTICK_TYPE_IS_ATOMIC 1\r
#endif\r
/*---------------------------------------------------------------------------*/\r
\r
/* Architecture specifics. */\r
#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
#define portBYTE_ALIGNMENT 4\r
#define portNOP() __asm volatile( " nop " )\r
#define portCRITICAL_NESTING_IN_TCB 1\r
\r
/*---------------------------------------------------------------------------*/\r
\r
-typedef struct MPU_SETTINGS { unsigned long ulNotUsed; } xMPU_SETTINGS;\r
+typedef struct MPU_SETTINGS { uint32_t ulNotUsed; } xMPU_SETTINGS;\r
\r
/* Define away the instruction from the Restore Context Macro. */\r
#define portPRIVILEGE_BIT 0x0UL\r
/*---------------------------------------------------------------------------*/\r
\r
/* CSA Manipulation. */\r
-#define portCSA_TO_ADDRESS( pCSA ) ( ( unsigned long * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
-#define portADDRESS_TO_CSA( pAddress ) ( ( unsigned long )( ( ( ( (unsigned long)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( unsigned long )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
+#define portCSA_TO_ADDRESS( pCSA ) ( ( uint32_t * )( ( ( ( pCSA ) & 0x000F0000 ) << 12 ) | ( ( ( pCSA ) & 0x0000FFFF ) << 6 ) ) )\r
+#define portADDRESS_TO_CSA( pAddress ) ( ( uint32_t )( ( ( ( (uint32_t)( pAddress ) ) & 0xF0000000 ) >> 12 ) | ( ( ( uint32_t )( pAddress ) & 0x003FFFC0 ) >> 6 ) ) )\r
/*---------------------------------------------------------------------------*/\r
\r
#define portYIELD() _syscall( 0 )\r
\r
/* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY. */\r
#define portDISABLE_INTERRUPTS() { \\r
- unsigned long ulICR; \\r
+ uint32_t ulICR; \\r
_disable(); \\r
- ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \\r
+ ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \\r
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \\r
ulICR |= configMAX_SYSCALL_INTERRUPT_PRIORITY; /* Set mask bits to required priority mask. */ \\r
_mtcr( $ICR, ulICR ); /* Write back updated ICR. */ \\r
\r
/* Clear ICR.CCPN to allow all interrupt priorities. */\r
#define portENABLE_INTERRUPTS() { \\r
- unsigned long ulICR; \\r
+ uint32_t ulICR; \\r
_disable(); \\r
- ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \\r
+ ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \\r
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \\r
_mtcr( $ICR, ulICR ); /* Write back updated ICR. */ \\r
_isync(); \\r
\r
/* Set ICR.CCPN to uxSavedMaskValue. */\r
#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedMaskValue ) { \\r
- unsigned long ulICR; \\r
+ uint32_t ulICR; \\r
_disable(); \\r
- ulICR = _mfcr( $ICR ); /* Get current ICR value. */ \\r
+ ulICR = __MFCR( $ICR ); /* Get current ICR value. */ \\r
ulICR &= ~portCCPN_MASK; /* Clear down mask bits. */ \\r
ulICR |= uxSavedMaskValue; /* Set mask bits to previously saved mask value. */ \\r
_mtcr( $ICR, ulICR ); /* Write back updated ICR. */ \\r
\r
\r
/* Set ICR.CCPN to configMAX_SYSCALL_INTERRUPT_PRIORITY */\r
-extern unsigned long uxPortSetInterruptMaskFromISR( void );\r
+extern uint32_t uxPortSetInterruptMaskFromISR( void );\r
#define portSET_INTERRUPT_MASK_FROM_ISR() uxPortSetInterruptMaskFromISR()\r
\r
/* Pend a priority 1 interrupt, which will take care of the context switch. */\r
* Port specific clean up macro required to free the CSAs that were consumed by\r
* a task that has since been deleted.\r
*/\r
-void vPortReclaimCSA( unsigned long *pxTCB );\r
-#define portCLEAN_UP_TCB( pxTCB ) vPortReclaimCSA( ( unsigned long * ) ( pxTCB ) )\r
+void vPortReclaimCSA( uint32_t *pxTCB );\r
+#define portCLEAN_UP_TCB( pxTCB ) vPortReclaimCSA( ( uint32_t * ) ( pxTCB ) )\r
\r
#ifdef __cplusplus\r
}\r
projects / freertos / blobdiff