/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
\r
* *\r
***************************************************************************\r
\r
-\r
- http://www.FreeRTOS.org - Documentation, books, training, latest versions, \r
+ http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
-\r
- http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High \r
- Integrity Systems, who sell the code with commercial support, \r
- indemnification and middleware, under the OpenRTOS brand.\r
- \r
- http://www.SafeRTOS.com - High Integrity Systems also provide a safety \r
- engineered and independently SIL3 certified version for use in safety and \r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
+\r
+ http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
+\r
+ http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
+ engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
/* Standard includes. */\r
\r
/* The critical nesting value is initialised to a non zero value to ensure\r
interrupts don't accidentally become enabled before the scheduler is started. */\r
-#define portINITIAL_CRITICAL_NESTING (( unsigned short ) 10)\r
+#define portINITIAL_CRITICAL_NESTING (( uint16_t ) 10)\r
\r
/* Initial PSW value allocated to a newly created task.\r
* 1100011000000000\r
\r
/* We require the address of the pxCurrentTCB variable, but don't want to know\r
any details of its type. */\r
-typedef void tskTCB;\r
-extern volatile tskTCB * volatile pxCurrentTCB;\r
+typedef void TCB_t;\r
+extern volatile TCB_t * volatile pxCurrentTCB;\r
\r
/* Most ports implement critical sections by placing the interrupt flags on\r
the stack before disabling interrupts. Exiting the critical section is then\r
usCriticalNesting will get set to zero when the scheduler starts, but must\r
not be initialised to zero as this will cause problems during the startup\r
sequence. */\r
-volatile unsigned short usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
+volatile uint16_t usCriticalNesting = portINITIAL_CRITICAL_NESTING;\r
/*-----------------------------------------------------------*/\r
\r
/*\r
*\r
* See the header file portable.h.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
-unsigned long *pulLocal;\r
+uint32_t *pulLocal;\r
\r
#if configMEMORY_MODE == 1\r
{\r
pxTopOfStack--;\r
\r
/* Write in the parameter value. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( unsigned long ) pvParameters;\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( uint32_t ) pvParameters;\r
pxTopOfStack--;\r
\r
/* These values are just spacers. The return address of the function\r
would normally be written here. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ *pxTopOfStack = ( StackType_t ) 0xcdcd;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xcdcd;\r
+ *pxTopOfStack = ( StackType_t ) 0xcdcd;\r
pxTopOfStack--;\r
\r
/* The start address / PSW value is also written in as a 32bit value,\r
pxTopOfStack--;\r
\r
/* Task function start address combined with the PSW. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );\r
pxTopOfStack--;\r
\r
/* An initial value for the AX register. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x1111;\r
+ *pxTopOfStack = ( StackType_t ) 0x1111;\r
pxTopOfStack--;\r
}\r
#else\r
pxTopOfStack--;\r
\r
/* Task function start address combined with the PSW. */\r
- pulLocal = ( unsigned long * ) pxTopOfStack;\r
- *pulLocal = ( ( ( unsigned long ) pxCode ) | ( portPSW << 24UL ) );\r
+ pulLocal = ( uint32_t * ) pxTopOfStack;\r
+ *pulLocal = ( ( ( uint32_t ) pxCode ) | ( portPSW << 24UL ) );\r
pxTopOfStack--;\r
\r
/* The parameter is passed in AX. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters;\r
+ *pxTopOfStack = ( StackType_t ) pvParameters;\r
pxTopOfStack--;\r
}\r
#endif\r
\r
/* An initial value for the HL register. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x2222;\r
+ *pxTopOfStack = ( StackType_t ) 0x2222;\r
pxTopOfStack--;\r
\r
/* CS and ES registers. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x0F00;\r
+ *pxTopOfStack = ( StackType_t ) 0x0F00;\r
pxTopOfStack--;\r
\r
/* Finally the remaining general purpose registers DE and BC */\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xDEDE;\r
+ *pxTopOfStack = ( StackType_t ) 0xDEDE;\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xBCBC;\r
+ *pxTopOfStack = ( StackType_t ) 0xBCBC;\r
pxTopOfStack--;\r
\r
/* Finally the critical section nesting count is set to zero when the task\r
first starts. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portNO_CRITICAL_SECTION_NESTING; \r
+ *pxTopOfStack = ( StackType_t ) portNO_CRITICAL_SECTION_NESTING; \r
\r
/* Return a pointer to the top of the stack we have generated so this can\r
be stored in the task control block for the task. */\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
/* Setup the hardware to generate the tick. Interrupts are disabled when\r
this function is called. */\r
TMR05 = 0x0000;\r
\r
/* Set the compare match value according to the tick rate we want. */\r
- TDR05 = ( portTickType ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );\r
+ TDR05 = ( TickType_t ) ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );\r
\r
/* Set Timer Array Unit Channel 5 output mode */\r
TOM0 &= ~0x0020;\r
projects / freertos / blobdiff