/*\r
- FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
+ All rights reserved\r
\r
- FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT\r
- http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+ VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
***************************************************************************\r
* *\r
- * FreeRTOS tutorial books are available in pdf and paperback. *\r
- * Complete, revised, and edited pdf reference manuals are also *\r
- * available. *\r
+ * FreeRTOS provides completely free yet professionally developed, *\r
+ * robust, strictly quality controlled, supported, and cross *\r
+ * platform software that has become a de facto standard. *\r
* *\r
- * Purchasing FreeRTOS documentation will not only help you, by *\r
- * ensuring you get running as quickly as possible and with an *\r
- * in-depth knowledge of how to use FreeRTOS, it will also help *\r
- * the FreeRTOS project to continue with its mission of providing *\r
- * professional grade, cross platform, de facto standard solutions *\r
- * for microcontrollers - completely free of charge! *\r
+ * Help yourself get started quickly and support the FreeRTOS *\r
+ * project by purchasing a FreeRTOS tutorial book, reference *\r
+ * manual, or both from: http://www.FreeRTOS.org/Documentation *\r
* *\r
- * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
- * *\r
- * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * Thank you! *\r
* *\r
***************************************************************************\r
\r
-\r
This file is part of the FreeRTOS distribution.\r
\r
FreeRTOS is free software; you can redistribute it and/or modify it under\r
the terms of the GNU General Public License (version 2) as published by the\r
- Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to\r
- distribute a combined work that includes FreeRTOS without being obliged to\r
- provide the source code for proprietary components outside of the FreeRTOS\r
- kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to distribute\r
+ >>! a combined work that includes FreeRTOS without being obliged to provide\r
+ >>! the source code for proprietary components outside of the FreeRTOS\r
+ >>! kernel.\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
- FOR A PARTICULAR PURPOSE. See the GNU General Public License for more\r
- details. You should have received a copy of the GNU General Public License\r
- and the FreeRTOS license exception along with FreeRTOS; if not it can be\r
- viewed here: http://www.freertos.org/a00114.html and also obtained by\r
- writing to Real Time Engineers Ltd., contact details for whom are available\r
- on the FreeRTOS WEB site.\r
+ FOR A PARTICULAR PURPOSE. Full license text is available from the following\r
+ link: http://www.freertos.org/a00114.html\r
\r
1 tab == 4 spaces!\r
\r
* *\r
***************************************************************************\r
\r
-\r
http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
license and Real Time Engineers Ltd. contact details.\r
\r
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
- including FreeRTOS+Trace - an indispensable productivity tool, and our new\r
- fully thread aware and reentrant UDP/IP stack.\r
+ including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
+ compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
\r
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
- Integrity Systems, who sell the code with commercial support,\r
- indemnification and middleware, under the OpenRTOS brand.\r
+ Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS\r
+ licenses offer ticketed support, indemnification and middleware.\r
\r
http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
engineered and independently SIL3 certified version for use in safety and\r
mission critical applications that require provable dependability.\r
+\r
+ 1 tab == 4 spaces!\r
*/\r
\r
#ifndef PORTMACRO_H\r
\r
/* IAR includes. */\r
#ifdef __ICCARM__\r
+\r
#include <intrinsics.h>\r
\r
-#ifdef __cplusplus\r
-extern "C" {\r
-#endif\r
+ #ifdef __cplusplus\r
+ extern "C" {\r
+ #endif\r
+\r
+ /*-----------------------------------------------------------\r
+ * Port specific definitions.\r
+ *\r
+ * The settings in this file configure FreeRTOS correctly for the given hardware\r
+ * and compiler.\r
+ *\r
+ * These settings should not be altered.\r
+ *-----------------------------------------------------------\r
+ */\r
+\r
+ /* Type definitions. */\r
+ #define portCHAR char\r
+ #define portFLOAT float\r
+ #define portDOUBLE double\r
+ #define portLONG long\r
+ #define portSHORT short\r
+ #define portSTACK_TYPE unsigned long\r
+ #define portBASE_TYPE portLONG\r
+ typedef unsigned long portTickType;\r
+ #define portMAX_DELAY ( portTickType ) 0xffffffff\r
\r
-/*-----------------------------------------------------------\r
- * Port specific definitions.\r
- *\r
- * The settings in this file configure FreeRTOS correctly for the given hardware\r
- * and compiler.\r
- *\r
- * These settings should not be altered.\r
- *-----------------------------------------------------------\r
- */\r
-\r
-/* Type definitions. */\r
-#define portCHAR char\r
-#define portFLOAT float\r
-#define portDOUBLE double\r
-#define portLONG long\r
-#define portSHORT short\r
-#define portSTACK_TYPE unsigned long\r
-#define portBASE_TYPE portLONG\r
-typedef unsigned long portTickType;\r
-#define portMAX_DELAY ( portTickType ) 0xffffffff\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Hardware specifics. */\r
-#define portSTACK_GROWTH ( -1 )\r
-#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
-#define portBYTE_ALIGNMENT 8\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Task utilities. */\r
-\r
-/* Called at the end of an ISR that can cause a context switch. */\r
-#define portEND_SWITCHING_ISR( xSwitchRequired )\\r
-{ \\r
-extern unsigned long ulPortYieldRequired; \\r
- \\r
- if( xSwitchRequired != pdFALSE ) \\r
- { \\r
- ulPortYieldRequired = pdTRUE; \\r
- } \\r
-}\r
-\r
-#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
-#define portYIELD() __asm( "SWI 0" );\r
-\r
-\r
-/*-----------------------------------------------------------\r
- * Critical section control\r
- *----------------------------------------------------------*/\r
-\r
-extern void vPortEnterCritical( void );\r
-extern void vPortExitCritical( void );\r
-extern unsigned long ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
-\r
-/* These macros do not globally disable/enable interrupts. They do mask off\r
-interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */\r
-#define portENTER_CRITICAL() vPortEnterCritical();\r
-#define portEXIT_CRITICAL() vPortExitCritical();\r
-#define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()\r
-#define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )\r
-#define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)\r
-\r
-/*-----------------------------------------------------------*/\r
-\r
-/* Task function macros as described on the FreeRTOS.org WEB site. These are\r
-not required for this port but included in case common demo code that uses these\r
-macros is used. */\r
-#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
-#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
-\r
-/* Prototype of the FreeRTOS tick handler. This must be installed as the\r
-handler for whichever peripheral is used to generate the RTOS tick. */\r
-void FreeRTOS_Tick_Handler( void );\r
-\r
-/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()\r
-before any floating point instructions are executed. */\r
-void vPortTaskUsesFPU( void );\r
-#define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
-\r
-#define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
-#define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
-\r
-/* Architecture specific optimisations. */\r
-#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
-\r
- /* Store/clear the ready priorities in a bit map. */\r
- #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
- #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
+ /*-----------------------------------------------------------*/\r
+\r
+ /* Hardware specifics. */\r
+ #define portSTACK_GROWTH ( -1 )\r
+ #define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+ #define portBYTE_ALIGNMENT 8\r
\r
/*-----------------------------------------------------------*/\r
\r
- #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )\r
+ /* Task utilities. */\r
+\r
+ /* Called at the end of an ISR that can cause a context switch. */\r
+ #define portEND_SWITCHING_ISR( xSwitchRequired )\\r
+ { \\r
+ extern unsigned long ulPortYieldRequired; \\r
+ \\r
+ if( xSwitchRequired != pdFALSE ) \\r
+ { \\r
+ ulPortYieldRequired = pdTRUE; \\r
+ } \\r
+ }\r
+\r
+ #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
+ #define portYIELD() __asm( "SWI 0" );\r
+\r
+\r
+ /*-----------------------------------------------------------\r
+ * Critical section control\r
+ *----------------------------------------------------------*/\r
+\r
+ extern void vPortEnterCritical( void );\r
+ extern void vPortExitCritical( void );\r
+ extern unsigned long ulPortSetInterruptMask( void );\r
+ extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+\r
+ /* These macros do not globally disable/enable interrupts. They do mask off\r
+ interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */\r
+ #define portENTER_CRITICAL() vPortEnterCritical();\r
+ #define portEXIT_CRITICAL() vPortExitCritical();\r
+ #define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()\r
+ #define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )\r
+ #define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()\r
+ #define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)\r
+\r
+ /*-----------------------------------------------------------*/\r
\r
-#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
+ /* Task function macros as described on the FreeRTOS.org WEB site. These are\r
+ not required for this port but included in case common demo code that uses these\r
+ macros is used. */\r
+ #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
+ #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )\r
\r
-#ifdef __cplusplus\r
-}\r
-#endif\r
+ /* Prototype of the FreeRTOS tick handler. This must be installed as the\r
+ handler for whichever peripheral is used to generate the RTOS tick. */\r
+ void FreeRTOS_Tick_Handler( void );\r
\r
-#endif /* __ICCARM__ */\r
+ /* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()\r
+ before any floating point instructions are executed. */\r
+ void vPortTaskUsesFPU( void );\r
+ #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
\r
-#define portNOP() __asm volatile( "NOP" )\r
+ #define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
+ #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
+\r
+ /* Architecture specific optimisations. */\r
+ #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
+\r
+ /* Store/clear the ready priorities in a bit map. */\r
+ #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
+ #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
+\r
+ /*-----------------------------------------------------------*/\r
+\r
+ #define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )\r
+\r
+ #endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */\r
+\r
+ #ifdef configASSERT\r
+ void vPortValidateInterruptPriority( void );\r
+ #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()\r
+ #endif /* configASSERT */\r
+\r
+ #define portNOP() __asm volatile( "NOP" )\r
+\r
+\r
+ #ifdef __cplusplus\r
+ } /* extern C */\r
+ #endif\r
+\r
+ /* Suppress warnings that are generated by the IAR tools, but cannot be\r
+ fixed in the source code because to do so would cause other compilers to\r
+ generate warnings. */\r
+ #pragma diag_suppress=Pe191\r
+ #pragma diag_suppress=Pa082\r
+\r
+#endif /* __ICCARM__ */\r
\r
\r
/* The number of bits to shift for an interrupt priority is dependent on the\r
number of bits implemented by the interrupt controller. */\r
#if configUNIQUE_INTERRUPT_PRIORITIES == 16\r
#define portPRIORITY_SHIFT 4\r
+ #define portMAX_BINARY_POINT_VALUE 3\r
#elif configUNIQUE_INTERRUPT_PRIORITIES == 32\r
#define portPRIORITY_SHIFT 3\r
+ #define portMAX_BINARY_POINT_VALUE 2\r
#elif configUNIQUE_INTERRUPT_PRIORITIES == 64\r
#define portPRIORITY_SHIFT 2\r
+ #define portMAX_BINARY_POINT_VALUE 1\r
#elif configUNIQUE_INTERRUPT_PRIORITIES == 128\r
#define portPRIORITY_SHIFT 1\r
+ #define portMAX_BINARY_POINT_VALUE 0\r
#elif configUNIQUE_INTERRUPT_PRIORITIES == 256\r
#define portPRIORITY_SHIFT 0\r
+ #define portMAX_BINARY_POINT_VALUE 0\r
#else\r
#error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware\r
#endif\r
\r
/* Interrupt controller access addresses. */\r
-#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )\r
-#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )\r
-#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )\r
-#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
-#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
-#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
-\r
+#define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )\r
+#define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )\r
+#define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )\r
+#define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )\r
+#define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )\r
+\r
+#define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
+#define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
+#define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
\r
#endif /* PORTMACRO_H */\r
\r
projects / freertos / blobdiff