]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for...
[freertos] / FreeRTOS / Source / portable / IAR / ARM_CA9 / portmacro.h
index 7c203b91db5f8d4429b94725e1a1fd936d45778f..7edd15f533c9d9175fc349afb7eb18d70f584b4b 100644 (file)
@@ -1,67 +1,29 @@
 /*\r
-    FreeRTOS V7.6.0 - Copyright (C) 2013 Real Time Engineers Ltd. \r
-    All rights reserved\r
-\r
-    VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
-\r
-    ***************************************************************************\r
-     *                                                                       *\r
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-     *    robust, strictly quality controlled, supported, and cross          *\r
-     *    platform software that has become a de facto standard.             *\r
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-     *    Thank you!                                                         *\r
-     *                                                                       *\r
-    ***************************************************************************\r
-\r
-    This file is part of the FreeRTOS distribution.\r
-\r
-    FreeRTOS is free software; you can redistribute it and/or modify it under\r
-    the terms of the GNU General Public License (version 2) as published by the\r
-    Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
-\r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
-\r
-    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
-    WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
-    FOR A PARTICULAR PURPOSE.  Full license text is available from the following\r
-    link: http://www.freertos.org/a00114.html\r
-\r
-    1 tab == 4 spaces!\r
-\r
-    ***************************************************************************\r
-     *                                                                       *\r
-     *    Having a problem?  Start by reading the FAQ "My application does   *\r
-     *    not run, what could be wrong?"                                     *\r
-     *                                                                       *\r
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
-     *                                                                       *\r
-    ***************************************************************************\r
-\r
-    http://www.FreeRTOS.org - Documentation, books, training, latest versions,\r
-    license and Real Time Engineers Ltd. contact details.\r
-\r
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
-    including FreeRTOS+Trace - an indispensable productivity tool, a DOS\r
-    compatible FAT file system, and our tiny thread aware UDP/IP stack.\r
-\r
-    http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High\r
-    Integrity Systems to sell under the OpenRTOS brand.  Low cost OpenRTOS\r
-    licenses offer ticketed support, indemnification and middleware.\r
-\r
-    http://www.SafeRTOS.com - High Integrity Systems also provide a safety\r
-    engineered and independently SIL3 certified version for use in safety and\r
-    mission critical applications that require provable dependability.\r
-\r
-    1 tab == 4 spaces!\r
-*/\r
+ * FreeRTOS Kernel V10.0.1\r
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
 \r
 #ifndef PORTMACRO_H\r
 #define PORTMACRO_H\r
        #define portDOUBLE              double\r
        #define portLONG                long\r
        #define portSHORT               short\r
-       #define portSTACK_TYPE  unsigned long\r
-       #define portBASE_TYPE   portLONG\r
-       typedef unsigned long portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+       #define portSTACK_TYPE  uint32_t\r
+       #define portBASE_TYPE   long\r
+\r
+       typedef portSTACK_TYPE StackType_t;\r
+       typedef long BaseType_t;\r
+       typedef unsigned long UBaseType_t;\r
+\r
+       typedef uint32_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
+\r
+       /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
+       not need to be guarded with a critical section. */\r
+       #define portTICK_TYPE_IS_ATOMIC 1\r
 \r
        /*-----------------------------------------------------------*/\r
 \r
        /* Hardware specifics. */\r
        #define portSTACK_GROWTH                        ( -1 )\r
-       #define portTICK_RATE_MS                        ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+       #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
        #define portBYTE_ALIGNMENT                      8\r
 \r
        /*-----------------------------------------------------------*/\r
        /* Called at the end of an ISR that can cause a context switch. */\r
        #define portEND_SWITCHING_ISR( xSwitchRequired )\\r
        {                                                                                               \\r
-       extern unsigned long ulPortYieldRequired;               \\r
+       extern uint32_t ulPortYieldRequired;                    \\r
                                                                                                        \\r
                if( xSwitchRequired != pdFALSE )                        \\r
                {                                                                                       \\r
 \r
        extern void vPortEnterCritical( void );\r
        extern void vPortExitCritical( void );\r
-       extern unsigned long ulPortSetInterruptMask( void );\r
-       extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+       extern uint32_t ulPortSetInterruptMask( void );\r
+       extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
 \r
        /* These macros do not globally disable/enable interrupts.  They do mask off\r
        interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */\r
        void vPortTaskUsesFPU( void );\r
        #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
 \r
-       #define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
+       #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
        #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
 \r
        /* Architecture specific optimisations. */\r
+       #ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION\r
+               #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+       #endif\r
+\r
        #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r
 \r
                /* Store/clear the ready priorities in a bit map. */\r
@@ -223,12 +198,12 @@ number of bits implemented by the interrupt controller. */
 #define portICCRPR_RUNNING_PRIORITY_OFFSET                                             ( 0x14 )\r
 \r
 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS                 ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS          ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS                      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
-#define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
 #endif /* PORTMACRO_H */\r
 \r