***IMMINENT RELEASE NOTICE***

[freertos] / FreeRTOS / Source / portable / IAR / ARM_CA9 / portmacro.h

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
index b15822a8fd3188d7aa7f126d5908a5634c1fb1cc..f68c4757739f9806486fce7959ea1da35ad6d399 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CA9/portmacro.h
@@ -1,5 +1,6 @@
 /*\r
-    FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+    FreeRTOS V8.1.0 - Copyright (C) 2014 Real Time Engineers Ltd.\r
+    All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
 \r
@@ -23,10 +24,10 @@
     the terms of the GNU General Public License (version 2) as published by the\r
     Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
 \r
-    >>! NOTE: The modification to the GPL is included to allow you to distribute\r
-    >>! a combined work that includes FreeRTOS without being obliged to provide\r
-    >>! the source code for proprietary components outside of the FreeRTOS\r
-    >>! kernel.\r
+    >>!   NOTE: The modification to the GPL is included to allow you to     !<<\r
+    >>!   distribute a combined work that includes FreeRTOS without being   !<<\r
+    >>!   obliged to provide the source code for proprietary components     !<<\r
+    >>!   outside of the FreeRTOS kernel.                                   !<<\r
 \r
     FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
     WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
@@ -90,16 +91,21 @@
        #define portDOUBLE              double\r
        #define portLONG                long\r
        #define portSHORT               short\r
-       #define portSTACK_TYPE  unsigned long\r
-       #define portBASE_TYPE   portLONG\r
-       typedef unsigned long portTickType;\r
-       #define portMAX_DELAY ( portTickType ) 0xffffffff\r
+       #define portSTACK_TYPE  uint32_t\r
+       #define portBASE_TYPE   long\r
+\r
+       typedef portSTACK_TYPE StackType_t;\r
+       typedef long BaseType_t;\r
+       typedef unsigned long UBaseType_t;\r
+\r
+       typedef uint32_t TickType_t;\r
+       #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 \r
        /*-----------------------------------------------------------*/\r
 \r
        /* Hardware specifics. */\r
        #define portSTACK_GROWTH                        ( -1 )\r
-       #define portTICK_RATE_MS                        ( ( portTickType ) 1000 / configTICK_RATE_HZ )\r
+       #define portTICK_PERIOD_MS                      ( ( TickType_t ) 1000 / configTICK_RATE_HZ )\r
        #define portBYTE_ALIGNMENT                      8\r
 \r
        /*-----------------------------------------------------------*/\r
@@ -109,7 +115,7 @@
        /* Called at the end of an ISR that can cause a context switch. */\r
        #define portEND_SWITCHING_ISR( xSwitchRequired )\\r
        {                                                                                               \\r
-       extern unsigned long ulPortYieldRequired;               \\r
+       extern uint32_t ulPortYieldRequired;                    \\r
                                                                                                        \\r
                if( xSwitchRequired != pdFALSE )                        \\r
                {                                                                                       \\r
@@ -127,8 +133,8 @@
 \r
        extern void vPortEnterCritical( void );\r
        extern void vPortExitCritical( void );\r
-       extern unsigned long ulPortSetInterruptMask( void );\r
-       extern void vPortClearInterruptMask( unsigned long ulNewMaskValue );\r
+       extern uint32_t ulPortSetInterruptMask( void );\r
+       extern void vPortClearInterruptMask( uint32_t ulNewMaskValue );\r
 \r
        /* These macros do not globally disable/enable interrupts.  They do mask off\r
        interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY. */\r
@@ -156,7 +162,7 @@
        void vPortTaskUsesFPU( void );\r
        #define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()\r
 \r
-       #define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
+       #define portLOWEST_INTERRUPT_PRIORITY ( ( ( uint32_t ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )\r
        #define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )\r
 \r
        /* Architecture specific optimisations. */\r
@@ -222,12 +228,12 @@ number of bits implemented by the interrupt controller. */
 #define portICCRPR_RUNNING_PRIORITY_OFFSET                                             ( 0x14 )\r
 \r
 #define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS                 ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )\r
-#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
+#define portICCPMR_PRIORITY_MASK_REGISTER                                      ( *( ( volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )\r
 #define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )\r
 #define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS          ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )\r
 #define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS                      ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )\r
-#define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
-#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
+#define portICCBPR_BINARY_POINT_REGISTER                                       ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )\r
+#define portICCRPR_RUNNING_PRIORITY_REGISTER                           ( *( ( const volatile uint32_t * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )\r
 \r
 #endif /* PORTMACRO_H */\r
 \r