]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/IAR/ARM_CM0/portasm.s
Update version number in readiness for V10.3.0 release. Sync SVN with reviewed releas...
[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM0 / portasm.s
index b4df2566d0bf901c7959984e063dc1db36b0ec6f..9afd906988e31c008df6fbf0a014bf6453ba243d 100644 (file)
@@ -1,79 +1,32 @@
 /*\r
-    FreeRTOS V7.2.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
-       \r
-\r
-    ***************************************************************************\r
-     *                                                                       *\r
-     *    FreeRTOS tutorial books are available in pdf and paperback.        *\r
-     *    Complete, revised, and edited pdf reference manuals are also       *\r
-     *    available.                                                         *\r
-     *                                                                       *\r
-     *    Purchasing FreeRTOS documentation will not only help you, by       *\r
-     *    ensuring you get running as quickly as possible and with an        *\r
-     *    in-depth knowledge of how to use FreeRTOS, it will also help       *\r
-     *    the FreeRTOS project to continue with its mission of providing     *\r
-     *    professional grade, cross platform, de facto standard solutions    *\r
-     *    for microcontrollers - completely free of charge!                  *\r
-     *                                                                       *\r
-     *    >>> See http://www.FreeRTOS.org/Documentation for details. <<<     *\r
-     *                                                                       *\r
-     *    Thank you for using FreeRTOS, and thank you for your support!      *\r
-     *                                                                       *\r
-    ***************************************************************************\r
-\r
-\r
-    This file is part of the FreeRTOS distribution.\r
-\r
-    FreeRTOS is free software; you can redistribute it and/or modify it under\r
-    the terms of the GNU General Public License (version 2) as published by the\r
-    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
-    >>>NOTE<<< The modification to the GPL is included to allow you to\r
-    distribute a combined work that includes FreeRTOS without being obliged to\r
-    provide the source code for proprietary components outside of the FreeRTOS\r
-    kernel.  FreeRTOS is distributed in the hope that it will be useful, but\r
-    WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
-    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for\r
-    more details. You should have received a copy of the GNU General Public\r
-    License and the FreeRTOS license exception along with FreeRTOS; if not it\r
-    can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
-    by writing to Richard Barry, contact details for whom are available on the\r
-    FreeRTOS WEB site.\r
-\r
-    1 tab == 4 spaces!\r
-    \r
-    ***************************************************************************\r
-     *                                                                       *\r
-     *    Having a problem?  Start by reading the FAQ "My application does   *\r
-     *    not run, what could be wrong?                                      *\r
-     *                                                                       *\r
-     *    http://www.FreeRTOS.org/FAQHelp.html                               *\r
-     *                                                                       *\r
-    ***************************************************************************\r
-\r
-    \r
-    http://www.FreeRTOS.org - Documentation, training, latest information, \r
-    license and contact details.\r
-    \r
-    http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
-    including FreeRTOS+Trace - an indispensable productivity tool.\r
-\r
-    Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
-    the code with commercial support, indemnification, and middleware, under \r
-    the OpenRTOS brand: http://www.OpenRTOS.com.  High Integrity Systems also\r
-    provide a safety engineered and independently SIL3 certified version under \r
-    the SafeRTOS brand: http://www.SafeRTOS.com.\r
-*/\r
+ * FreeRTOS Kernel V10.3.0\r
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
+ *\r
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
+ * this software and associated documentation files (the "Software"), to deal in\r
+ * the Software without restriction, including without limitation the rights to\r
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of\r
+ * the Software, and to permit persons to whom the Software is furnished to do so,\r
+ * subject to the following conditions:\r
+ *\r
+ * The above copyright notice and this permission notice shall be included in all\r
+ * copies or substantial portions of the Software.\r
+ *\r
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\r
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS\r
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR\r
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER\r
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.\r
+ *\r
+ * http://www.FreeRTOS.org\r
+ * http://aws.amazon.com/freertos\r
+ *\r
+ * 1 tab == 4 spaces!\r
+ */\r
 \r
 #include <FreeRTOSConfig.h>\r
 \r
-/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is\r
-defined.  The value zero should also ensure backward compatibility.\r
-FreeRTOS.org versions prior to V4.3.0 did not include this definition. */\r
-#ifndef configKERNEL_INTERRUPT_PRIORITY\r
-       #define configKERNEL_INTERRUPT_PRIORITY 0\r
-#endif\r
-\r
-       \r
        RSEG    CODE:CODE(2)\r
        thumb\r
 \r
@@ -85,84 +38,94 @@ FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
        PUBLIC xPortPendSVHandler\r
        PUBLIC vPortSVCHandler\r
        PUBLIC vPortStartFirstTask\r
-\r
+       PUBLIC ulSetInterruptMaskFromISR\r
+       PUBLIC vClearInterruptMaskFromISR\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 vSetMSP\r
        msr msp, r0\r
        bx lr\r
-       \r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 xPortPendSVHandler:\r
-       mrs r0, psp                                                     \r
-                                                                                       \r
+       mrs r0, psp\r
+\r
        ldr     r3, =pxCurrentTCB       /* Get the location of the current TCB. */\r
-       ldr     r2, [r3]                                                \r
-                                                                                       \r
+       ldr     r2, [r3]\r
+\r
        subs r0, r0, #32                /* Make space for the remaining low registers. */\r
        str r0, [r2]                    /* Save the new top of stack. */\r
        stmia r0!, {r4-r7}              /* Store the low registers that are not saved automatically. */\r
        mov r4, r8                              /* Store the high registers. */\r
-       mov r5, r9                                                      \r
-       mov r6, r10                                                     \r
-       mov r7, r11                                                     \r
-       stmia r0!, {r4-r7}                      \r
-                                                                                       \r
-       push {r3, r14}                                          \r
-       cpsid i                                                         \r
-       bl vTaskSwitchContext                           \r
-       cpsie i                                                         \r
+       mov r5, r9\r
+       mov r6, r10\r
+       mov r7, r11\r
+       stmia r0!, {r4-r7}\r
+\r
+       push {r3, r14}\r
+       cpsid i\r
+       bl vTaskSwitchContext\r
+       cpsie i\r
        pop {r2, r3}                    /* lr goes in r3. r2 now holds tcb pointer. */\r
-                                                                                       \r
-       ldr r1, [r2]                                            \r
+\r
+       ldr r1, [r2]\r
        ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
        adds r0, r0, #16                /* Move to the high registers. */\r
        ldmia r0!, {r4-r7}              /* Pop the high registers. */\r
-       mov r8, r4                                                      \r
-       mov r9, r5                                                      \r
-       mov r10, r6                                                     \r
-       mov r11, r7                                                     \r
-                                                                                       \r
+       mov r8, r4\r
+       mov r9, r5\r
+       mov r10, r6\r
+       mov r11, r7\r
+\r
        msr psp, r0                             /* Remember the new top of stack for the task. */\r
-                                                                                       \r
+\r
        subs r0, r0, #32                /* Go back for the low registers that are not automatically restored. */\r
        ldmia r0!, {r4-r7}              /* Pop low registers.  */\r
-                                                                                       \r
-       bx r3                                                           \r
+\r
+       bx r3\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 vPortSVCHandler;\r
-       ldr     r3, =pxCurrentTCB       /* Restore the context. */\r
-       ldr r1, [r3]                    /* Get the pxCurrentTCB address. */\r
-       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
-       adds r0, r0, #16                /* Move to the high registers. */\r
-       ldmia r0!, {r4-r7}              /* Pop the high registers. */\r
-       mov r8, r4                                              \r
-       mov r9, r5                                              \r
-       mov r10, r6                                             \r
-       mov r11, r7                                             \r
-                                                                               \r
-       msr psp, r0                             /* Remember the new top of stack for the task. */\r
-                                                                               \r
-       subs r0, r0, #32                /* Go back for the low registers that are not automatically restored. */\r
-       ldmia r0!, {r4-r7}              /* Pop low registers.  */\r
-       mov r1, r14                             /* OR R14 with 0x0d. */\r
-       movs r0, #0x0d                                  \r
-       orrs r1, r0                                             \r
-       bx r1                                                   \r
+       /* This function is no longer used, but retained for backward\r
+       compatibility. */\r
+       bx lr\r
 \r
 /*-----------------------------------------------------------*/\r
 \r
 vPortStartFirstTask\r
-       movs r0, #0x00                  /* Locate the top of stack. */\r
-       ldr r0, [r0]            \r
-       msr msp, r0                             /* Set the msp back to the start of the stack. */\r
-       cpsie i                                 /* Globally enable interrupts. */\r
-       svc 0                                   /* System call to start first task. */\r
-       nop                             \r
-       \r
+       /* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector\r
+       table offset register that can be used to locate the initial stack value.\r
+       Not all M0 parts have the application vector table at address 0. */\r
+\r
+       ldr     r3, =pxCurrentTCB       /* Obtain location of pxCurrentTCB. */\r
+       ldr r1, [r3]\r
+       ldr r0, [r1]                    /* The first item in pxCurrentTCB is the task top of stack. */\r
+       adds r0, #32                    /* Discard everything up to r0. */\r
+       msr psp, r0                             /* This is now the new top of stack to use in the task. */\r
+       movs r0, #2                             /* Switch to the psp stack. */\r
+       msr CONTROL, r0\r
+       isb\r
+       pop {r0-r5}                             /* Pop the registers that are saved automatically. */\r
+       mov lr, r5                              /* lr is now in r5. */\r
+       pop {r3}                                /* The return address is now in r3. */\r
+       pop {r2}                                /* Pop and discard the XPSR. */\r
+       cpsie i                                 /* The first task has its context and interrupts can be enabled. */\r
+       bx r3                                   /* Jump to the user defined task code. */\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+ulSetInterruptMaskFromISR\r
+       mrs r0, PRIMASK\r
+       cpsid i\r
+       bx lr\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+vClearInterruptMaskFromISR\r
+       msr PRIMASK, r0\r
+       bx lr\r
+\r
        END\r
-       
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