]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/IAR/ARM_CM3/portmacro.h
Update version number in preparation for maintenance release.
[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM3 / portmacro.h
index b9515ff1a8970bd5c6f4708eea2fc30b2ecc485e..7b96b771e82852b6aa24e279b58769f829761df7 100644 (file)
@@ -1,5 +1,5 @@
 /*\r
-    FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd.\r
+    FreeRTOS V9.0.1 - Copyright (C) 2017 Real Time Engineers Ltd.\r
     All rights reserved\r
 \r
     VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
@@ -100,10 +100,10 @@ typedef unsigned long UBaseType_t;
 \r
 #if( configUSE_16_BIT_TICKS == 1 )\r
        typedef uint16_t TickType_t;\r
-       #define portMAX_DELAY 0xffff\r
+       #define portMAX_DELAY ( TickType_t ) 0xffff\r
 #else\r
        typedef uint32_t TickType_t;\r
-       #define portMAX_DELAY 0xffffffffUL\r
+       #define portMAX_DELAY ( TickType_t ) 0xffffffffUL\r
 \r
        /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do\r
        not need to be guarded with a critical section. */\r
@@ -118,12 +118,19 @@ typedef unsigned long UBaseType_t;
 /*-----------------------------------------------------------*/\r
 \r
 /* Scheduler utilities. */\r
-extern void vPortYield( void );\r
-#define portNVIC_INT_CTRL_REG          ( * ( ( volatile uint32_t * ) 0xe000ed04UL ) )\r
+#define portYIELD()                                                                                    \\r
+{                                                                                                                      \\r
+       /* Set a PendSV to request a context switch. */                 \\r
+       portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;                 \\r
+       __DSB();                                                                                                \\r
+       __ISB();                                                                                                \\r
+}\r
+\r
+#define portNVIC_INT_CTRL_REG          ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
 #define portNVIC_PENDSVSET_BIT         ( 1UL << 28UL )\r
-#define portYIELD()                                    vPortYield()\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) portYIELD()\r
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Architecture specific optimisations. */\r
@@ -139,8 +146,8 @@ extern void vPortYield( void );
        #endif\r
 \r
        /* Store/clear the ready priorities in a bit map. */\r
-       #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) ) )\r
-       #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) ) )\r
+       #define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )\r
+       #define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )\r
 \r
        /*-----------------------------------------------------------*/\r
 \r
@@ -153,15 +160,19 @@ extern void vPortYield( void );
 /* Critical section management. */\r
 extern void vPortEnterCritical( void );\r
 extern void vPortExitCritical( void );\r
-extern uint32_t ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
 \r
-#define portDISABLE_INTERRUPTS()                               ulPortSetInterruptMask()\r
-#define portENABLE_INTERRUPTS()                                        vPortClearInterruptMask( 0 )\r
+#define portDISABLE_INTERRUPTS()                                                       \\r
+{                                                                                                                      \\r
+       __set_BASEPRI( configMAX_SYSCALL_INTERRUPT_PRIORITY );  \\r
+       __DSB();                                                                                                \\r
+       __ISB();                                                                                                \\r
+}\r
+\r
+#define portENABLE_INTERRUPTS()                                        __set_BASEPRI( 0 )\r
 #define portENTER_CRITICAL()                                   vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                            vPortExitCritical()\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortSetInterruptMask()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortClearInterruptMask( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()              __get_BASEPRI(); portDISABLE_INTERRUPTS()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   __set_BASEPRI( x )\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Tickless idle/low power functionality. */\r
@@ -169,6 +180,7 @@ extern void vPortClearInterruptMask( uint32_t ulNewMask );
        extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );\r
        #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )\r
 #endif\r
+\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Task function macros as described on the FreeRTOS.org WEB site.  These are\r
@@ -186,6 +198,8 @@ not necessary for to use this port.  They are defined so the common demo files
 /* portNOP() is not required by this port. */\r
 #define portNOP()\r
 \r
+/*-----------------------------------------------------------*/\r
+\r
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in\r
 the source code because to do so would cause other compilers to generate\r
 warnings. */\r