+ New feature added: Task notifications.

[freertos] / FreeRTOS / Source / portable / IAR / ARM_CM4F / portmacro.h

diff --git a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
index 92f41753c827d3a210e9535d9d89ed8ce45b468d..3c3b76f2ec0be659238dd9a1da0c97310642fe70 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
+++ b/FreeRTOS/Source/portable/IAR/ARM_CM4F/portmacro.h
@@ -110,11 +110,10 @@ typedef unsigned long UBaseType_t;
 /*-----------------------------------------------------------*/\r
 \r
 /* Scheduler utilities. */\r
-extern void vPortYield( void );\r
 #define portNVIC_INT_CTRL_REG          ( * ( ( volatile uint32_t * ) 0xe000ed04 ) )\r
 #define portNVIC_PENDSVSET_BIT         ( 1UL << 28UL )\r
 #define portYIELD()                                    vPortYield()\r
-#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired ) portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT\r
+#define portEND_SWITCHING_ISR( xSwitchRequired ) if( xSwitchRequired != pdFALSE ) vPortYield()\r
 #define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )\r
 /*-----------------------------------------------------------*/\r
 \r
@@ -145,15 +144,13 @@ extern void vPortYield( void );
 /* Critical section management. */\r
 extern void vPortEnterCritical( void );\r
 extern void vPortExitCritical( void );\r
-extern uint32_t ulPortSetInterruptMask( void );\r
-extern void vPortClearInterruptMask( uint32_t ulNewMask );\r
 \r
-#define portDISABLE_INTERRUPTS()                               ulPortSetInterruptMask()\r
-#define portENABLE_INTERRUPTS()                                        vPortClearInterruptMask( 0 )\r
+#define portDISABLE_INTERRUPTS()                               ulPortRaiseBASEPRI()\r
+#define portENABLE_INTERRUPTS()                                        vPortSetBASEPRI( 0 )\r
 #define portENTER_CRITICAL()                                   vPortEnterCritical()\r
 #define portEXIT_CRITICAL()                                            vPortExitCritical()\r
-#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortSetInterruptMask()\r
-#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortClearInterruptMask( x )\r
+#define portSET_INTERRUPT_MASK_FROM_ISR()              ulPortRaiseBASEPRI()\r
+#define portCLEAR_INTERRUPT_MASK_FROM_ISR(x)   vPortSetBASEPRI( x )\r
 /*-----------------------------------------------------------*/\r
 \r
 /* Tickless idle/low power functionality. */\r
@@ -179,6 +176,51 @@ not necessary for to use this port.  They are defined so the common demo files
 /* portNOP() is not required by this port. */\r
 #define portNOP()\r
 \r
+#ifndef portFORCE_INLINE\r
+       #define portFORCE_INLINE _Pragma("inline=forced")\r
+#endif\r
+\r
+portFORCE_INLINE static void vPortYield( void )\r
+{\r
+       /* Set a PendSV to request a context switch. */\r
+       portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;\r
+\r
+       /* Barriers are normally not required but do ensure the code is completely\r
+       within the specified behaviour for the architecture. */\r
+       __DSB();\r
+       __ISB();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static uint32_t ulPortRaiseBASEPRI( void )\r
+{\r
+uint32_t ulOriginalBASEPRI;\r
+\r
+       __asm volatile\r
+       (\r
+               "       mrs %0, basepri                                                                                 \n" \\r
+               "       mov r1, %1                                                                                              \n"     \\r
+               "       msr basepri, r1                                                                                 \n" \\r
+               "       isb                                                                                                             \n" \\r
+               "       dsb                                                                                                             \n" \\r
+               :"=r" (ulOriginalBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "r1"\r
+       );\r
+\r
+       /* This return will not be reached but is necessary to prevent compiler\r
+       warnings. */\r
+       return ulOriginalBASEPRI;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue )\r
+{\r
+       __asm volatile\r
+       (\r
+               "       msr basepri, %0 " :: "r" ( ulNewMaskValue )\r
+       );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
 /* Suppress warnings that are generated by the IAR tools, but cannot be fixed in\r
 the source code because to do so would cause other compilers to generate\r
 warnings. */\r