Update version number in readiness for V10.3.0 release. Sync SVN with reviewed releas...

[freertos] / FreeRTOS / Source / portable / IAR / RISC-V / chip_specific_extensions / RV32I_CLINT_no_extensions / freertos_risc_v_chip_specific_extensions.h

diff --git a/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h b/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
index 51c9057babd5ee861455665c49b22473a587b00d..3445be151ff9c4fef23337ca9e1e8b907f95de03 100644 (file)
--- a/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
+++ b/FreeRTOS/Source/portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h
@@ -1,6 +1,6 @@
 /*\r
- * FreeRTOS Kernel V10.2.1\r
- * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
+ * FreeRTOS Kernel V10.3.0\r
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.\r
  *\r
  * Permission is hereby granted, free of charge, to any person obtaining a copy of\r
  * this software and associated documentation files (the "Software"), to deal in\r
@@ -53,6 +53,7 @@
 #ifndef __FREERTOS_RISC_V_EXTENSIONS_H__\r
 #define __FREERTOS_RISC_V_EXTENSIONS_H__\r
 \r
+#define portasmHAS_SIFIVE_CLINT 1\r
 #define portasmHAS_MTIME 1\r
 #define portasmADDITIONAL_CONTEXT_SIZE 0 /* Must be even number on 32-bit cores. */\r
 \r
@@ -60,7 +61,6 @@ portasmSAVE_ADDITIONAL_REGISTERS MACRO
        /* No additional registers to save, so this macro does nothing. */\r
        ENDM\r
 \r
-/* Restore the additional registers found on the Pulpino. */\r
 portasmRESTORE_ADDITIONAL_REGISTERS MACRO\r
        /* No additional registers to restore, so this macro does nothing. */\r
        ENDM\r