]> git.sur5r.net Git - freertos/blobdiff - FreeRTOS/Source/portable/IAR/RISC-V/portASM.s
Update to the latest atomic.h.
[freertos] / FreeRTOS / Source / portable / IAR / RISC-V / portASM.s
index 84cf6c950d4f02364152fa9e78f8cd3b99c33c8e..c4082c7b3c49e6f07d8c47d5c5a576b9538602b0 100644 (file)
@@ -180,7 +180,7 @@ handle_asynchronous:
                        li t4, -1\r
                        lw t2, 0(t1)                            /* Load the low word of ullNextTime into t2. */\r
                        lw t3, 4(t1)                            /* Load the high word of ullNextTime into t3. */\r
-                       sw t4, 0(t0)                            /* Low word no smaller than old value. */\r
+                       sw t4, 0(t0)                            /* Low word no smaller than old value to start with - will be overwritten below. */\r
                        sw t3, 4(t0)                            /* Store high word of ullNextTime into compare register.  No smaller than new value. */\r
                        sw t2, 0(t0)                            /* Store low word of ullNextTime into compare register. */\r
                        lw t0, uxTimerIncrementsForOneTick      /* Load the value of ullTimerIncrementForOneTick into t0 (could this be optimized by storing in an array next to pullNextTime?). */\r
@@ -304,6 +304,7 @@ xPortStartFirstTask:
        portasmRESTORE_ADDITIONAL_REGISTERS     /* Defined in freertos_risc_v_chip_specific_extensions.h to restore any registers unique to the RISC-V implementation. */\r
 \r
        load_x  t0, 29 * portWORD_SIZE( sp )    /* mstatus */\r
+       addi t0, t0, 0x08                                               /* Set MIE bit so the first task starts with interrupts enabled - required as returns with ret not eret. */\r
        csrrw  x0, CSR_MSTATUS, t0                                      /* Interrupts enabled from here! */\r
 \r
        load_x  x5, 2 * portWORD_SIZE( sp )             /* t0 */\r