/*\r
- FreeRTOS V7.5.0 - Copyright (C) 2013 Real Time Engineers Ltd.\r
+ FreeRTOS V8.1.2 - Copyright (C) 2014 Real Time Engineers Ltd. \r
+ All rights reserved\r
\r
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
\r
the terms of the GNU General Public License (version 2) as published by the\r
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.\r
\r
- >>! NOTE: The modification to the GPL is included to allow you to distribute\r
- >>! a combined work that includes FreeRTOS without being obliged to provide\r
- >>! the source code for proprietary components outside of the FreeRTOS\r
- >>! kernel.\r
+ >>! NOTE: The modification to the GPL is included to allow you to !<<\r
+ >>! distribute a combined work that includes FreeRTOS without being !<<\r
+ >>! obliged to provide the source code for proprietary components !<<\r
+ >>! outside of the FreeRTOS kernel. !<<\r
\r
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY\r
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS\r
\r
/* Constants required to setup the initial stack. */\r
#ifndef _RUN_TASK_IN_ARM_MODE_\r
- #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
+ #define portINITIAL_SPSR ( ( StackType_t ) 0x3f ) /* System mode, THUMB mode, interrupts enabled. */\r
#else\r
- #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
+ #define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */\r
#endif\r
\r
-#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 )\r
+#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 )\r
\r
/* Constants required to handle critical sections. */\r
-#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 )\r
+#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )\r
\r
#ifndef abs\r
#define abs(x) ((x)>0 ? (x) : -(x))\r
/* ulCriticalNesting will get set to zero when the first task starts. It\r
cannot be initialised to 0 as this will cause interrupts to be enabled\r
during the kernel initialisation process. */\r
-unsigned long ulCriticalNesting = ( unsigned long ) 9999;\r
+uint32_t ulCriticalNesting = ( uint32_t ) 9999;\r
\r
/* Tick interrupt routines for cooperative and preemptive operation\r
respectively. The preemptive version is not defined as __irq as it is called\r
*\r
* See header file for description.\r
*/\r
-portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )\r
+StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )\r
{\r
- portSTACK_TYPE *pxOriginalTOS;\r
+ StackType_t *pxOriginalTOS;\r
\r
pxOriginalTOS = pxTopOfStack;\r
\r
/* First on the stack is the return address - which in this case is the\r
start of the task. The offset is added to make the return address appear\r
as it would within an IRQ ISR. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; \r
+ *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; \r
pxTopOfStack--;\r
\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */\r
+ *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
+ *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */\r
pxTopOfStack--;\r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */\r
+ *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */\r
+ *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */\r
+ *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */\r
+ *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */\r
+ *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */\r
+ *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */\r
+ *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */\r
+ *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */\r
+ *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */\r
+ *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */\r
+ *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */\r
pxTopOfStack--; \r
- *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */\r
+ *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */\r
pxTopOfStack--; \r
\r
/* When the task starts is will expect to find the function parameter in\r
R0. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */\r
+ *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */\r
pxTopOfStack--;\r
\r
/* The status register is set for system mode, with interrupts enabled. */\r
- *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR;\r
+ *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR;\r
pxTopOfStack--;\r
\r
/* Interrupt flags cannot always be stored on the stack and will\r
}\r
/*-----------------------------------------------------------*/\r
\r
-portBASE_TYPE xPortStartScheduler( void )\r
+BaseType_t xPortStartScheduler( void )\r
{\r
extern void vPortStartFirstTask( void );\r
\r
\r
u32 b0;\r
u16 a0;\r
- long err, err_min=n;\r
+ int32_t err, err_min=n;\r
\r
*a = a0 = ((n-1)/65536ul) + 1;\r
*b = b0 = n / *a;\r
for (; *a <= 256; (*a)++)\r
{\r
*b = n / *a;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
if (abs(err) > (*a / 2))\r
{\r
(*b)++;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
}\r
if (abs(err) < abs(err_min))\r
{\r
static void prvSetupTimerInterrupt( void )\r
{\r
WDG_InitTypeDef xWdg;\r
- unsigned short a;\r
- unsigned long n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;\r
+ uint16_t a;\r
+ uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ, b;\r
\r
/* Configure the watchdog as a free running timer that generates a\r
periodic interrupt. */\r
VIC_ITCmd( WDG_ITLine, ENABLE );\r
\r
/* Install the default handlers for both VIC's. */\r
- VIC0->DVAR = ( unsigned long ) prvDefaultHandler;\r
- VIC1->DVAR = ( unsigned long ) prvDefaultHandler;\r
+ VIC0->DVAR = ( uint32_t ) prvDefaultHandler;\r
+ VIC1->DVAR = ( uint32_t ) prvDefaultHandler;\r
\r
WDG_Cmd(ENABLE);\r
}\r
\r
u16 b0;\r
u8 a0;\r
- long err, err_min=n;\r
+ int32_t err, err_min=n;\r
\r
\r
*a = a0 = ((n-1)/256) + 1;\r
for (; *a <= 256; (*a)++)\r
{\r
*b = n / *a;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
if (abs(err) > (*a / 2))\r
{\r
(*b)++;\r
- err = (long)*a * (long)*b - (long)n;\r
+ err = (int32_t)*a * (int32_t)*b - (int32_t)n;\r
}\r
if (abs(err) < abs(err_min))\r
{\r
\r
static void prvSetupTimerInterrupt( void )\r
{\r
- unsigned char a;\r
- unsigned short b;\r
- unsigned long n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;\r
+ uint8_t a;\r
+ uint16_t b;\r
+ uint32_t n = configCPU_PERIPH_HZ / configTICK_RATE_HZ;\r
\r
TIM_InitTypeDef timer;\r
\r
VIC_ITCmd( TIM2_ITLine, ENABLE );\r
\r
/* Install the default handlers for both VIC's. */\r
- VIC0->DVAR = ( unsigned long ) prvDefaultHandler;\r
- VIC1->DVAR = ( unsigned long ) prvDefaultHandler;\r
+ VIC0->DVAR = ( uint32_t ) prvDefaultHandler;\r
+ VIC1->DVAR = ( uint32_t ) prvDefaultHandler;\r
\r
TIM_CounterCmd(TIM2, TIM_CLEAR);\r
TIM_CounterCmd(TIM2, TIM_START);\r
projects / freertos / blobdiff